ETC CX74001

CX74001
Rx ASIC for CDMA, AMPS, and PCS Applications
•
•
•
•
•
•
•
•
Cellular and PCS band phones
CDMA and AMPS modes in the cellular band
AMPS
CDMA-US
CDMA-Japan
CDMA mode in the PCS band
PCS-US
PCS-Korea
38
48
47
46
LNA_CTRL1
PCS_LNAIN
LNA_CTRL0
CELL_LNA_IN
VCC_RF_BIAS
CELL_LNA_EMIT
CELL/PCS
FM/CDMA
VCO_VCC
VCO_ON
CELL_TANKCELL_TANK+
PCS_TANK-
1
37
36
35
34
33
32
31
30
29
28
27
26
25
2
3
4
5
6
7
8
9
10
11
12
13
VCC_MIX
PCS_MIXER_OUT+
PCS_MIXER_OUTAMPS_MIX_OUT+
AMPS_MIX_OUTCDMA_MIX_OUT+
CDMA_MIX_OUTPCS_VGA_IN+
PCS_VGA_INAMPS_VGA_IN
CDMA_VGA_IN+
CDMA_VGA_INVCC_IF
LOD
PLL+
PCS_TANK+
14
15
16
PLL- 17
SIF 18
I- 19
I+ 20
Q+ 21
Q- 22
SLEEP 23
VGA_CONTROL 24
The device package and pinout are shown in Figure 1. A system block diagram of
the CX74001 is shown in Figure 2.
PCS_LNA_BIAS_RES
CELL_LNA_ OUT
NC
PCS_LNA_OUT
CELL_LNA_BIAS_RES
RF_BIAS_RES
CELL_MIX_IN
PCS_MIX_IN
PCSMIX_BYPASS
CELL_LO
PCS_LO
The noise figure, gain, and third order Input Intercept Point (IIP3) of each stage in
the receiver chip are optimized to meet the system requirements for AMPS and
CDMA modes as per TIA/EIA-98-C. Employing BiCMOS technology, the ASIC is
designed for low cost, high performance, and a high level of integration.
41
40
39
The VGA has a minimum dynamic range of 90 dB with a control voltage range from
0.5 to 2.5 Volts, and it is common to all modes. There are two VHF oscillators
which operates with external tank circuits to provide Local Oscillator (LO)
frequencies for the I/Q demodulator in the cellular and PCS bands.
Applications
42
After RF signal amplification and filtering, the received signal is mixed down from
RF to the Intermediate Frequency (IF). There are separate mixers for AMPS,
CDMA, and PCS bands. The CDMA cellular and PCS mixers have balanced
outputs for the IF SAW filters, while the AMPS differential output can be combined
externally to mate to a single-ended SAW filter. After IF filtering, the IF signal is
amplified by a Variable Gain Amplifier (VGA) and fed to an I/Q demodulator
resulting in baseband I/Q signals at the output.
• Supports single and dual-band, and tri-mode
handsets
• Battery cell operation (2.7 V < Vcc < 3.3 V)
• Dual Low Noise Amplifiers (800 MHz / 1900 MHz)
• PCS LNA With Bypass Feature
• Three-Step Cellular LNA Gain
• I/Q Interface
• Dual 200-600 MHz VHF Oscillators
• VCO On/Off control For Standby Current
Optimization
• CDMA Single IF Feature
• 48-pin, 7 x 7 mm RF Land Grid Array (RFLGA™)
package with down-set paddle.
44
43
The device is a highly integrated super-heterodyne receiver. It incorporates all the
components required to implement the receiver chain, from the low-noise amplifier
(LNA) to the In-Phase and Quadrature (I/Q) demodulator stages, except for the
external Surface Acoustic Wave (SAW) filters and matching components. There
are two internal Low Noise Amplifiers (LNAs). The Cellular LNA has three-step gain
stages, and the PCS LNA gain has a bypass feature.
Distinguishing Features
45
The CX74001 Application-Specific Integrated Circuit (ASIC) is a triple-mode, dualband receiver (Rx) intended for use in Code Division Multiple Access (CDMA)
portable phones in both cellular and Personal Communications System (PCS)
bands, as well as Advanced Mobile Phone System (AMPS) mode.
CNXT061
Figure 1. CX74001 Rx ASIC Pin-Out (Top View)
Data Sheet
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Doc. No. 101134A
March 5, 2002
CX74001
Rx ASIC for CDMA, AMPS, and PCS Applications
CDMA IF SAW
VCO_ON
RF SAW
(CELL)
CELL_LO
AMPS IF SAW
PLL
LNA_CTRL1
LNA_CTRL0
BYPASS
CELL_LNA_IN
LNA1
I+
I-
LNA2
FM
÷2
CELL/PCS
BIAS CONTROL
SLEEP
Q+
Q-
PCS LNA IN
BYPASS
BIAS RESISTORS (3)
RF SAW
(PCS)
PCS IF SAW
VGA_CONTROL
3
PCS_LO
LOD
SIF
Figure 2. CX74001 Rx ASIC Block Diagram
Technical Description
requirements with margin. The cellular CDMA and PCS mixers
have balanced output to drive the IF SAW filters. The differential
outputs of the AMPS mixer are combined externally to mate to a
single-ended input IF SAW filter.
Low Noise Amplifiers (LNAs) _________________________
The cellular band LNA is designed with a low noise figure and
high linearity to achieve receiver sensitivity and single-tone
requirements. The cellular LNA is a three-step gain LNA
designed to meet the inter-modulation distortion specifications in
CDMA per TIA/EIA 98-C.
Variable Gain Amplifier (VGA) _________________________
The PCS band LNA is also designed to provide a low noise
figure and high linearity to achieve receiver sensitivity and
single-tone requirements. At high signal strength, it is preferable
to bypass the LNA completely, and the PCS LNA supports this
feature.
The high dynamic range required by CDMA handsets is
achieved by the VGA, which is common to all modes. It has
three different inputs and the appropriate signal path is switched
inside the chip. The VGA has a dynamic range of 90 dB with a
control voltage of 0.5 to 2.5 volts. It has a low noise figure at
maximum gain, which allows it to meet the system noise figure
requirements. The balanced output is common for all the modes
and is fed directly to the I/Q Demodulator.
Mixers ____________________________________________
I/Q Demodulator_____________________________________
The CX74001 Rx ASIC has three independent mixers, one for
the PCS band and two for the cellular band (AMPS and CDMA).
The mixers are designed to operate with LO powers of –10
dBm, typical.
The VGA stage is internally AC coupled to the I/Q demodulator.
The LO signals are derived from one of the on-chip VCOs, then
fed to a divider block that divides the VCO frequency by two.
The differential I and Q outputs are designed specifically with a
low DC output offset and a low phase and amplitude imbalance
when cascaded with the baseband processor.
The cellular and PCS band mixers have a high gain and IIP3,
and a low noise figure that allow them to meet the system
2
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101134A
March 5, 2002
Rx ASIC for CDMA, AMPS, and PCS Applications
Voltage Controlled Oscillators (VCOs)__________________
The active cores of the two VCOs are present on the CX74001,
requiring only differential external LC tanks and a PLL
synthesizer. The VCO core current is automatically adjusted to
give a constant VCO output swing, regardless of the external
tank Q.
Mode Control ______________________________________
The operation of the chip is controlled by signals CELL/PCS,
FM, and SLEEP. The Single IF (SIF) is added to use a common
IF frequency for CDMA mode in cellular and PCS band. This
allows the use of one IF SAW filter for the PCS and CDMA
modes to reduce system implementation cost. The logic blocks
are powered off of the Vcc_IF, so it must be present to obtain
chip functionality.
Electrical and Mechanical Specifications.
Signal pin assignments and functional pin descriptions are
described in Table 1. The absolute maximum ratings of the
CX74001 are provided in Table 2. The recommended operating
conditions are specified in Table 3. Electrical specifications are
101134A
March 5, 2002
CX74001
provided in Table 4. Tables 5, 6, 7, and 8 provide logic and
mode control information for the CX74001.
Figures 3 through 46 provide typical performance
characteristics. A schematic diagram of the CX74001 is
provided in Figure 47 and the package dimensions of the 48-pin
RFLGA are shown in Figure 48.
ESD Sensitivity
The CX74001 is a JEDEC Class 1 device. The following
extreme Electrostatic Discharge (ESD) precautions are required
according to the Human Body Model (HBM):
•
•
•
•
Protective outer garments.
Handle device in ESD safeguarded work area.
Transport device in ESD shielded containers.
Monitor and test all ESD protection equipment.
The HBM ESD withstand threshold value, with respect to
ground, is ±1.5 kV. The HBM ESD withstand threshold value,
with respect to VDD (the positive power supply terminal) is also
±1.5 kV.
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3
CX74001
Rx ASIC for CDMA, AMPS, and PCS Applications
Table 1. CX74001 Pin Assignments and Signal Descriptions (1 of 4)
Pin #
1
4
Name
LNA_CTRL1
Description
Equivalent Circuit
Digital signal used in conjunction with pin 3 to control LNA gain step. DO NOT ALLOW TO
FLOAT OR LEAVE UNCONNECTED
2
PCS_LNAIN
PCS LNA input pin. High-Q matching network should be used to minimize noise figure, and a
DC blocking capacitor is required.
3
LNA_CTRL0
Digital signal used in conjunction with pin 1 to control LNA gain step. DO NOT ALLOW TO
FLOAT OR LEAVE UNCONNECTED
4
CELL_LNA_IN
Cellular LNA input pin. High-Q matching network should be used to minimize noise figure, and
a DC blocking capacitor is required.
5
VCC_RF_BIAS
Supply voltage to the RF bias (needed by all LNA/Mixer blocks) . An RF bypass capacitor
should be connected from the pin to ground with minimal trace length.
6
CELL_LNA_EMIT
Ground directly to ground with minimum trace length.
7
CELL/PCS
Digital signal used for band selection: 0 = cellular (800 MHz), 1 = PCS (1900 MHz).
8
FM/CDMA
Digital signal used in cellular band for mode selection: 0 = AMPS, 1 = CDMA.
9
VCO_VCC
Voltage supply to the VCO buffers. A bypass capacitor should be placed close to the device
from pin 9 to ground with minimal trace length.
10
VCO_ON
VCO control signal to turn VCO and PLL buffer ON/OFF during slotted paging modes, thereby
increasing standby time.
11
CELL_TANK–
Differential tank cellular band VCO pin. Care should be taken during the layout of the external
tank circuit to prevent parasitic oscillations.
12
CELL_TANK+
Differential tank cellular band VCO pin. Care should be taken during the layout of the external
tank circuit to prevent parasitic oscillations.
13
PCS_TANK–
Differential tank PCS band VCO pin. Care should be taken during the layout of the external
tank circuit to prevent parasitic oscillations.
14
PCS_TANK+
Differential tank PCS band VCO pin. Care should be taken during the layout of the external
tank circuit to prevent parasitic oscillations.
15
LOD
Linearity On Demand. It provides the bias control for the mixers, thereby reducing the chip
current consumption at the expense of input IP3.
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Vcc
Vcc
–
+
101134A
March 5, 2002
Rx ASIC for CDMA, AMPS, and PCS Applications
CX74001
Table 1. CX74001 Pin Assignments and Signal Descriptions (2 of 4)
Pin #
16
Name
PLL+
Description
Equivalent Circuit
Differential buffered VCO output.
Vcc
Vcc
–
+
17
PLL–
Differential buffered VCO output.
18
SIF
Digital control signal for SIF selection: 1 = SIF, 0 = Normal.
19
I–
I channel differential output.
20
I+
I channel differential output.
21
Q+
Q channel differential output.
22
Q–
Q channel differential output.
23
SLEEP
Digital signal used to activate the receiver ASIC: 0 = sleep, 1= enable.
24
VGA_CONTROL
Analog gain control of the VGA. Typical 0.5 to 2.5 V to control VGA dynamic range of greater
than 90dB.
25
VCC_IF
Voltage supply to VGA from I/Q demodulator stages and logic blocks. Supply should be
bypassed to prevent signal modulation to the supply line.
26
CDMA_VGA_IN–
CDMA differential VGA input
+
–
27
CDMA_VGA_IN+
CDMA differential VGA input
28
AMPS_VGA_IN
AMPS VGA input
29
PCS_VGA_IN–
PCS differential VGA input
+
–
30
PCS_VGA_IN+
101134A
March 5, 2002
PCS differential VGA input
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5
CX74001
Rx ASIC for CDMA, AMPS, and PCS Applications
Table 1. CX74001 Pin Assignments and Signal Descriptions (3 of 4)
Pin #
6
Name
Description
31
CDMA_MIX_OUT–
CDMA differential cellular mixer open collector output. VCC pull up inductor is required, and
the output impedance is set by an external matching network.
32
CDMA_MIX_OUT+
CDMA differential cellular mixer open collector output. VCC pull up inductor is required, and
the output impedance is set by an external matching network.
33
AMPS_MIX_OUT–
AMPS differential mixer open collector output. VCC pull up inductor is required, and the output
impedance is set by an external matching network.
34
AMPS_MIX_OUT+
AMPS differential mixer open collector output. VCC pull up inductor is required, and the output
impedance is set by an external matching network.
35
PCS_MIXER_OUT–
PCS differential mixer open collector output. VCC pull up inductor is required, and the output
impedance is set by an external matching network.
36
PCS_MIXER_OUT+
PCS differential mixer open collector output. VCC pull up inductor is required, and the output
impedance is set by an external matching network.
37
VCC_MIX
Voltage supply for the mixers. RF bypass capacitor should be close to pin with minimal trace
length.
38
PCS_LO
The local oscillator input for the PCS band mixer.
39
CELL_LO
The local oscillator input for the cellular band mixer.
40
PCSMIX_BYPASS
Low frequency bypass for the PCS mixer. Typically, a 47 nF is connected from pin to ground.
41
PCS_MIX_IN
PCS mixer input. Requires AC coupling capacitor
42
CELL_MIX_IN
Cellular mixer input
43
RF_BIAS_RES
This sets the RF bias current. Typically, a 15 kΩ resistor is connected from the pin to ground.
44
CELL_LNA_BIAS_RES
This sets the cellular LNA bias current. Typically, 27 kΩ is connected to ground.
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Equivalent Circuit
+
–
101134A
March 5, 2002
Rx ASIC for CDMA, AMPS, and PCS Applications
CX74001
Table 1. CX74001 Pin Assignments and Signal Descriptions (4 of 4)
Pin #
Name
Description
Equivalent Circuit
45
PCS_LNA_OUT
PCS LNA open collector output. VCC inductor pull up and external matching network are
required.
46
NC
No Connection.
47
CELL_LNA_OUT
Cellular LNA open collector output. VCC inductor pull up and external matching network are
required.
48
PCS_LNA_BIAS_RES
This set the PCS LNA bias current. Typically, a 220 Ω resistor is connected from the pin to
ground.
Table 2. Absolute Maximum Ratings
Parameter
Minimum
Maximum
Units
Supply voltage (VCC)
–0.3
+5.5
V
Input voltage range
–0.3
VCC
V
+5
dBm
LNA input power
Power dissipation
600
mW
Ambient operating temperature
–30
+80
°C
Storage temperature
–40
+125
°C
Table 3. Recommended Operating Conditions
Parameter
Minimum
Typical
Maximum
Units
Supply voltage (VCC)
2.7
3.0
3.3
V
Operating temperature
–30
+25
+80
°C
Impedance of logic inputs
50
kΩ
VIL Logic Low Input Voltage
0.0
0.5
V
VIH Logic High Input Voltage
VCC – 0.5
VCC
V
101134A
March 5, 2002
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7
CX74001
Rx ASIC for CDMA, AMPS, and PCS Applications
Table 4. CX74001 Rx ASIC Electrical Specifications (1 of 3)
(TA = 25°° C, VCC = 3.0 V)
Parameter
Symbol
Test Condition
Minimum
Typical
Maximum
Units
15.5
16
16.5
dB
Medium Gain
6
6.4
7
dB
Low Gain
–3
–5
–6
dB
Noise Figure @ High Gain
1.6
1.8
dB
Noise Figure @ Medium Gain
2.8
4
dB
5
6.4
800 MHz LNA CDMA
High Gain
Noise Figure @ Low Gain
Input IP3 @ High Gain
5
6
dB
dBm
Input IP3 @ Medium Gain
10
15
dBm
Input IP3 @ Low Gain
20
22
dBm
Reverse isolation
18
20
dB
Input return loss (869-894 MHz)
–10
–15
dB
Output return loss (869-894 MHz)
–10
–12
dB
Total supply current (adjustable)
8
8.5
mA
800 MHz LNA AMPS
Gain @ 881 MHz
15
Noise Figure
15.5
16
dB
1.4
1.6
dB
Input IP3
–2
0
dBm
Reverse Isolation
19
20
dB
Input return loss
–10
–15
dB
Output return loss
–10
–15
dB
Total supply current
4.5
5
mA
15.5
16
dB
1900 MHz LNA
Gain 1 (High)
15
Gain 2 (LNA Bypass)
–5
Noise Figure 1 (High)
Noise Figure 2 (LNA Bypass)
Input IP3 1 (High Gain)
2
–3
dB
2
dB
4
5
dB
3
dBm
Input IP3 (LNA Bypass)
20
21
dBm
Reverse Isolation
19
20
dB
Input return loss (1930-1990 MHz)
–8
–12
dB
Output return loss (1930-1990 MHz)
–10
–12
dB
Total supply current (Adjustable)
8
–4
1.8
7.5
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10
mA
101134A
March 5, 2002
Rx ASIC for CDMA, AMPS, and PCS Applications
CX74001
Table 4. CX74001 Rx ASIC Electrical Specifications (2 of 3)
(TA = 25°° C, VCC = 3.0 V)
Parameter
Symbol
Test Condition
Minimum
Typical
Maximum
Units
800 MHz Mixer
Conversion Gain (Power):
CDMA Mode
AMPS Mode
10
11
Single-Sideband Noise Figure:
CDMA Mode
AMPS Mode
10.5
11.5
11
12
dB
dB
8.1
8.2
8.6
8.6
dB
dB
P1dB @ Input:
CDMA Mode
AMPS Mode
–9.5
–14
–8
–13
dBm
dBm
IP3 @ Input:
CDMA Mode
AMPS Mode
6
5
7.5
6
dBm
dBm
–10
–14
dB
2000
1700
Ω
Ω
Mixer RF Input Return Loss (869-894 MHz)
(RF Port 1)
IF output Resistance:
CDMA (differential)
AMPS (differential)
LO Input Power Level
–10
–5
LO Input Return Loss
–10
–12
IF Frequency Range
50
LO/RF Isolation
18
Total supply current (Mixer and LO Buffer)
CDMA
AMPS
0
dBm
300
MHz
dB
20
dB
18
12
22
16
mA
mA
10
11
11.5
dB
8
9.5
–12
–10
RF Input Return Loss (1930-1990 MHz)
–10
–15
LO Input Power Level
–10
–5
LO Input Return Loss (1600-2300 MHz)
–10
–11
dB
1000
Ω
1900 MHz Mixer (1930-1990 MHz)
Conversion Gain (Power)
Single-Sideband Noise Figure
P1dB @ Input
IP3 @ Input
6
IF output resistance (differential)
IF Frequency Range
50
Total Supply Current (Mixer and LO Buffer)
101134A
March 5, 2002
18
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dB
dBm
7
dBm
dB
0
dBm
300
MHz
20
mA
9
CX74001
Rx ASIC for CDMA, AMPS, and PCS Applications
Table 4. CX74001 Rx ASIC Electrical Specifications (3 of 3)
(TA = 25°° C, VCC = 3.0 V)
Parameter
Symbol
Test Condition
Minimum
Typical
Maximum
Units
300
MHz
VGA and IQ Cascaded Performance
Input Frequency Range (-2 dB)
50
Input impedance:
CDMA (differential)
AMPS(single-ended)
PCS (differential)
1000
1000
1000
Cascaded Noise Figure:
@ Max Gain
@ Min Gain
5
50
VGA control range
0.5
Ω
Ω
Ω
7
dB
dB
2.5
V
Gain:
Minimum (AMPS)
Minimum (CDMA)
Minimum (PCS)
Maximum (AMPS)
Maximum (CDMA)
Maximum (PCS)
Gain Slope
–35
–43
–47.5
59
51
48
–30
–38
–42.5
63
55
52
–25
–33
–37.5
66
59
56
dB
dB
dB
dB
dB
dB
30
45
70
dB/V
0.2
0.2
0.55
0.55
dB
dB
Gain variation over Signal Bandwidth:
CDMA and PCS (1 kHz-630 kHz)
AMPS (100 Hz-15 kHz)
Gain variation over temperature and supply
Input 1 db compression at minimum gain
OIP3 @ greater than 30 dB gain
±2
dB
–10
–8
dBm
4
5.5
Output (1dB compression)
1.25
Output Common Mode Voltage Variation Over Supply
0.9
dBm
Vppd
1.8
V
2
6
mV
I-Q Gain Mismatch
0.2
0.3
dB
I-Q Phase Mismatch
2
4
degrees
I-Q DC Offset
8
30
mV
Total supply current (VGA, IQ, dividers)
CDMA / PCS
AMPS
9
12
10.5
14
mA
mA
600
MHz
I-Ib and Q-Qb DC Offset
Oscillator
Frequency range
100
Phase Noise (fc = 200 MHz, unloaded Q = 20) @ 100 kHz
offset
–115
–117
Second harmonic distortion (application dependent)
–25
–30
Total Supply Current
6
dBc/Hz
dBc
8
mA
600
MHz
Buffered VCO Output
Frequency range
100
Output Level (peak differential)
120
Output impedance (differential)
Reverse isolation
–30
Total supply current
10
150
Ω
–40
dB
3
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mV
300
4
mA
101134A
March 5, 2002
Rx ASIC for CDMA, AMPS, and PCS Applications
CX74001
Table 5. Mode Control Select Signal Switching
SLEEP
CELL/
PCS
FM
AMPS
CHAIN
CELL CDMA
CHAIN
PCS CDMA
CHAIN
0
X
X
OFF (Note 1)
OFF (Note 1)
OFF (Note 1)
1
0
0
ON
1
0
1
1
1
X
ON
ON
Key: 0 = Low, OFF
1 = High, ON
X = Do not care
Note 1: All blocks except VCO, which is independently controlled by VCO_ON in this state.
Table 6. VCO_ON Control (SIF = 0)
VCO_ON
SLEEP
CELL/
PCS
CELLULAR VCO
1
X
0
ON
1
X
1
X
1
0
X
1
1
PCS VCO
ON
ON
ON
Key: 0 = Low, OFF
1 = High, ON
X = Do not care
Table 7. SIF Control – Single IF (SLEEP = 1)
SIF
0
CELL/
PCS
FM
0
0
VGA INPUT
AMPS
CDMA
PCS
ON
VCO1
CELL
VCO2
PCS
ON
0
0
1
0
1
X
ON
ON
1
0
0
1
0
1
ON
ON
1
1
X
ON
ON
ON
ON
ON
ON
Key: 0 = Low, OFF
1 = High, ON
X = Do not care
101134A
March 5, 2002
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11
CX74001
Rx ASIC for CDMA, AMPS, and PCS Applications
Table 8. Logic Control for LNA Gain Step
LNA_CTRL0
LNA_CTRL1
AMPS
CELL CDMA
PCS CDMA
0
0
HIGH
HIGH
HIGH
1
0
MEDIUM (Note 1)
MEDIUM
BYPASS
0
1
BYPASS (Note 1)
BYPASS
HIGH
1
1
BYPASS (Note 1)
BYPASS
BYPASS
Key: 0 = Low, OFF
1 = High, ON
X = Do not care
Note 1: These modes are available but not used to meet the IS-98 Specifications.
3
18
17
2.5
16
Noise Figure (dB)
Gain (dB)
15
14
13
-30 deg C
12
11
25 deg C
10
85 deg C
9
2
1.5
1
-30 deg C
25 deg C
0.5
85 deg C
8
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
0
3.5
2.5
Vcc (V)
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
3.5
Vcc (V)
Figure 4. PCS LNA NF at 1960 MHz
5
0
4.5
-1
4
-2
3.5
-3
3
-4
Gain (dB)
IIP3 (dBm)
Figure 3. PCS LNA Gain at 1960 MHz
2.5
2
-6
-30 deg C
-7
1
25 deg C
-8
0.5
85 deg C
1.5
-30 deg C
25 deg C
-9
85 deg C
-10
0
2.5
2.6
2.7
2.8
2.9
3
Vcc (V)
3.1
3.2
3.3
3.4
2.5
3.5
2.6
2.7
2.8
2.9
3
Vcc (V)
3.1
3.2
3.3
3.4
3.5
Figure 6. PCS LNA Gain at 1960 MHz(Bypass Mode)
Figure 5. PCS LNA IIP3 at 1960 MHz
12
-5
Skyworks
Proprietary Information and Specifications are Subject to Change
101134A
March 5, 2002
Rx ASIC for CDMA, AMPS, and PCS Applications
CX74001
25
10
24
9
23
8
22
7
6
21
5
20
4
19
-30 deg C
3
-30 deg C
18
2
25 deg C
17
1
85 deg C
16
0
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
25 deg C
85 deg C
15
3.5
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
3.5
Vcc (V)
Vcc (V)
Figure 7. PCS LNA NF (Bypass Mode)
Figure 8. PCS LNA IIP3 (Bypass Mode)
20
2.5
19
2
18
Noise Figure (dB)
Gain (dB)
17
16
15
-30 deg C
14
13
25 deg C
12
1.5
-30 deg C
1
25 deg C
0.5
85 deg C
85 deg C
11
0
10
2.5
2.6
2.7
2.8
2.9
3
Vcc (V)
3.1
3.2
3.3
3.4
2.5
3.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
3.5
Vcc (V)
Figure 10. Cell CDMA LNA NF at 881 MHz
10
10
9
9
8
8
7
7
6
6
Gain (dB)
IIP3 (dBm)
Figure 9. Cell CDMA LNA GAIN at 881 MHz
5
-30 deg C
4
3
5
-30 deg C
4
3
25 deg C
25 deg C
2
2
85 deg C
1
85 deg C
1
0
0
2.5
2.6
2.7
2.8
2.9
3
Vcc (V)
3.1
3.2
3.3
3.4
2.5
3.5
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
3.5
Vcc (V)
Figure 11. Cell CDMA LNA IIP3 (High Gain) at 881 MHz
101134A
March 5, 2002
2.6
Figure 12. Cell CDMA LNA Gain (Mid Gain) at 881 MHz
Skyworks
Proprietary Information and Specifications are Subject to Change
13
CX74001
Rx ASIC for CDMA, AMPS, and PCS Applications
14
4.5
4
12
3.5
10
Noise Figure (dB)
3
2
-30 deg C
1.5
8
IIP3 (dBm)
2.5
25 deg C
1
85 deg C
0.5
0
6
-30 deg C
4
25 deg C
2
85 deg C
0
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
3.5
2.5
2.6
2.7
2.8
Vcc (V)
Figure 13. Cell CDMA LNA Noise Figure (Mid Gain) at 881 MHz
2.9
3
Vcc (V)
3.1
3.2
3.3
3.4
3.5
Figure 14. Cell CDMA LNA IIP3 (Mid Gain) at 881 MHz
-2
7
6
-3
5
Noise Figure (dB)
Gain (dB)
-4
-5
-6
-30 deg C
4
3
25 deg C
-7
-30 deg C
2
25 deg C
1
85 deg C
85 deg C
0
-8
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
2.5
3.5
2.6
2.7
2.8
2.9
3
Vcc (V)
3.2
3.3
3.4
3.5
Vcc (V)
Figure 15. Cell CDMA LNA Gain (Bypass Mode) at 881 MHz
Figure 16. Cell CDMA LNA Noise Figure (Bypass Mode) at 881 MHz
25
20
24
19
23
18
17
Gain (dB)
22
IIP3 (dBm)
3.1
21
20
19
18
14
-30 deg C
25 deg C
12
25 deg C
16
15
13
-30 deg C
17
16
11
85 deg C
85 deg C
10
2.5
15
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
3.5
Vcc (V)
3.5
Vcc (V)
Figure 17 Cell CDMA LNA IIP3 (Bypass Mode) at 881 MHz
14
Figure 18. AMPS LNA Gain at 881 MHz
Skyworks
Proprietary Information and Specifications are Subject to Change
101134A
March 5, 2002
CX74001
2
5
1.8
4
1.6
3
1.4
2
1.2
1
IIP3 (dBm)
Noise Figure (dB)
Rx ASIC for CDMA, AMPS, and PCS Applications
1
-30 deg C
0.8
0.6
25 deg C
-30 deg C
-2
0.4
25 deg C
-3
85 deg C
0.2
0
-1
-4
0
2.5
2.6
2.7
2.8
2.9
3
Vcc (V)
3.1
3.2
3.3
3.4
85 deg C
-5
3.5
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
3.5
Vcc (V)
Figure 19. AMPS LNA Noise Figure at 881 MHz
Figure 20. AMPS LNA IIP3 at 881 MHz
12
12
10
10
8
Noise Figure (dB)
14
Gain (dB)
8
6
-30 deg C
4
6
-30 deg C
4
25 deg C
25 deg C
2
85 deg C
2
85 deg C
0
0
2.5
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
2.6
2.7
2.8
2.9
3.5
3
3.1
3.2
3.3
3.4
3.5
Vcc (V)
Vcc (V)
Figure 21. PCS Mixer Gain at 1960 MHz
Figure 22. PCS Mixer Noise Figure at 1960 MHz
8
14
7
12
6
10
8
4
Gain (dB)
IIP3 (dBm)
5
-30 deg C
3
2
25 deg C
1
85 deg C
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
-30 deg C
4
25 deg C
2
0
2.5
6
85 deg C
0
3.5
2.5
2.6
2.7
2.8
Vcc (V)
3
3.1
3.2
3.3
3.4
3.5
Vcc (V)
Figure 23. PCS Mixer IIP3 at 1960 MHz
101134A
March 5, 2002
2.9
Figure 24. CELL CDMA Mixer Gain at 881 MHz
Skyworks
Proprietary Information and Specifications are Subject to Change
15
CX74001
Rx ASIC for CDMA, AMPS, and PCS Applications
10
10
9
8
8
6
Noise Figure (dB)
7
4
IIP3 (dBm)
6
5
4
2
-30 deg C
-30 deg C
0
25 deg C
-2
85 deg C
3
25 deg C
2
85 deg C
1
-4
0
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
2.5
3.5
2.6
2.7
2.8
2.9
Vcc (V)
3
3.1
3.2
3.3
3.4
3.5
Vcc (V)
Figure 25. Cell CDMA Mixer Noise Figure at 881 MHz
Figure 26. Cell CDMA Mixer IIP3 at 881 MHz
14
10
9
12
8
7
10
6
-30 deg C
4
25 deg C
2
85 deg C
NF (dB)
Gain (dB)
6
8
5
-30 deg C
4
3
25 deg C
2
85 deg C
1
0
2.5
0
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
3.5
3.5
Vcc (V)
Vcc (V)
Figure 28. AMPS Mixer Noise Figure at 881 MHz
Figure 27. AMPS Mixer Gain at 881 MHz
7
60
6
58
56
5
Gain (dB)
IIP3(dBm)
54
4
-30 deg C
3
25 deg C
2
52
50
48
-30 deg C
46
85 deg C
1
25 deg C
44
0
85 deg C
42
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
3.5
40
Vcc (V)
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
3.5
Vcc (V)
Figure 29. AMPS Mixer IIP3 at 881 MHz
16
Figure 30. PCS VGA+IQ Gain (VCC = 2.5 V) at 210.38 MHz
Skyworks
Proprietary Information and Specifications are Subject to Change
101134A
March 5, 2002
Rx ASIC for CDMA, AMPS, and PCS Applications
CX74001
-35
7
-36
6
-37
-39
Gain (dB)
5
Noise Figure (dB)
-38
-40
-41
4
3
-30 deg C
-42
-30 deg C
2
-43
25 deg C
1
25 deg C
-44
85 deg C
85 deg C
0
-45
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
2.5
3.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
3.5
Vcc (V)
Vcc (V)
Figure 31. PCS VGA+IQ Gain (VCC = 0.5 V) at 210.38 MHz
Figure 32. PCS VGA+I/Q Noise Figure (VCC = 2.5 V) at 210.38 MHz
-30
-41
-31
-42
-32
-43
-33
-44
-34
Gain (dB)
Noise Figure (dB)
-40
-45
-46
-30 deg C
-47
85 deg C
-35
-36
-38
85 deg C
-49
25 deg C
-37
25 deg C
-48
-30 deg C
-39
-50
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
-40
3.5
2.5
Vcc (V)
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
3.5
Vcc (V)
Figure 33. PCS VGA+I/Q IIP3 (VCC = 2.5 V) at 210.38 MHz
Figure 34. Cell CDMA VGA+IQ Gain (VCC = 0.5 V) at 85.38 MHz
60
9
58
8
56
7
Noise Figure (dB)
Gain (dB)
54
52
50
48
-30 deg C
46
44
25 deg C
42
85 deg C
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
5
4
3
-30 deg C
2
25 deg C
1
40
2.5
6
85 deg C
0
3.5
2.5
2.6
2.7
2.8
Vcc (V)
3
3.1
3.2
3.3
3.4
3.5
Vcc (V)
Figure 35. Cell CDMA VGA+IQ Gain (VCC = 2.5 V) at 85.38 MHz
101134A
March 5, 2002
2.9
Figure 36. CDMA VGA+I/Q Noise Figure (VCC = 2.5 V) at 85.38 MHz
Skyworks
Proprietary Information and Specifications are Subject to Change
17
CX74001
Rx ASIC for CDMA, AMPS, and PCS Applications
-20
-43
-22
-24
-45
-28
Gain (dB)
Noise Figure (dB)
-26
-47
-49
-30
-32
-30 deg C
-51
25 deg C
-53
-30 deg C
-34
25 deg C
-36
85 deg C
85 deg C
-38
-55
-40
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
3.5
2.5
2.6
2.7
2.8
Vcc (V)
Figure 37. CDMA VGA+I/Q IIP3 (Vc = 2.5 V) at 85.38 MHz
3.1
3.2
3.4
3.5
9
66
8
64
60
58
-30 deg C
56
25 deg C
7
Noise Figure (dB)
62
6
5
4
25 deg C
2
85 deg C
52
-30 deg C
3
54
85 deg C
1
50
0
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
3.5
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
3.5
Vcc (V)
Vcc (V)
Figure 39. AMPS VGA+IQ Gain (Vc = 2.5 V) at 85.38 MHz
Figure 40. AMPS VGA+I/Q Noise Figure (Vc = 2.5 V) at 85.38 MHz
-48
70
-50
60
50
Current (mA)
-52
-54
-30 deg C
-56
40
30
-30 deg C
20
25 deg C
-58
25 deg C
10
85 deg C
85 deg C
0
-60
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
2.5
3.5
2.6
2.7
2.8
Vcc (V)
2.9
3
3.1
3.2
3.3
3.4
3.5
Vcc (V)
Figure 41. AMPS VGA+I/Q IIP3 (Vc = 2.5 V) at 85.38 MHz
18
3.3
10
68
Gain (dB)
3
Figure 38. AMPS VGA+IQ Gain (Vc = 0.5 V) at 85.38 MHz
70
IIP3 (dBm)
2.9
Vcc (V)
Figure 42. Supply Current in PCS Mode (LNA Bypassed)
Skyworks
Proprietary Information and Specifications are Subject to Change
101134A
March 5, 2002
CX74001
70
70
60
60
50
50
Current (mA)
Current (mA)
Rx ASIC for CDMA, AMPS, and PCS Applications
40
30
-30 deg C
20
25 deg C
10
85 deg C
0
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
40
-30 deg C
30
20
25 deg C
10
85 deg C
0
3.5
2.5
2.7
2.9
Vcc (V)
3.3
3.5
Vcc (V)
Figure 43. Supply Current in PCS Mode ( LNA ON)
Figure 44. Supply Current in Cell CDMA Mode (LNA ON)
70
70
60
60
50
50
Current (mA)
Current (mA)
3.1
40
30
-30 deg C
20
30
-30 deg C
20
25 deg C
10
40
25 deg C
10
85 deg C
85 deg C
0
0
2.5
2.7
2.9
3.1
3.3
2.5
3.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
Vcc (V)
Vcc (V)
Figure 45. Supply Current in CELL CDMA Mode (LNA Bypassed)
Figure 46. Supply Current in AMPS Mode
101134A
March 5, 2002
Skyworks
Proprietary Information and Specifications are Subject to Change
3.4
3.5
19
CX74001
Rx ASIC for CDMA, AMPS, and PCS Applications
8.2 nH
10
VCC_1900_LNA
FROM CDMA
RF SAW FILTER OUTPUT
1 nF
TO PCS
RF SAW FILTER
INPUT
8.2 pF
FROM PCS
RF SAW FILTER OUTPUT
50 ohms
10 nH
33 pF
50 ohms
800LO
4.7pF
6.8 nH
8.2 pF
10
VCC_LNA
1 nF
8.2 pF
3.3 pF
50 ohms
1900LO
1.5 nH
VCC_MIX
4.7 µF
TO CDMA
RF SAW FILTER
INPUT
33 pF
50 ohms
18 nH
DNI
1K
LNA_CTRL
1 nF
33 pF
DNI
10 nF
TO PCS
IF SAW FILTER INPUT
1.2 nH
8.2 pF
18 nH
PCS LNA INPUT
DNI
VCC_MIX
DNI
1K
1 nF
33 PF
DNI
15 K
LNA_CTRL
8.2 pF
8.2 pF
8.2 pF
27 K
390 nH
33 pF
15 pF
VCC_MIX
220
CELL LNA INPUT
DNI
4.7 nF
33 pF
10 nH
CELL/PCS
220 pF
FM/CDMA
VCO_VCC
VCO_ON
0
5.1
CELL_TANK–
5.1
CELL_TANK+
PCS_TANK–
1 nF
1 nF
82 nH
CELL_LO
PCSMIX_BYPASS
PCS_MIX_IN
CELL_MIX_IN
RFBIAS_SET
CELL_LNA_BIAS_RES
PCS_LNA_OUT
PCS_LO
38
39
40
41
42
43
NC
33
6
32
CX74001
7
8
31
30
9
29
10
28
11
27
12
26
13
25
14
82 nH
34
5
Anode 1
Anode 2
2K
Cathode 2
TUNE
PCS_MIXER_OUT–
TO CDMA
IF SAW FILTER INPUT
AMPS_MIXOUT+
AMPS_MIXOUT–
CDMA_MIXOUT+
47 nH
CDMA_MIXOUT–
PCS_VGA_IN+
2.2 K
PCS_VGA_IN–
AMPS_VGA_IN
4.7 nF
33 pF
DNI
CDMA_VGA_IN+
1 nF
CDMA_VGA_IN–
VGA_PCS_IN+
1 nF
VCC_IF
VGA_PCS_IN–
4.7 nF
12 pF
VGA_AMPS_IN
4.7 nF
VGA_CONTROL
SLEEP
Q–
Q+
I+
I–
SIF
PLL–
LOD
A2
Cathode 1
A1
18 pF
PLL+
5.1 K
PCS_TANK+
5.1 K
33 pF
DNI
PCS_MIXER_OUT+
0
18 pF
4.7 nF
VCC_MIX
24
1 nF
35
4
23
5.1
2.2 K
3
22
1 µF
TO IF AMPS
SAW FILTER INPUT
47 nH
36
21
CELL_LNA_EMIT
4.7 nF
VCC_MIX
37
20
VCC_TANK
0
8.2pF
2
19
LNA_CTRL0
CELL_LNA_IN
VCC_RF_BIAS
DNI
47 nF
1
18
PCS_LNAIN
17
LNA_CTRL1
VCO_ON
15
FM/PCS
44
48
CELL_LNA_OUT
50 ohms
CELL/PCS
45
Vcc
46
1000 pF
47
PCS_LNA_BIAS_RES
750 nH
16
33 pF
Vcc
VGA_CDMA_IN+
4.7 nF
VGA_CDMA_IN–
VCC_IF
4.7 nF
10
VGA_CTRL
0.1 µF
VCC_TANK
2.2 µF
5.1
1 nF
1000 pF
220 pF
SLEEP
0
C
RXQ–
0
5.1
12 nH
0
5.1
1 nF
1 nF
RXQ+
0
12 nH
RXI+
0
0
RXI–
22 pF
5.1 K
5.1 K
22 pF
STM
Anode 2
Anode 1
Cathode 1
2. DNI = DO NOT INSTALL
2K
Cathode 2
TUNE
NOTES:
1. COMPONENT VALUES MAY CHANGE
100 pF
A1
A2
PLL+
100 pF
LOD
PLL+
5.1 K
C
Figure 47. CX74001 Schematic Diagram
20
Skyworks
Proprietary Information and Specifications are Subject to Change
101134A
March 5, 2002
Rx ASIC for CDMA, AMPS, and PCS Applications
CX74001
B
F
E
PIN #1 MARK
PIN #1
B
DIM.
C
TOP VIEW
D
BOTTOM VIEW
MIN.
MAX.
MIN.
A
1.10
1.30
0.043
B
6.90
7.10
C
0.25
0.35
D
A
INCHES
MILLIMETERS
0.50 REF
E
0.31
F
R 2.225 REF
0.41
0.272
0.010
MAX.
0.051
0.280
0.014
0.020 REF
0.012
0.016
R 0.089 REF
CNXT017
SIDE VIEW
Figure 48. Package Dimensions – 48-pin RFLGA Package
101134A
March 5, 2002
Skyworks
Proprietary Information and Specifications are Subject to Change
21
CX74001
Rx ASIC for CDMA, AMPS, and PCS Applications
Ordering Information
Model Name
Manufacturing Part
Number
Dual-band, tri-mode Rx ASIC
Product Revision
CX74001-12
© 2002, Skyworks Solutions, Inc. All Rights Reserved.
Information in this document is provided in connection with Skyworks Solutions, Inc. ("Skyworks") products. These materials are provided by Skyworks as a service to its
customers and may be used for informational purposes only. Skyworks assumes no responsibility for errors or omissions in these materials. Skyworks may make changes to
its products, specifications and product descriptions at any time, without notice. Skyworks makes no commitment to update the information and shall have no responsibility
whatsoever for conflicts, incompatibilities, or other difficulties arising from future changes to its products and product descriptions.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as may be provided in Skyworks’ Terms and
Conditions of Sale for such products, Skyworks assumes no liability whatsoever.
THESE MATERIALS ARE PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, RELATING TO SALE AND/OR USE OF
SKYWORKS™ PRODUCTS INCLUDING WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, PERFORMANCE, QUALITY
OR NON-INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. SKYWORKS FURTHER DOES NOT WARRANT THE
ACCURACY OR COMPLETENESS OF THE INFORMATION, TEXT, GRAPHICS OR OTHER ITEMS CONTAINED WITHIN THESE MATERIALS. SKYWORKS SHALL
NOT BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING WITHOUT LIMITATION, LOST REVENUES OR LOST
PROFITS THAT MAY RESULT FROM THE USE OF THESE MATERIALS.
Skyworks™ products are not intended for use in medical, lifesaving or life-sustaining applications. Skyworks’ customers using or selling Skyworks™ products for use in such
applications do so at their own risk and agree to fully indemnify Skyworks for any damages resulting from such improper use or sale.
RFLGA is a trademark of Conexant Systems, Inc.
The following are trademarks of Skyworks Solutions, Inc.: Skyworks™, the Skyworks symbol, and “Breakthrough Simplicity”™. Product names or services listed in this
publication are for identification purposes only, and may be trademarks of third parties. Third-party brands and names are the property of their respective owners.
Additional information, posted at www.skyworksinc.com, is incorporated by reference.
22
Skyworks
Proprietary Information and Specifications are Subject to Change
101134A
March 5, 2002
General Information:
Skyworks Solutions, Inc.
4311 Jamboree Rd.
Newport Beach, CA 92660-3007
www.skyworksinc.com