UTRON UT62L25616 256K X 16 BIT LOW POWER CMOS SRAM Rev. 1.6 REVISION HISTORY REVISION Preliminary Rev. 0.5 Original. Rev. 1.0 Rev. 1.1 Rev. 1.2 Rev. 1.3 Rev. 1.4 Rev. 1.5 Rev. 1.6 DESCRIPTION 1. The symbols CE#,OE#,WE# are revised as. CE , OE , WE . 2. Separate Industrial and Consumer SPEC. 3. Add access time 55ns range. 4. The power supply is revised: 3.3V 3.6V 1. Revised PIN CONFIGURATION Rev 1.0 : No A17 pin typing error Rev 1.1 : add A17 pin. a、 TFBGA package : ball D3 : NC A17 b、 TSOP-Ⅱ package : pin18 : A16 A17 pin19 : A15 A16 pin20 : A14 A15 pin21 : A13 A14 pin22 : A12 A13 pin23 : NC A12 1. Revised AC ELECTRICAL CHARACTERISTICS tOH : 5ns 10ns (Min.) tBLZ : 0ns 10ns (Min.) 2. Revised FUNCTIONAL BLOCK DIAGRAM 1. Revised DC ELECTRICAL CHARACTERISTICS： Revised VIH as 2.2V 2. Revised 48-pin TFBGA package outline dimension： a、 Rev. 1.2 : ball diameter=0.3mm b、 Rev. 1.3 : ball diameter=0.35mm 1. Add under/overshoot range of VIL & VIH 1. Revised Standby current (LL-Version) : 3uA(typ) 2uA(typ) 2. Revised operating current (Iccmax) : 45/35/25mA 40/30/25mA 3. Revised DC CHARACTERISTICS : a. Operating Power Supply Current (Icc) 55ns (max) : 45 40mA 70ns (typ) : 25 20mA, 70ns (max) : 35 30mA 100ns (Typ) : 20 16mA b. Standby current(CMOS) : LL-version (typ) : 3 2uA, 25 20uA 1. Revised VOH(Typ) : NA 2.7V 2. Add VIH(max)=VCC+2.0V for pulse width less than 10ns. VIL(min)=VSS-2.0V for pulse width less than 10ns. 3. Add order information for lead free product UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 1 Draft Date Mar, 2001 Jul 4,2001 Oct 18,2001 Mar 19,2002 Apr 17,2002 Nov 13,2002 Dec 03,2002 May 06,2003 P80055 UTRON UT62L25616 256K X 16 BIT LOW POWER CMOS SRAM Rev. 1.6 FEATURES GENERAL DESCRIPTION The UT62L25616 is a 4,194,304-bit low power CMOS static random access memory organized as 262,144 words by 16 bits. Fast access time : 55/70/100ns CMOS Low power operating Operating current : 40/30/25mA (Icc max.) Standby current : 20uA (typ.) L-version 2uA (typ.) LL-version Single 2.7V~3.6V power supply Operating temperature: Commercial : 0℃~70℃ Extended : -20℃~80℃ All TTL compatible inputs and outputs Fully static operation Three state outputs Data retention voltage : 1.5V (min) Data byte control : LB (I/O1~I/O8) UB (I/O9~I/O16) Package : 44-pin 400mil TSOPⅡ 48-pin 6mm × 8mm TFBGA The UT62L25616 operates from a single 2.7V ~ 3.6V power supply and all inputs and outputs are fully TTL compatible. The UT62L25616 is designed for low power system applications. It is particularly suited for use in high-density high-speed system applications. FUNCTIONAL BLOCK DIAGRAM A0-A17 DECODER 256K × 16 MEMORY ARRAY I/O DATA CIRCUIT COLUMN I/O Vcc Vss I/O1-I/O8 Lower Byte I/O9-I/O16 Upper Byte CE OE WE UB CONTROL CIRCUIT LB UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 2 P80055 UTRON UT62L25616 256K X 16 BIT LOW POWER CMOS SRAM Rev. 1.6 PIN CONFIGURATION 1 44 A5 43 42 A6 A2 2 3 A1 4 41 OE A0 CE 5 6 40 UB 39 LB I/O1 7 I/O2 8 38 37 I/O15 I/O3 9 36 I/O14 I/O4 10 11 35 I/O13 34 Vss F Vss I/O5 12 13 33 32 Vcc I/O12 G I/O6 14 31 I/O11 I/O7 15 30 I/O10 I/O8 29 I/O9 WE 16 17 18 28 27 NC A17 A16 A15 19 20 26 A8 A9 25 A10 A14 21 A13 22 24 23 A12 A4 A3 Vcc A A7 B C I/O16 D E H LB OE A0 A1 A2 NC I/O9 UB A3 A4 CE I/O1 I/O10 I/O11 A5 A6 I/O2 I/O3 Vss I/O12 A17 A7 I/O4 Vcc Vcc I/O13 NC A16 I/O5 Vss I/O15 I/O14 A14 A15 I/O6 I/O7 I/O16 NC A12 A13 WE I/O8 NC A8 A9 A10 A11 NC 1 2 3 4 5 6 TFBGA A11 PIN DESCRIPTION TSOP II SYMBOL A0 - A17 I/O1 - I/O16 CE DESCRIPTION Address Inputs Data Inputs/Outputs Chip Enable Input WE OE Output Enable Input LB UB VCC VSS NC Write Enable Input Lower Byte Control Upper Byte Control Power Supply Ground No Connection TRUTH TABLE MODE Standby Output Disable Read Write Note: CE OE WE LB UB H X L L L L L L L L X X H H L L L X X X X X H H H H H L L L X H L X L H L L H L X H X L H L L H L L I/O OPERATION I/O1-I/O8 I/O9-I/O16 High – Z High – Z High – Z High – Z High – Z High – Z High – Z High – Z DOUT High – Z High – Z DOUT DOUT DOUT DIN High – Z High – Z DIN DIN DIN SUPPLY CURRENT ISB, ISB1 ICC,ICC1,ICC2 ICC,ICC1,ICC2 ICC,ICC1,ICC2 H = VIH, L=VIL, X = Don't care. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 3 P80055 UTRON UT62L25616 256K X 16 BIT LOW POWER CMOS SRAM Rev. 1.6 ABSOLUTE MAXIMUM RATINGS* PARAMETER Terminal Voltage with Respect to VSS Commercial Operating Temperature Extended Storage Temperature Power Dissipation DC Output Current Soldering Temperature (under 10 secs) SYMBOL VTERM TA TA TSTG PD IOUT Tsolder RATING -0.5 to 4.6 0 to 70 -20 to 80 -65 to 150 1 50 260 UNIT V ℃ ℃ ℃ W mA ℃ *Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability. DC ELECTRICAL CHARACTERISTICS (VCC = 2.7V~3.6V, TA = 0℃ to 70℃ / -20℃ to 80℃(E)) PARAMETER SYMBOL TEST CONDITION Power Voltage VCC *1 Input High Voltage VIH *2 Input Low Voltage VIL Input Leakage Current ILI VSS ≦VIN ≦VCC Output Leakage Current ILO VSS ≦VI/O ≦VCC; Output Disable Output High Voltage VOH IOH= -1mA Output Low Voltage VOL IOL= 2.1mA Cycle time=min, 100%duty Operating Power ICC I/O=0mA, CE =VIL Supply Current Average Operation Current Standby Current (TTL) Standby Current (CMOS) ICC1 100%duty,II/O=0mA, CE ≦0.2V, other pins at 0.2V or Vcc-0.2V ICC2 ISB ISB1 CE =VIH, other pins =VIL or VIH CE =VCC-0.2V other pins at 0.2V or Vcc-0.2V 55 70 100 Tcycle= 1µs Tcycle= 500ns -L -LL MIN. TYP. MAX. UNIT 2.7 3.0 3.6 V 2.2 VCC+0.3 V -0.2 0.6 V -1 1 µA -1 1 µA 2.2 2.7 V 0.4 V 30 40 mA 20 30 mA 16 25 mA - 4 5 mA - 8 10 mA - 0.3 20 2 0.5 80 20 mA µA µA Notes: 1. Overshoot : Vcc+2.0v for pulse width less than 10ns. 2. Undershoot : Vss-2.0v for pulse width less than 10ns. 3. Overshoot and Undershoot are sampled, not 100% tested. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 4 P80055 UTRON UT62L25616 256K X 16 BIT LOW POWER CMOS SRAM Rev. 1.6 CAPACITANCE (TA=25℃, f=1.0MHz) PARAMETER Input Capacitance Input/Output Capacitance SYMBOL CIN CI/O MIN. - MAX 6 8 UNIT pF pF Note : These parameters are guaranteed by device characterization, but not production tested. AC TEST CONDITIONS Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Levels Output Load 0V to 3.0V 5ns 1.5V CL = 30pF, IOH/IOL = -1mA / 2.1mA AC ELECTRICAL CHARACTERISTICS (VCC =2.7V~3.6V, TA =0℃ to 70℃ / -20℃ to 80℃(E)) (1) READ CYCLE PARAMETER Read Cycle Time Address Access Time Chip Enable Access Time Output Enable Access Time Chip Enable to Output in Low Z Output Enable to Output in Low Z Chip Disable to Output in High Z Output Disable to Output in High Z Output Hold from Address Change LB , UB Access Time LB , UB to High-Z Output LB , UB to Low-Z Output SYMBOL tRC tAA tACE tOE tCLZ* tOLZ* tCHZ* tOHZ* tOH tBA tBHZ tBLZ UT62L25616-55 MIN. MAX. 55 55 55 30 10 5 20 20 10 55 25 10 - UT62L25616-70 MIN. MAX. 70 70 70 35 10 5 25 25 10 70 30 10 - UT62L25616-100 UNIT MIN. MAX. 100 ns 100 ns 100 ns 50 ns 10 ns 5 ns 30 ns 30 ns 10 ns 100 ns 40 ns 10 ns UT62L25616-55 MIN. MAX. 55 50 50 0 45 0 25 0 5 30 45 - UT62L25616-70 MIN. MAX. 70 60 60 0 55 0 30 0 5 30 60 - UT62L25616-100 UNIT MIN. MAX. 100 ns 80 ns 80 ns 0 ns 70 ns 0 ns 40 ns 0 ns 5 ns 40 ns 80 ns (2) WRITE CYCLE PARAMETER Write Cycle Time Address Valid to End of Write Chip Enable to End of Write Address Set-up Time Write Pulse Width Write Recovery Time Data to Write Time Overlap Data Hold from End of Write Time Output Active from End of Write Write to Output in High Z SYMBOL tWC tAW tCW tAS tWP tWR tDW tDH tOW* tWHZ* tBW LB , UB Valid to End of Write *These parameters are guaranteed by device characterization, but not production tested. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 5 P80055 UTRON UT62L25616 256K X 16 BIT LOW POWER CMOS SRAM Rev. 1.6 TIMING WAVEFORMS READ CYCLE 1 (Address Controlled) (1,2) tRC Address tAA tOH Dout tOH Previous data valid Data Valid READ CYCLE 2 ( CE and OE Controlled) (1,3,4,5) t RC Address tAA CE tACE tBA LB , UB t BHZ tBLZ OE t CHZ tOE tCLZ tOLZ Dout tOHZ t OH High-Z High-Z Data Valid Notes : 1. WE is high for read cycle. 2.Device is continuously selected OE =low, CE =low, LB or UB =low. 3.Address must be valid prior to or coincident with CE =low, LB or UB =low transition; otherwise tAA is the limiting parameter. 4.tCLZ, tBLZ, tOLZ, tCHZ, tBHZ and tOHZ are specified with CL=5pF. Transition is measured±500mV from steady state. 5.At any given temperature and voltage condition, tCHZ is less than tCLZ, tBHZ is less than tBLZ, tOHZ is less than tOLZ. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 6 P80055 UTRON UT62L25616 256K X 16 BIT LOW POWER CMOS SRAM Rev. 1.6 WRITE CYCLE 1 ( WE Controlled) (1,2,3,5,6) tW C Address tAW CE t CW t AS tW P tW R WE tBW LB , UB t W HZ t OW High-Z Dout (4) tDW tDH (4) Din Data Valid WRITE CYCLE 2 ( CE Controlled) (1,2,5,6) tW C A ddress tA W CE tW R tA S tC W tW P WE tB W LB , U B tW H Z D out H igh-Z (4) tD W tD H D in D ata V alid UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 7 P80055 UTRON UT62L25616 256K X 16 BIT LOW POWER CMOS SRAM Rev. 1.6 WRITE CYCLE 3 ( LB , UB Controlled) (1,2,5,6) tWC Address tAW CE tAS tCW tWR tWP WE tBW LB , UB tWHZ High-Z Dout tDW Din tDH Data Valid Notes : 1. WE , CE , LB , UB must be high during all address transitions. 2.A write occurs during the overlap of a low CE , low WE , LB or UB =low. 3.During a WE controlled write cycle with OE low, tWP must be greater than tWHZ+tDW to allow the drivers to turn off and data to be placed on the bus. 4.During this period, I/O pins are in the output state, and input signals must not be applied. 5.If the CE , LB , UB low transition occurs simultaneously with or after WE low transition, the outputs remain in a high impedance state. 6.tOW and tWHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 8 P80055 UTRON UT62L25616 256K X 16 BIT LOW POWER CMOS SRAM Rev. 1.6 DATA RETENTION CHARACTERISTICS (TA = 0℃ to 70℃ / -20℃ to 80℃(E)) PARAMETER Vcc for Data Retention Data Retention Current Chip Disable to Data Retention Time Recovery Time SYMBOL VDR IDR tCDR TEST CONDITION CE ≧ VCC-0.2V Vcc=1.5V CE ≧ VCC-0.2V See Data Retention Waveforms (below) tR -L - LL MIN. 1.5 TYP. - MAX. 3.6 UNIT V - 1 0.5 50 20 µA µA 0 - - ms 5 - - ms DATA RETENTION WAVEFORM Low Vcc Data Retention Waveform (1) ( CE controlled) VDR ≧ 1.5V VCC Vcc(min.) Vcc(min.) tCDR CE VIH tR CE ≧ VCC-0.2V VIH Low Vcc Data Retention Waveform (2) ( LB , UB controlled) VDR ≧ 1.5V VCC Vcc(min.) Vcc(min.) tCDR LB,UB VIH tR LB,UB ≧ VCC-0.2V UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 9 VIH P80055 UTRON UT62L25616 256K X 16 BIT LOW POWER CMOS SRAM Rev. 1.6 PACKAGE OUTLINE DIMENSION θ 44-pin 400mil TSOP-Ⅱ Package Outline Dimension SYMBOLS A A1 A2 b c D E E1 e L 2D y Θ DIMENSIONS IN MILLMETERS MIN. NOM. MAX. 1.00 1.20 0.05 0.15 0.95 1.00 1.05 0.30 0.35 0.45 0.12 0.21 18.313 18.415 18.517 11.854 11.836 11.838 10.058 10.180 10.282 0.800 0.40 0.50 0.60 0.805 0.00 0.076 o o 5 0 DIMENSIONS IN INCHS MIN. NOM. MAX. 0.039 0.047 0.002 0.006 0.037 0.039 0.041 0.012 0.014 0.018 0.0047 0.083 0.721 0.725 0.728 0.460 0.466 0.470 0.398 0.400 0.404 0.0315 0.0157 0.020 0.0236 0.0317 0.000 0.003 o o 0 5 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 10 P80055 UTRON Rev. 1.6 UT62L25616 256K X 16 BIT LOW POWER CMOS SRAM 48-pin 6mm × 8mm TFBGA Package Outline Dimension UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 11 P80055 UTRON UT62L25616 256K X 16 BIT LOW POWER CMOS SRAM Rev. 1.6 ORDERING INFORMATION COMMERCIAL TEMPERATURE PART NO. UT62L25616MC-55L UT62L25616MC-55LL UT62L25616MC-70L UT62L25616MC-70LL UT62L25616MC-100L UT62L25616MC-100LL UT62L25616BS-55L UT62L25616BS-55LL UT62L25616BS-70L UT62L25616BS-70LL UT62L25616BS-100L UT62L25616BS-100LL ACCESS TIME (ns) 55 55 70 70 100 100 55 55 70 70 100 100 STANDBY CURRENT (µA) typ. 20 2 20 2 20 2 20 2 20 2 20 2 ACCESS TIME (ns) 55 55 70 70 100 100 55 55 70 70 100 100 STANDBY CURRENT (µA) typ. 20 2 20 2 20 2 20 2 20 2 20 2 PACKAGE 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 48 PIN TFBGA 48 PIN TFBGA 48 PIN TFBGA 48 PIN TFBGA 48 PIN TFBGA 48 PIN TFBGA EXTENDED TEMPERATURE PART NO. UT62L25616MC-55LE UT62L25616MC-55LLE UT62L25616MC-70LE UT62L25616MC-70LLE UT62L25616MC-100LE UT62L25616MC-100LLE UT62L25616BS-55LE UT62L25616BS-55LLE UT62L25616BS-70LE UT62L25616BS-70LLE UT62L25616BS-100LE UT62L25616BS-100LLE UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 12 PACKAGE 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 48 PIN TFBGA 48 PIN TFBGA 48 PIN TFBGA 48 PIN TFBGA 48 PIN TFBGA 48 PIN TFBGA P80055 UTRON UT62L25616 256K X 16 BIT LOW POWER CMOS SRAM Rev. 1.6 ORDERING INFORMATION (for lead free product) COMMERCIAL TEMPERATURE PART NO. UT62L25616MCL-55L UT62L25616MCL-55LL UT62L25616MCL-70L UT62L25616MCL-70LL UT62L25616MCL-100L UT62L25616MCL-100LL UT62L25616BSL-55L UT62L25616BSL-55LL UT62L25616BSL-70L UT62L25616BSL-70LL UT62L25616BSL-100L UT62L25616BSL-100LL ACCESS TIME (ns) 55 55 70 70 100 100 55 55 70 70 100 100 STANDBY CURRENT (µA) typ. 20 2 20 2 20 2 20 2 20 2 20 2 ACCESS TIME (ns) 55 55 70 70 100 100 55 55 70 70 100 100 STANDBY CURRENT (µA) typ. 20 2 20 2 20 2 20 2 20 2 20 2 PACKAGE 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 48 PIN TFBGA 48 PIN TFBGA 48 PIN TFBGA 48 PIN TFBGA 48 PIN TFBGA 48 PIN TFBGA EXTENDED TEMPERATURE PART NO. UT62L25616MCL-55LE UT62L25616MCL-55LLE UT62L25616MCL-70LE UT62L25616MCL-70LLE UT62L25616MCL-100LE UT62L25616MCL-100LLE UT62L25616BSL-55LE UT62L25616BSL-55LLE UT62L25616BSL-70LE UT62L25616BSL-70LLE UT62L25616BSL-100LE UT62L25616BSL-100LLE UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 13 PACKAGE 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 44 PIN TSOP-Ⅱ 48 PIN TFBGA 48 PIN TFBGA 48 PIN TFBGA 48 PIN TFBGA 48 PIN TFBGA 48 PIN TFBGA P80055 UTRON Rev. 1.6 UT62L25616 256K X 16 BIT LOW POWER CMOS SRAM This page is left blank intentionally. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 14 P80055