ETC AM7926-1VC

Am7926
Subscriber Line Interface Circuit
The Am7926 Subscriber Line Interface Circuit implements the basic telephone line interface functions, and enables
the design of low power, high performance, POTS line interface cards.
DISTINCTIVE CHARACTERISTICS
Ideal for high-density, low-power linecard
applications
Control states: Active, Reverse Polarity, Tip
Open, Ringing, Standby, and Open Circuit
Low standby power (45 mW)
–16 V to –58 V battery operation
On-hook transmission
Two-wire impedance set by single external
impedance
Programmable constant-current feed
Low Overhead Voltage (6 V)
Programmable loop-detect threshold
Ground-start detector
Programmable ring-trip detect threshold
No –5 V supply required
Current Gain = 500
Three on-chip relay drivers and relay snubbers,
one ringing and two general purpose
Tip Open state for ground-start lines
BLOCK DIAGRAM
Relay
Driver
Relay
Driver
Relay
Driver
A(TIP)
RYOUT2
RYOUT1
RINGOUT
D1
D2
HPA
Input Decoder
and Control
HPB
C1
C2
C3
Two-Wire
Interface
DET
VTX
RSN
Signal
Transmission
B(RING)
Off-Hook
Detector
VS
VBAT2
RD
RDC
CAS
VDC
Power-Feed
Controller
DA
DB
VBAT1
BGND
Ring-Trip
Detector
VCC
VBREF
AGND
Publication# 080449
Rev: A3 Amendment: /0
Issue Date: January 2001
ORDERING INFORMATION
Standard Products
Legerity standard products are available in several packages and operating ranges. The order number (Valid Combination) is
formed by a combination of the elements below.
Am7926
V
–1
C
TEMPERATURE RANGE
C = Commercial (0°C to +70°C)*
PACKAGE TYPE
V = 44-pin Thin Plastic Quad Flat Pack (PQT044)
PERFORMANCE GRADE
–1 52 dB Longitudinal Balance, Polarity Reversal
–2 63 dB Longitudinal Balance, Polarity Reversal
–3 52 dB Longitudinal Balance, No Polarity Reversal
–4 63 dB Longitudinal Balance, No Polarity Reversal
DEVICE NUMBER/DESCRIPTION
Am7926
Subscriber Line Interface Circuit
Valid Combinations
Valid Combinations
–1
–2
Am7926
VC
Valid Combinations list configurations planned to
be supported in volume for this device. Consult
the local Legerity sales office to confirm availability of specific valid combinations, to check on
newly released combinations.
–3
–4
Note:
* Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is
guaranteed by characterization and periodic sampling of production units.
2
Am7926 Data Sheet
DB
N/C
N/C
B(RING)
A(TIP)
BGND
N/C
N/C
VCC
VBAT2
RINGOUT
CONNECTION DIAGRAMS
Top View
44 43 42 41 40 39 38 37 36 35 34
RYOUT1
1
33
DA
RYOUT2
N/C
2
32
N/C
3
31
RD
30
N/C
29
HPB
28
N/C
VS
4
N/C
5
VBAT1
6
N/C
D2
7
8
27
HPA
26
N/C
D1
9
25
VTX
C1
10
11
24
N/C
23
VBREF
N/C
Am7926VC
AGND
N/C
RSN
CAS
VDC
RDC
N/C
C3
C2
N/C
DET
12 13 14 15 16 17 18 19 20 21 22
Notes:
1. Pin 1 is marked for orientation.
2. N/C = No Connect
3. RSVD = Reserved. Do not connect to this pin.
SLIC Products
3
PIN DESCRIPTIONS
4
Pin Name
Type
Description
AGND
Gnd
A(TIP)
Output
BGND
Gnd
B(RING)
Output
C3–C1
Input
CAS
Capacitor
D2–D1
Input
Relay Driver Control. D1 and D2 control the relay drivers RYOUT1 and RYOUT2. Logic
Low on D1 activates the RYOUT1 relay driver. Logic Low on D2 activates the RYOUT2
relay driver.
DA
Input
Negative input to ring-trip comparator.
DB
Input
Positive input to ring-trip comparator.
DET
Output
HPA
Capacitor
A (TIP) side of high-pass filter capacitor.
HPB
Capacitor
B (RING) side of high-pass filter capacitor.
N/C
—
RD
Resistor
Detector threshold set and filter pin.
RDC
Resistor
Connection point for the DC feed current programming network. The other end of the
network connects to the receiver summing node (RSN).
RINGOUT
Output
RSN
Input
Receive Summing Node. The metallic current (both AC and DC) between A(TIP) and
B(RING) is equal to 500 times the current into this pin. The networks which program
receive gain, two-wire impedance, and feed resistance all connect to this node.
RYOUT1
Output
Relay/Switch Driver. Open-collector driver with emitter internally connected to BGND.
RYOUT2
Output
Relay/Switch Driver. Open-collector driver with emitter internally connected to BGND.
VBAT1
Battery
Battery supply and connection to substrate. When on hook, switcher should not be in
use. Current draw is from VBAT1
VBAT2
Battery
Battery supply for output amplifiers.
VBREF
—
VCC
Power Supply
VDC
Output
Output that is proportional to the line voltage: VDC = | VA–VB | / 20.
VS
Output
Output that is equal to VREGMIN + 2.4 V (total overhead needed is 6 V). The output can
be used as a control input to an external switching regulator. The switching regulator
output must be set to VS –2.4 V (or more negative) in order to guarantee performance
of the SLIC.
VTX
Output
Transmit Audio. This output is a 0.50 gain version of the A(TIP) and B(RING) metallic
voltage. VTX also sources the two-wire input impedance programming network.
Analog and Digital ground.
Output of A(TIP) power amplifier.
Battery (power) ground.
Output of B(RING) power amplifier.
SLIC control pins. C3 is MSB and C1 is LSB.
Anti-Saturation pin for capacitor to filter reference voltage when operating in antisaturation region.
Switchhook Detector. A logic Low indicates that selected condition is detected. The
detect condition is selected by the logic inputs (C3–C1). The output is open-collector with
a built-in 15 kΩ pull-up resistor.
No Connect. This pin is not internally connected.
Ring Relay Driver. Open-collector driver with emitter internally connected to BGND.
This is a Legerity reserved pin and must always be connected to the VBAT pin.
+5 V power supply.
Am7926 Data Sheet
ABSOLUTE MAXIMUM RATINGS
OPERATING RANGES
Storage temperature ......................... –55°C to +150°C
Commercial (C) Devices
VCC with respect to AGND ................. –0.4 V to +7.0 V
Ambient temperature .............................0°C to +70°C*
VBAT1, VBAT2 with respect to AGND:
Continuous..................................... +0.4 V to –70 V
10 ms ............................................. +0.4 V to –75 V
VCC .....................................................4.75 V to 5.25 V
BGND with respect to AGND ................... +3 V to –3 V
A(TIP) or B(RING) to BGND:
Continuous ......................................... VBAT to +1 V
10 ms (f = 0.1 Hz) ............................. –70 V to +5 V
1 µs (f = 0.1 Hz) ................................ –80 V to +8 V
250 ns (f = 0.1 Hz) .......................... –90 V to +12 V
Current from A(TIP) or B(RING).....................±150 mA
RINGOUT/RYOUT1,2 current............................50 mA
RINGOUT/RYOUT1,2 voltage .............. BGND to +7 V
VBAT1, VBAT2 .........................................–15 V to –58 V
AGND...................................................................... 0 V
BGND with respect to
AGND ................................... –100 mV to +100 mV
Load resistance on VTX to ground .............. 20 kΩ min
*The operating ranges define those limits between which the
functionality of the device is guaranteed.
* Functionality of the device from 0°C to +70°C is guaranteed
by production testing. Performance from –40°C to +85°C is
guaranteed by characterization and periodic sampling of
production units.
RINGOUT/RYOUT1,2 transient .......... BGND to +10 V
DA and DB inputs
Voltage on ring-trip inputs ..................... VBAT to 0 V
Current into ring-trip inputs .........................±10 mA
C3–C1 and D2–D1
Input voltage .........................–0.4 V to VCC + 0.4 V
Maximum power dissipation, continuous,
TA = 70°C, No heat sink (See note)
In 44-pin TQFP package................................1.4 W
Thermal Data:................................................................ θJA
In 44-pin TQFP package....................... 52°C/W typ
ESD immunity/pin (HBM) ..................................1500 V
Note: Thermal limiting circuitry on-chip will shut down the circuit at a junction temperature of about 165°C. The device
should never see this temperature and operation above 145°C
junction temperature may degrade device reliability.
Stresses above those listed under Absolute Maximum
Ratings may cause permanent device failure. Functionality
at or above these limits is not implied. Exposure to
absolute maximum ratings for extended periods may affect
device reliability.
SLIC Products
5
ELECTRICAL CHARACTERISTICS
Description
Test Conditions (see Note 1)
Min
Typ
Max
Unit
Note
dB
1, 4
20
Ω
4
+50
mV
Transmission Performance
2-wire return loss
200 Hz to 3.4 kHz
26
Analog output (VTX) impedance
1
Analog (VTX) output offset voltage
–50
Overload level, 2-wire
Active state
2.5
Vpk
2a
Overload level
On hook, RLAC = 600 Ω
0.77
Vrms
2b
THD, Total Harmonic Distortion
0 dBm
+7 dBm
dB
5
THD, On hook
0 dBm, RLAC = 600 Ω
–64
–55
–50
–40
–36
Longitudinal Capability (See Test Circuit D)
Longitudinal to metallic L-T, L-4
200 Hz to 1 kHz
Longitudinal to metallic L-T, L-4
1 kHz to 3.4 kHz
Normal Polarity
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
Reverse Polarity
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
Normal Polarity
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
Reverse Polarity
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
-2,-4
-2,-4
-1,-3
-1,-3
63
58
52
50
-2
-1
-1
54
52
50
-2,-4
-2,-4
-1,-3
-1,-3
58
53
52
50
-2
-1
-1
53
52
50
4
4
4
4
dB
Longitudinal signal generation 4-L
200 Hz to 3.4 kHz
40
Longitudinal current per pin (A or B)
Active state
17
Longitudinal impedance at A or B
0 to 100 Hz
4
4
4
4
27
mArms
8
25
Ω/pin
4
Idle Channel Noise
C-message weighted noise
RL = 600 Ω
RL = 600 Ω
0°C to +70°C
–40°C to +85°C
7
+10
+12
dBrnc
Psophometric weighted noise
RL = 600 Ω
RL = 600 Ω
0°C to +70°C
–40°C to +85°C
–83
–80
–78
dBmp
4
Insertion Loss and Balance Return Signal (See Test Circuits A and B)
Gain accuracy
4- to 2-wire
0 dBm, 1 kHz
–0.20
0
+0.20
3
Gain accuracy
2- to 4-wire, 4- to 4-wire
0 dBm, 1 kHz
–6.22
–6.02
–5.82
3
Gain accuracy, 4- to 2-wire
On hook
–0.35
Gain accuracy, 2- to 4-wire, 4- to 4-wire On hook
–6.37
Gain accuracy over frequency
300 to 3.4 kHz
relative to 1 kHz
–0.15
+0.15
Gain tracking
+3 dBm to –55 dBm
relative to 0 dBm
–0.15
+0.15
3,4
Gain tracking
On hook
0 dBm to –37 dBm
+3 dBm to 0 dBm
–0.15
–0.35
+0.15
+0.35
3,4
Group delay
0 dBm, 1 kHz
6
Am7926 Data Sheet
+0.35
–6.02
4
–5.67
3,4
dB
µs
3
4, 7
ELECTRICAL CHARACTERISTICS (continued)
Description
Test Conditions (See Note 1)
Min
Typ
Max
22.5
24.5
26.5
22.5
Unit
Note
Line Characteristics
IL, Short Loops, Active state
RLDC = 600 Ω
IL, Long Loops, Active state
RLDC = 2010 Ω, VBAT = –50 V
20
BAT – 3 V
IL = ------------------------------R L + 400
16
IL, Accuracy, Standby state
T A = 25°C
Constant-current region
mA
18
30
ILLIM
Active, A and B to ground
75
120
VDC Accuracy
VDC = |VAB| /20
Ri = 300 to 1500 Ω
0.053
0.055
0.057
VAB, Open Circuit voltage
VBAT = VBAT1, VBAT2 = –50 V
42.75
44
IA, Leakage, Tip Open state
RL = 0
IB, Current, Tip Open state
B to GND
VA, Active
RA to BAT = 7 kΩ, RB to GND = 100 Ω
VS, Act/Nor IL = 25 mA
VS, Pol–Rev IL = 25 mA
VBAT = VS –2.4 V
VS, Max Load
15
30
–7.5
–5
9
V
100
µA
56
mA
V
VB–0.5 VB–1.1
VB–1.7
VA–0.5 VA–1.1
VA–1.7
–20
mA
100
4
V
µA
4
dB
5
kΩ
4
Power Supply Rejection Ratio
VCC
50 Hz to 3.4 kHz
(VRIPPLE = 100 mVrms)
30
40
VBAT
50 Hz to 3.4 kHz
off-hook constant current
(VRIPPLE = 500 mVpp)
28
50
Effective internal resistance
CAS pin to VBAT
85
170
255
45
60
Power Dissipation
On hook, Standby state
On hook, Active state
130
170
Off hook, Standby state
RL = 600 Ω
860
1200
Off hook, Active state
RL = 600 Ω, VBAT = – (|VAB| + 6.5 V)
230
320
ICC,
On-hook VCC supply current
Standby state
Active state
2.3
4.25
3.2
6.0
IBAT,
On-hook VBAT supply current
Standby state
Active state
0.65
2.0
0.9
3.0
mW
Supply Currents
mA
RFI Rejection
RFI rejection
100 kHz to 30 MHz, (See Figure F)
1.0
mVrms
4
Receive Summing Node (RSN)
RSN DC voltage
IRSN = 0 mA
0
RSN impedance
200 Hz to 3.4 kHz
10
V
20
Ω
4
Logic Inputs (C3–C1 and D2–D1)
VIH, Input High voltage (except C3)
2.0
VIH, C3
2.5
VIL, Input Low voltage
V
0.8
IIH, Input High current
–75
IIL, Input Low current
–400
40
µA
Logic Output (DET)
VOL, Output Low voltage
IOUT = 0.3 mA, 15 kΩ to VCC
VOH, Output High voltage
IOUT = –0.1 mA, 15 kΩ to VCC
SLIC Products
0.40
2.4
V
7
ELECTRICAL CHARACTERISTICS (continued)
Description
Test Conditions (See Note 1)
Min
Typ
Max
Unit
–500
–50
Source resistance = 2 MΩ
–50
0
+50
On threshold
RD = 35.4 kΩ
9.4
11.7
14.0
Off threshold
RD = 35.4 kΩ
8.8
10.4
12.0
mA
Hysteresis
RD = 35.4 kΩ
IGK, Ground-key detector threshold
RL from BX to GND
Active, Standby, and Tip open
9
13
mA
+0.3
+0.7
V
100
µA
Note
Ring-Trip Detector Input (DA, DB)
Bias current
Offset voltage
nA
mV
Loop Detector
1.3
5
Relay Driver Output (RINGOUT, RYOUT1, RYOUT2)
On voltage
IOL = 40 mA
Off leakage
VOH = +5 V
Zener breakover
IZ = 100 µA
Zener On voltage
IZ = 30 mA
6
7.2
8
RELAY DRIVER SCHEMATICS
RINGOUT
BGND
8
RYOUT1, RYOUT2
BGND
Am7926 Data Sheet
V
6
Notes:
1. Unless otherwise noted, test conditions are VBAT1 = VBAT2 = –52 V, VCC = +5 V, RL = 600 Ω, RDC1 = RDC2 = 13.02K, RD =
35.4 kΩ, no fuse resistors, CHP = 0.22 µF, CDC = 0.33 µF, CCAS = 0.33 µF, D1 = 1N400x, two-wire AC input impedance is a
600 Ω resistance synthesized by the programming network shown below.
VTX
RT1 = 75 kΩ
CT1 = 120 pF
RT2 = 75 kΩ
RSN
RRX = 150 kΩ
VRX
2. a. Overload level is defined when THD = 1%.
b. Overload level is defined when THD = 1.5%.
3. Balance return signal is the signal generated at VTX by VRX. This specification assumes that the two-wire, AC-load impedance
matches the programmed impedance.
4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests.
5. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization.
6. Tested with 0 Ω source impedance. 2 MΩ is specified for system design only.
7. Group delay can be greatly reduced by using a ZT network such as that shown in Note 1. The network reduces the group
delay to less than 2 µs and increases 2WRL. The effect of group delay on linecard performance also may be compensated
for by synthesizing complex impedance with the QSLAC™ or DSLAC™ device.
8. Minimum current level guaranteed not to cause a false loop detect.
9. VDC/VAB
Table 1.
SLIC Decoding
State
C3
C2
C1
Two-Wire Status
DET Output
0
0
0
0
Reserved
X
1
0
0
1
Reserved
X
2
0
1
0
Active Polarity Reversal
Loop detector
3
0
1
1
Tip Open
Ground Key*
4
1
0
0
Open Circuit
Ring trip
5
1
0
1
Ringing
Ring trip
6
1
1
0
Active
Loop detector
7
1
1
1
Standby
Loop detector
*Ground key selection in Tip Open is automatic. If longitudinal current is greater than 9 mA in
Active, Standby, or Tip Open, the DET will go low. Therefore, if in Active or Standby, DET may
be an indication of off hook, ground key, or both.
SLIC Products
9
Table 2.
Z T = 250 ( Z 2WIN – 2 R F )
Z RX
ZL
500 Z T
= ------------ • ---------------------------------------------------G 42L
Z T + 250 ( Z L + 2 R F )
625 R DC1 + R DC2 = -------------I LOOP
User-Programmable Components
ZT is connected between the VTX and RSN pins. The fuse
resistors are RF, and Z2WIN is the desired 2-wire AC input
impedance. When computing ZT, the internal current amplifier
pole and any external stray capacitance between VTX and
RSN must be taken into account.
ZRX is connected from VRX to RSN. ZT is defined above, and
G42L is the desired receive gain.
RDC1, RDC2, and CDC form the network connected to the RDC
pin. RDC1 and RDC2 are approximately equal. ILOOP is the
desired loop current in the constant-current region.
R DC1 + R DC2
C DC = 1.5 ms • ---------------------------------R DC1 • R DC2
390
355
msRD ON = ---------- , RD OFF = ---------- , C D = 0.5
---------------IT
IT
RD
C CAS
1
= -----------------------------5
3.4 • 10 π f c
V BAT – 3 V
I STANDBY = --------------------------------400 Ω + R L
10
RD and CD form the network connected from RD to AGND/
DGND and IT is the threshold current between on hook and
off hook.
CCAS is the regulator filter capacitor and fc is the desired filter
cut-off frequency.
Standby loop current (resistive region).
Am7926 Data Sheet
DC Characteristics
VAB
50
45
40
35
30
25
20
15
10
5
0
0
5
10
15
20
25
30
IL (ma)
Notes:
1. Constant current region:
2. Battery tracking anti-sat (off hook):
3. Battery tracking anti-sat (on hook):
625
V AB = I L R L' = ------------ R L' , where R L' = R L + 2 R F
R DC
a)
VAB ≤ 41.6 V
VAB = |VBAT| -2.0 -IL(RDC/138)
b)
VAB ≥ 41.6 V
VAB = .8|VBAT| + 6.73 - IL(RDC/172)
a)
VAB ≤ 41.6 V
VAB = |VBAT| -5.3 - IL(RDC/138)
b)
VAB ≥ 41.6 V
VAB = .8|VBAT| + 4.08 - IL(RDC/172)
a. Load Line (Typical)
SLIC Products
11
DC FEED CHARACTERISTICS (continued)
A (TIP)
RL
I
L
SLIC
RSN
RDC1
RDC2
B (RING)
RDC
Feed current programmed by RDC1 and RDC2
b. Feed Programming
Figure 1. DC Feed Characteristics
12
Am7926 Data Sheet
CDC
TEST CIRCUITS
A(TIP)
RL
2
VTX
SLIC
VAB
VL
RT
AGND
RL
RRX
2
RSN
B(RING)
IL2-4 = 20 log (VTX / VAB)
A. Two- to Four-Wire Insertion Loss
A(TIP)
VTX
SLIC
VAB
RL
AGND
RT
RRX
B(RING) RSN
VRX
IL4-2 = 20 log (VAB / VRX)
BRS = 20 log (VTX / VRX)
B. Four- to Two-Wire Insertion Loss and Balance Return Signal
1
ωC
A(TIP)
<< RL
S1
SLIC
2
C
VL
VL
VTX
RL
VAB
AGND
RT
RL
S2
2
B(RING)
RRX
RSN
VRX
S2 Open, S1 Closed
L-T Long. Bal. = 20 log (VAB / VL)
L-4 Long. Bal. = 20 log (VTX / VL)
S2 Closed, S1 Open
4-L Long. Sig. Gen. = 20 log (VL / VRX)
C. Longitudinal Balance
SLIC Products
13
TEST CIRCUITS (continued)
ZD
A(TIP)
R
VTX
RT1
SLIC
VS
VM
AGND
R
ZIN
CT1
RT2
B(RING)
RSN
ZD: The desired impedance;
e.g., the characteristic impedance of the line
RRX
Return loss = –20 log (2 VM / VS)
D. Two-Wire Return Loss Test Circuit
C1
L1
200 Ω
50 Ω
A
RF1
200 Ω
RF2
B
HF
GEN
50 Ω
50 Ω
C2
L2
CBX
33 nF
VTX
SLIC
under test
1.5 Vrms
80% Amplitude
Modulated
100 kHz to 30 MHz
E. RFI Test Circuit
14
CAX
33 nF
Am7926 Data Sheet
+5 V
VCC
DA
DB
RD
2.2 nF
A(TIP)
RD
VTX
VTX
A(TIP)
CHP
HPB
B(RING)
B(RING)
RT
HPA
RDC1
VS
RDC
RINGOUT
VDC
RYOUT1
VRX
RSN
2.2 nF
RRX
RDC2
CDC
AGND
RYOUT2
D2
D1
BGND
BATTERY
GROUND
C3
C2
Regulator
or
BAT
D1
VBREF
VBAT1
VBAT2
C1
ANALOG
GROUND
DET
CAS
CCAS
F. Am7926 Test Circuit
SLIC Products
15
APPLICATION CIRCUIT
+5 V
DA
VCC
DB
CD
RD
RD
RF
2.2 nF
CHP
B(RING)
2.2 nF
RTX1
HPA
CTX
HPB
B(RING)
RF
VTX
VTX
A(TIP)
A(TIP)
RTX2
VS
RINGOUT
RRX
RSN
RDC2
RYOUT1
RYOUT2
VRX
RDC1
RDC
CDC
VDC
BATTERY
GROUND
BGND
AGND
Regulator
or
BAT
D1
VBREF
VBAT1
VBAT2
D2
ANALOG
GROUND
D1
C3
C2
C1
DET
CAS
CCAS
F. Am7926 Application Circuit
16
Am7926 Data Sheet
PHYSICAL DIMENSION PQT044
BSC is an ANSI standard for Basic Centering. Dimensions are measured in millimeters.
Dwg rev. AS; 08/00
SLIC Products
17
REVISION SUMMARY
Revision A to Revision A2
•
Updated the Pin Description table to correct inconsistencies.
•
The physical dimension (PQT044) was added to the Physical Dimension section.
•
Added the Connection Diagram on page 3.
Revision A2 to Revision A3
•
Changed 8 V to 6 V in the Distinctive Characteristics section.
•
Added the 32-pin PLCC information to the Ordering Information and Absolute Maximum Ratings sections and
added the connection diagram.
•
In the Electrical Characteristics table:
— Updated the information in the Line Characteristics section on the Long Loops row and the VDC Accuracy row.
— Deleted the Disconnect state information in the Power Dissipation and Supply Currents sections.
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Am7926 Data Sheet
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20
Am7926 Data Sheet