EDI9G361024C 1024K x 36 Static RAM CMOS, High Speed Module FEATURES DESCRIPTION n 1024K x 36 bit CMOS Static The EDI9G361024C is a high speed 36Mb Static RAM module organized as 1024K words by 36 bits. This module is constructed from nine 1024K x 4 Static RAMs in SOJ packages on an epoxy laminate (FR4) board. n Random Access Memory Access Times: 15, 20 and 25 Individual Byte Selects Four chip enables (E1-E4) are used to independently enable the four bytes. Reading or writing can be executed on individual bytes or any combination of multiple bytes through proper use of chip enables. Fully Static, No Clocks TTL Compatible I/O n High Density Package The EDI9G361024C is offered in a 72 lead SIMM package, which enables 36Mb of memory to be placed in less than 1.3 square inches of board space. 72 lead SIMM, No. 401 (Angle) Common Data Inputs and Outputs All inputs and outputs are TTL compatible and operate from a single 5V supply. Fully asynchronous circuitry requires no clocks or refreshing for operation and provides equal access and cycle times for ease of use. n Single +5V (±10%) Supply Operation PIN NAMES FIG. 1 PIN CONFIGURATIONS AND BLOCK DIAGRAM NC NC DQ34 DQ35 VSS DQ32 DQ33 DQ0 DQ8 DQ1 DQ9 DQ2 DQ10 DQ3 DQ11 VCC A0 A7 A1 A8 A2 A9 DQ12 DQ4 DQ13 DQ5 DQ14 DQ6 DQ15 DQ7 VSS W\ A15 A14 E2\ E1\ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 E4\ E3\ A17\ A16\ G\ VSS DQ24 DQ16 DQ25 DQ17 DQ26 DQ18 DQ27 DQ19 A3 A10 A4 A11 A5 A12 VCC A13 A6 DQ20 DQ28 DQ21 DQ29 DQ22 DQ30 DQ23 DQ31 VSS A18 A19 NC NC 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 AØ-A19 Address Inputs E1-E4 Chip Enables W Write Enable G Output Enable DQØ-DQ35 Common Data Input/Output VCC Power (+5V±10%) VSS Ground NC No Connection A0-A19 W\ G\ U1 DQ0-DQ3 U2 DQ4-DQ7 E1\ U3 DQ8-DQ11 E2\ U4 DQ12-DQ15 U5 DQ16-DQ19 E3\ U6 DQ20-DQ23 U7 DQ24-DQ27 U8 DQ28-DQ31 E4\ U9 DQ32-DQ35 E1\ 9G3610242C Pin Config. 9G361024C Blk Dia. Aug. 2002 Rev. 1A ECO #15432 1 White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com EDI9G361024C RECOMMENDED DC OPERATING CONDITIONS ABSOLUTE MAXIMUM RATINGS* Voltage on any pin relative to VSS Operating Temperature TA (Ambient) Commercial Industrial Storage Temperature, Plastic Power Dissipation Output Current Parameter Supply Voltage Supply Voltage Input High Voltage Input Low Voltage -0.5V to 7.0V 0°C to +70°C -40°C to +85°C -55°C to +125°C 11.6 Watts 20 mA *Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Sym VCC VSS VIH VIL Min 4.5 0 2.2 -0.3 Typ 5.0 0 --- Max 5.5 0 6.0 0.8 Units V V V V AC TEST CONDITIONS Input Pulse Levels Input Rise and Fall Times Input and Output Timing Levels Output Load VSS to 3.0V 5ns 1.5V 1TTL, CL = 30pF (note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF) DC ELECTRICAL CHARACTERISTICS Parameter Operating Power Supply Current Standby (TTL) Power Supply Current Full Standby Power Supply Current CMOS Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage Sym ICC1 ICC2 ICC3 ILI ILO VOH VOL Conditions W, E = VIL, II/O = 0mA, Min Cycle E > VIH, VIN < VIL or VIN > VIH E > VCC-0.2V VIN > VCC-0.2V or VIN < 0.2V VIN = 0V to VCC V I/O = 0V to VCC IOH = -4.0mA IOL = 8.0mA Min Typ Max 1440 540 90 Units mA mA mA --2.4 -- ----- ±80 ±20 -0.4 µA µA V V *Typical: TA = 25°C, VCC = 5.0V CAPACITANCE TRUTH TABLE E H L L W X H L G X L X L H H Mode Standby Read Write Output Deselect (f=1.0MHz, VIN=VCC or VSS) Output HIGH Z DOUT DIN Power ICC2/ICC3 ICC1 ICC1 HIGH Z ICC1 White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com Parameter Address Lines Data Lines Chip Enable Line Write Line Sym CI CD/Q CC CN Max 60 20 20 60 Unit pF pF pF pF These parameters are sampled, not 100% tested. 2 Aug. 2002 Rev. 1A ECO #15432 EDI9G361024C AC CHARACTERISTICS READ CYCLE Symbol JEDEC Alt. TAVAV TRC TAVQV TAA TELQV TACS TELQX TCLZ TEHQZ TCHZ TAVQX TOH TGLQV TOE TGLQX TOLZ TGHQZ TOHZ Parameter Read Cycle Time Address Access Time Chip Enable Access Chip Enable to Output in Low Z (1) Chip Disable to Output in High Z (1) Output Hold from Address Change Output Enable to Output Valid Output Enable to Output in Low Z (1) Output Disable to Output in High Z(1) 15ns Min Max 15 15 15 3 7 3 8 0 7 20ns Min Max 20 20 20 3 10 3 8 0 8 Min 25 25ns Max 25 25 3 12 3 10 0 10 Units ns ns ns ns ns ns ns ns ns Note 1: Parameter guaranteed, but not tested. FIG. 2 READ CYCLE 1 - W HIGH, G, E LOW TAVAV A ADDRESS 1 ADDRESS 2 TAVQV TAVQX Q DATA 2 DATA 1 9G361024C Rd Cyc1 FIG. 3 READ CYCLE 2 - W HIGH TAVAV A TAVQV E TELQV TEHQZ TELQX G TGLQV TGHQZ TGLQX Q 9G361024C Rd Cyc2 Aug. 2002 Rev. 1A ECO #15432 3 White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com EDI9G361024C AC CHARACTERISTICS WRITE CYCLE Symbol JEDEC Alt. TAVAV TWC TELWH TCW TWLEH TCW TAVWL TAS TAVEL TAS TAVWH TAW TAVEH TAW TWLWH TWP TELEH TWP TWHAX TWR TEHAX TWR TWHDX TDH TEHDX TDH TWLQZ TWHZ TDVWH TDW TDVEH TDW TWHQX TWLZ Parameter Write Cycle Time Chip Enable to End of Write Address Setup Time Address Valid to End of Write Write Pulse Width Write Recovery Time Data Hold Time Write to Output in High Z (1) Data to Write Time Output Active from End of Write (1) 15ns Min Max 15 12 12 0 0 12 12 12 12 0 0 3 3 0 8 10 10 3 20ns Min Max 20 15 15 0 0 15 15 15 15 0 0 3 3 0 8 12 12 3 Min 25 20 20 0 0 20 20 20 20 0 0 0 0 0 15 15 3 25ns Max Units ns ns ns ns ns ns ns ns ns ns ns ns ns 12 ns ns ns ns Note 1: Parameter guaranteed, but not tested. FIG. 4 WRITE CYCLE 1 - W CONTROLLED TAVAV A E TELWH TWHAX TAVWH TWLWH W TAVWL TDVWH D TWHDX DATA VALID TWHQX TWLQZ HIGH Z Q 9G361024C Write Cyc1 White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com 4 Aug. 2002 Rev. 1A ECO #15432 EDI9G361024C FIG. 5 WRITE CYCLE 2 - E CONTROLLED TAVAV A TAVEL TELEH E TAVEH TEHAX TWLEH W TDVEH D TEHDX DATA VALID HIGH Z Q 9G361024C Write Cyc2 ORDERING INFORMATION Part Number EDI9G361024C15MNC EDI9G361024C20MNC EDI9G361024C25MNC Speed (ns) 15 20 25 Package No. 402 402 402 PACKAGE DESCRIPTION PACKAGE NO. 402: 72 LEAD SIMM 4.250 3.984 0.360 MAX. 0.125 DIA. (2x) 0.250 1.045 MAX. 0.400 P1 0.050 TYP. 0.250 3.750 1.992 2.045 0.125 MIN. 0.225 MIN. 0.062 R. (2x) P1 9G361024C Pkg. ALL DIMENSIONS ARE IN INCHES Aug. 2002 Rev. 1A ECO #15432 5 White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com