ETC CS4121/D

CS4121
Low Voltage Precision
Air-Core Tach/Speedo
Driver
The CS4121 is specifically designed for use with air–core meter
movements. The IC provides all the functions necessary for an analog
tachometer or speedometer. The CS4121 takes a speed sensor input
and generates sine and cosine related output signals to differentially
drive an air–core meter.
Many enhancements have been added over industry standard
tachometer drivers such as the CS289 or LM1819. The output utilizes
differential drivers which eliminates the need for a zener reference
and offers more torque. The device withstands 60 V transients which
decreases the protection circuitry required. The device is also more
precise than existing devices allowing for fewer trims and for use in a
speedometer.
The CS4121 is compatible with the CS8190, and provides higher
accuracy at a lower supply voltage (8.0 V min. as opposed to 8.5 V). It
is functionally operational to 6.5 V.
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20
16
1
1
SO–20L
DWF SUFFIX
CASE 751D
DIP–16
NF SUFFIX
CASE 648
PIN CONNECTIONS AND
MARKING DIAGRAM
DIP–16
1
16
CP+
Features
• Direct Sensor Input
• High Torque Output
• Low Pointer Flutter
• High Input Impedance
• Overvoltage Protection
• Accurate to 8.0 V Functional to 6.5 V (typ)
• Internally Fused Leads in SO–20 Package and DIP–16
CP–
F/VOUT
VREG
CS–4121
0002SB001
AWLYYWW
SQOUT
FREQIN
GND
GND
COS+
COS–
GND
GND
SIN+
SIN–
VCC
BIAS
1
A
WL, L
YY, Y
WW, W
SO–20L
CS–4121
AWLYYWW
CP+
SQOUT
FREQIN
GND
GND
GND
GND
COS+
COS–
VCC
20
CP–
F/VOUT
VREG
GND
GND
GND
GND
SIN+
SIN–
BIAS
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION
Device
 Semiconductor Components Industries, LLC, 2001
April, 2001 – Rev. 7
1
Package
Shipping
CS4121EDWF20
SO–20L
37 Units/Rail
CS4121EDWFR20
SO–20L
1000 Tape & Reel
CS4121ENF16
DIP–16
25 Units/Rail
Publication Order Number:
CS4121/D
CS4121
BIAS
Charge Pump
CP+
F/VOUT
+
-
CP–
SQOUT
VREG
+
-
FREQIN
Voltage
Regulator
GND
GND
VREG
7.0 V
GND
GND
SINE+
COS+
COS
Output
+
+
Func.
Gen.
+
-
+
-
SINE
Output
SINE–
COS–
High Voltage
Protection
VCC
Figure 1. Block Diagram
ABSOLUTE MAXIMUM RATINGS*
Rating
Value
Unit
60
24
V
V
Operating Temperature (TJ)
–40 to +105
°C
Storage Temperature
–40 to +165
°C
Junction Temperature
–40 to +150
°C
4.0
kV
260 peak
230 peak
°C
°C
Supply Voltage, VCC
< 100 ms Pulse Transient
Continuous
ESD (Human Body Model)
Lead Temperature Soldering:
Wave Solder (through hole styles only) (Note 1.)
Reflow: (SMD styles only) (Note 2.)
1. 10 seconds maximum.
2. 60 second maximum above 183°C.
*The maximum package power dissipation must be observed.
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2
CS4121
ELECTRICAL CHARACTERISTICS (–40°C ≤ TA ≤ 85°C, 8.0 V ≤ VCC ≤ 16 V, unless otherwise specified.)
Characteristic
Test Conditions
Min
Typ
Max
Unit
–
50
125
mA
–
8.0
13.1
16
V
Positive Input Threshold
–
1.0
2.0
3.0
V
Input Hysteresis
–
200
500
–
mV
–
–10
–80
µA
0
–
20
kHz
–1.0
–
VCC
V
Supply Voltage Section
ICC Supply Current
VCC = 16 V, –40°C, No Load
VCC Normal Operation Range
Input Comparator Section
Input Bias Current (Note 3.)
0 V ≤ VIN ≤ 8.0 V
Input Frequency Range
–
Input Voltage Range
in series with 1.0 kΩ
Output VSAT
ICC = 10 mA
0
0.15
0.40
V
Output Leakage
VCC = 7.0 V
–
–
10
µA
–
1.0
–
–
V
Output Voltage
–
6.25
7.00
7.50
V
Output Load Current
–
–
–
10
mA
Logic 0 Input Voltage
Voltage Regulator Section
Output Load Regulation
0 to 10 mA
–
10
50
mV
Output Line Regulation
8.0 V ≤ VCC ≤ 16 V
–
20
150
mV
Power Supply Rejection
VCC = 13.1 V, 1.0 VP/P 1.0 kHz
34
46
–
dB
Charge Pump Section
Inverting Input Voltage
–
1.5
2.0
2.5
V
Input Bias Current
–
–
40
150
nA
VBIAS Input Voltage
–
1.5
2.0
2.5
V
–
0.7
1.1
V
–0.10
0.28
+0.70
%
Non Invert. Input Voltage
IIN = 1.0 mA
Linearity (Note 4.)
@ 0, 87.5, 175, 262.5, + 350 Hz
F/VOUT Gain
@ 350 Hz, CCP = 0.0033 µF,
RT = 243 kΩ
7.0
10
13
mV/Hz
Norton Gain, Positive
IIN = 15 µA
0.9
1.0
1.1
I/I
Norton Gain, Negative
IIN = 15 µA
0.9
1.0
1.1
I/I
Function Generator Section: –40C TA 85°C, VCC = 13.1 V unless otherwise noted.
Differential Drive Voltage
(VCOS+ – VCOS–)
8.0 V ≤ VCC ≤ 16 V
Θ = 0°
5.5
6.5
7.5
V
Differential Drive Voltage
(VSIN+ – VSIN–)
8.0 V ≤ VCC ≤ 16 V
Θ = 90°
5.5
6.5
7.5
V
Differential Drive Voltage
(VCOS+ – VCOS–)
8.0 V ≤ VCC ≤ 16 V
Θ = 180°
–7.5
–6.5
–5.5
V
Differential Drive Voltage
(VSIN+ – VSIN–)
8.0 V ≤ VCC ≤ 16 V
Θ = 270°
–7.5
–6.5
–5.5
V
3. Input is clamped by an internal 12 V Zener.
4. Applies to % of full scale (270°).
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CS4121
ELECTRICAL CHARACTERISTICS (continued) (–40°C ≤ TA ≤ 85°C, 8.0 V ≤ VCC ≤ 16 V, unless otherwise specified.)
Characteristic
Test Conditions
Min
Typ
Max
Unit
Function Generator Section: –40C TA 85°C, VCC = 13.1 V unless otherwise noted. (continued)
Differential Drive Current
8.0 V ≤ VCC ≤ 16 V, TA = 25°C
Zero Hertz Output Angle
–
–
33
42
mA
–1.5
0
1.5
deg
Function Generator Error (Note 5.)
Reference Figures 2, 3, 4, 5
VCC = 13.1 V, TA = 25°C
Θ = 0° to 305°
–2.0
0
+2.0
deg
Function Generator Error
13.1 V ≤ VCC ≤ 16 V, TA = 25°C
–2.5
0
+2.5
deg
Function Generator Error
13.1 V ≤ VCC ≤ 11 V, TA = 25°C
–1.0
0
+1.0
deg
Function Generator Error
13.1 V ≤ VCC ≤ 8.0 V, TA = 25°C
–3.0
0
+3.0
deg
Function Generator Error
25°C ≤ TA ≤ 85°C
–3.0
0
+3.0
deg
Function Generator Error
25°C ≤ TA ≤ 105°C
–5.5
0
+5.5
deg
Function Generator Error
–40°C ≤ TA ≤ 25°C
–3.0
0
+3.0
deg
Function Generator Gain
Θ vs F/VOUT, TA = 25°C
60
77
95
°/V
5. Deviation from nominal per Table 1 after calibration at 0° and 270°.
PIN FUNCTION DESCRIPTION
PACKAGE PIN #
DIP–16
SO–20L
PIN SYMBOL
1
1
CP+
2
2
SQOUT
Buffered square wave output signal.
3
3
FREQIN
Speed or RPM input signal.
4, 5, 12, 13
4–7, 14–17
GND
Ground Connections.
6
8
COS+
Positive cosine output signal.
7
9
COS–
Negative cosine output signal.
8
10
VCC
Ignition or battery supply voltage.
9
11
BIAS
Test point or zero adjustment.
10
12
SIN–
Negative sine output signal.
11
13
SIN+
Positive sine output signal.
14
18
VREG
Voltage regulator output.
15
19
F/VOUT
16
20
CP–
FUNCTION
Positive input to charge pump.
Output voltage proportional to input signal frequency.
Negative input to charge pump.
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CS4121
TYPICAL PERFORMANCE CHARACTERISTICS
FVOUT 2.0 V 2.0 FREQ CCP RT (VREG 0.7 V)
6
5
4
3
2
1
0
–1
–2
–3
–4
–5
–6
–7
7
6
COS
F/V Output (V)
Output Voltage (V)
7
5
4
3
2
1
SIN
0
45
90
135
180
225
Degrees of Deflection (°)
270
0
315
0
Figure 2. Function Generator Output Voltage vs.
Degrees of Deflection
135
180
225
270
Frequency/Output Angle (°)
Angle
–7.0 V
7.0 V
Deviation (°)
Θ
1.00
0.75
0.50
0.25
0.00
–0.25
–0.50
(VCOS+) – (VCOS–)
–0.75
–1.00
–1.25
–7.0 V
–1.50
0
Figure 4. Output Angle in Polar Form
45
90
225
135
180
Theoretical Angle (°)
270
Figure 5. Nominal Output Deviation
45
Ideal Angle (Degrees)
40
35
30
25
20
Ideal Degrees
15
Nominal Degrees
10
5
0
0
5
9
13
315
1.50
1.25
7.0 V
SIN VSIN VVCOS
VCOS 90
Figure 3. Charge Pump Output Voltage vs.
Output Angle
(VSINE+) – (VSINE–)
ARCTAN
45
17
25
29
21
Nominal Angle (Degrees)
33
37
Figure 6. Nominal Angle vs. Ideal Angle (After Calibrating at 180)
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5
41
45
315
CS4121
Table 1. Function Generator Output Nominal Angle vs. Ideal Angle (After Calibrating at 270)
Ideal Degrees
Nominal
Degrees
Ideal Degrees
Nominal
Degrees
Ideal Degrees
Nominal
Degrees
Ideal Degrees
Nominal
Degrees
Ideal Degrees
Nominal
Degrees
Ideal Degrees
Nominal
Degrees
0
0
17
17.98
34
33.04
75
74.00
160
159.14
245
244.63
1
1.09
18
18.96
35
34.00
80
79.16
165
164.00
250
249.14
2
2.19
19
19.92
36
35.00
85
84.53
170
169.16
255
254.00
3
3.29
20
20.86
37
36.04
90
90.00
175
174.33
260
259.16
4
4.38
21
21.79
38
37.11
95
95.47
180
180.00
265
264.53
5
5.47
22
22.71
39
38.21
100
100.84
185
185.47
270
270.00
6
6.56
23
23.61
40
39.32
105
106.00
190
190.84
275
275.47
7
7.64
24
24.50
41
40.45
110
110.86
195
196.00
280
280.84
8
8.72
25
25.37
42
41.59
115
115.37
200
200.86
285
286.00
9
9.78
26
26.23
43
42.73
120
119.56
205
205.37
290
290.86
10
10.84
27
27.07
44
43.88
125
124.00
210
209.56
295
295.37
11
11.90
28
27.79
45
45.00
130
129.32
215
214.00
300
299.21
12
12.94
29
28.73
50
50.68
135
135.00
220
219.32
305
303.02
13
13.97
30
29.56
55
56.00
140
140.68
225
225.00
14
14.99
31
30.39
60
60.44
145
146.00
230
230.58
15
16.00
32
31.24
65
64.63
150
150.44
235
236.00
16
17.00
33
32.12
70
69.14
155
154.63
240
240.44
Note: Temperature, voltage and nonlinearity not included.
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CS4121
CIRCUIT DESCRIPTION and APPLICATION NOTES
The CS4121 is specifically designed for use with air–core
meter movements. It includes an input comparator for
sensing an input signal from an ignition pulse or speed
sensor, a charge pump for frequency to voltage conversion,
a bandgap voltage regulator for stable operation, and a
function generator with sine and cosine amplifiers to
differentially drive the meter coils.
From the partial schematic of Figure 7, the input signal is
applied to the FREQIN lead, this is the input to a high
impedance comparator with a typical positive input
threshold of 2.0 V and typical hysteresis of 0.5 V. The output
of the comparator, SQOUT, is applied to the charge pump
input CP+ through an external capacitor CCP. When the
input signal changes state, CCP is charged or discharged
through R3 and R4. The charge accumulated on CCP is
mirrored to C4 by the Norton Amplifier circuit comprising
of Q1, Q2 and Q3. The charge pump output voltage, F/VOUT,
ranges from 2.0 V to 6.3 V depending on the input signal
frequency and the gain of the charge pump according to the
formula:
Ripple voltage on the F/V output causes pointer or needle
flutter especially at low input frequencies.
The response time of the F/V is determined by the time
constant formed by RT and C4. Increasing the value of C4
will reduce the ripple on the F/V output but will also increase
the response time. An increase in response time causes a
very slow meter movement and may be unacceptable for
many applications.
FVOUT 2.0 V 2.0 FREQ CCP RT (VREG 0.7 V)
RT should be a 250 kΩ potentiometer to trim out any
inaccuracies due to IC tolerances or meter movement
pointer placement.
2. Select R3 and R4
Resistor R3 sets the output current from the voltage
regulator. The maximum output current from the voltage
regulator is 10 mA. R3 must ensure that the current does not
exceed this limit.
Choose R3 = 3.3 kΩ
The charge current for CCP is
Design Example
Maximum meter Deflection = 270°
Maximum Input Frequency = 350 Hz
1. Select RT and CCP
970 FREQ CCP RT 270°
Let CT = 0.0033 µF, find RT
RT RT 243 k
RT is a potentiometer used to adjust the gain of the F/V
output stage and give the correct meter deflection. The F/V
output voltage is applied to the function generator which
generates the sine and cosine output voltages. The output
voltage of the sine and cosine amplifiers are derived from the
on–chip amplifier and function generator circuitry. The
various trip points for the circuit (i.e., 0°, 90°, 180°, 270°)
are determined by an internal resistor divider and the
bandgap voltage reference. The coils are differentially
driven, allowing bidirectional current flow in the outputs,
thus providing up to 305° range of meter deflection. Driving
the coils differentially offers faster response time, higher
current capability, higher output voltage swings, and
reduced external component count. The key advantage is a
higher torque output for the pointer.
The output angle, Θ, is equal to the F/V gain multiplied by
the function generator gain:
VREG 0.7 V
1.90 mA
3.3 k
CCP must charge and discharge fully during each cycle of
the input signal. Time for one cycle at maximum frequency
is 2.85 ms. To ensure that CCP is charged, assume that the
(R3 + R4) CCP time constant is less than 10% of the
minimum input period.
T 10% AFV AFG,
AFG 77°V(typ)
The relationship between input frequency and output
angle is:
AFG 2.0 FREQ CCP RT (VREG 0.7 V)
970 FREQ CCP RT
C4 The ripple voltage at the F/V converter’s output is
determined by the ratio of CCP and C4 in the formula:
V 1
285 s
350 Hz
Choose R4 = 1.0 kΩ.
Discharge time: tDCHG = R3 × CCP = 3.3 kΩ × 0.0033 µF
= 10.9 µs
Charge time: tCHG = (R3 + R4)CCP = 4.3 kΩ. × 0.0033 µF
= 14.2 µs
3. Determine C4
C4 is selected to satisfy both the maximum allowable
ripple voltage and response time of the meter movement.
where:
or,
270°
970 350 Hz 0.0033 F
CCP(VREG 0.7 V)
VMAX
With C4 = 0.47 µF, the F/V ripple voltage is 44 mV.
CCP(VREG 0.7 V)
C4
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7
CS4121
VREG
2.0 V
F/VOUT
+
R3
–
0.25 V
+
SQOUT
FREQIN
VC(t)
Q3
CP–
RT
–
R4
CCP
CP+
C4
+
Q1
QSQUARE
Q2
–
2.0 V
Figure 7. Partial Schematic of Input and Charge Pump
T
tDCHG
tCHG
VCC
FREQIN 0
VREG
SQOUT
F to V
0
ICP+
600 mV
VCP+
0
–0.3 V
Figure 8. Timing Diagram of FREQIN and ICP
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CS4121
R3
R4
CCP
0.0033 µF
± 30 PPM/°C
3.0 kΩ
Speedo Input
1 CP+
1.0 kΩ
CP–
F/VOUT
SQOUT
R2
0.1 µF
CS4121
C3
GND
GND
Battery
R1
3.9,
D1
1.0 A 500 mW
600 PIV
GND
D2
50 V,
500 mW
Zener
Trim Resistor
RT ± 20 PPM/°C
243 kΩ
GND
GND
COS+
SINE+
COS–
SINE–
BIAS
VCC
0.1 µF
+
0.47 µF
VREG
FREQIN
10 kΩ
C4
C1
COSINE
SINE
Air Core
Gauge
200 Ω
Speedometer
Notes:
1. For 58% Speed Input TMAX ≤ 5.0/fMAX where
TMAX = CCP (R3 + R4)
fMAX = maximum speed input frequency
2. The product of C4 and RT have a direct effect on gain and therefore directly affect temperature compensation.
3. CCP Range; 20 pF to 0.2 µF.
4. RT Range; 100 kΩ to 500 kΩ.
5. The Ic must be protected from transients above 60 V and reverse battery conditions.
6. Additional filtering on FREQIN lead may be required.
7. Gauge coil connections to the IC must be kept as short as possible (≤ 3.0 inch) for best pointer stability.
Figure 9. Speedometer or Tachometer Application
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CS4121
R4
R3
Speedo
Input
3.0 kΩ
CCP
0.0033 µF
± 30 PPM/°C
1.0 kΩ
1
CP+
CP–
F/VOUT
SQOUT
R2
0.1 µF
CS4121
C3
GND
GND
Battery
R1
3.9,
D1
1.0 A 500 mW
600 PIV
COS–
SINE–
BIAS
COSINE
SINE
Air Core
Gauge
200 Ω
C2
Trim Resistor
± 20 PPM/°C
243 kΩ
GND
COS+
C1
0.1 µF
GND
RT
GND
SINE+
VCC
D2
50 V,
500 mW
Zener
0.47 µF
VREG
FREQIN
10 kΩ
C4 +
Speedometer
1
CS8441
Air Core
Stepper
Motor
200 Ω
Notes:
Odometer
1. The product of C4 and RT have a direct effect on gain and therefore directly affect temperature compensation.
2. CCP Range; 20 pF to 0.2 µF.
3. RT Range; 100 kΩ to 500 kΩ.
4. The Ic must be protected from transients above 60 V and reverse battery conditions.
5. Additional filtering on FREQIN lead may be required.
6. Gauge coil connections to the IC must be kept as short as possible (≤ 3.0 inch) for best pointer stability.
Figure 10. Speedometer With Odometer or Tachometer Application
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CS4121
PACKAGE DIMENSIONS
DIP–16
NF SUFFIX
CASE 648–08
ISSUE R
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
–A–
16
9
1
8
B
F
C
DIM
A
B
C
D
F
G
H
J
K
L
M
S
L
S
–T–
SEATING
PLANE
K
H
G
D
M
J
16 PL
0.25 (0.010)
T A
M
M
INCHES
MIN
MAX
0.740
0.770
0.250
0.270
0.145
0.175
0.015
0.021
0.040
0.70
0.100 BSC
0.050 BSC
0.008
0.015
0.110
0.130
0.295
0.305
0
10 0.020
0.040
MILLIMETERS
MIN
MAX
18.80
19.55
6.35
6.85
3.69
4.44
0.39
0.53
1.02
1.77
2.54 BSC
1.27 BSC
0.21
0.38
2.80
3.30
7.50
7.74
0
10 0.51
1.01
SO–20L
DWF SUFFIX
CASE 751D–05
ISSUE F
20
11
X 45 h
1
10
20X
B
B
0.25
DIM
A
A1
B
C
D
E
e
H
h
L
M
T A
S
B
S
A
L
H
M
E
0.25
10X
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION SHALL
BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT
MAXIMUM MATERIAL CONDITION.
A
B
M
D
18X
e
A1
SEATING
PLANE
MILLIMETERS
MIN
MAX
2.35
2.65
0.10
0.25
0.35
0.49
0.23
0.32
12.65
12.95
7.40
7.60
1.27 BSC
10.05
10.55
0.25
0.75
0.50
0.90
0
7
C
T
PACKAGE THERMAL DATA
DIP–16
Parameter
SO–20L
Unit
RΘJC
Typical
15
9
°C/W
RΘJA
Typical
50
55
°C/W
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11
CS4121
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
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