CHERRY CS4121

CS4121
CS4121
Low Voltage Precision Air-Core
Tach/Speedo Driver
Description
The CS4121 is specifically designed
for use with air-core meter movements. The IC provides all the functions necessary for an analog
tachometer or speedometer. The
CS4121 takes a speed sensor input
and generates sine and cosine related output signals to differentially
drive an air-core meter.
Features
inates the need for a zener reference
and offers more torque. The device
withstands 60V transients which
decreases the protection circuitry
required. The device is also more
precise than existing devices allowing for fewer trims and for use in a
speedometer.
Many enhancements have been
added over industry standard
tachometer drivers such as the
CS289 or LM1819. The output utilizes differential drivers which elim-
The CS4121 is compatible with the
CS8190, and provides higher accuracy at a lower supply voltage (8.0V
min. as opposed to 8.5V). It is functionally operational to 6.5V.
■
■
■
■
■
■
Direct Sensor Input
High Torque Output
Low Pointer Flutter
High Input Impedance
Overvoltage Protection
Accurate to 8V
Functional to 6.5V (typ)
Package Options
16 Lead PDIP
(internally fused leads)
Absolute Maximum Ratings
Supply Voltage (<100ms pulse transient)..........................................VCC = 60V
(continuous) ..............................................................VCC = 24V
Operating Temperature .............................................................Ð40¡C to +105¡C
Storage Temperature..................................................................Ð40¡C to +165¡C
Junction Temperature .................................................................Ð40¡C to+150¡C
ESD (Human Body Model) .............................................................................4kV
Lead Temperature Soldering
Wave Solder (through hole styles only)............10 sec. max, 260¡C peak
Reflow (SMD styles only).............60 sec. max above 183¡C, 230¡C peak
CP+
1
16
CP-
SQOUT
2
15
F/VOUT
FREQIN
3
14
VREG
Gnd
4
13
Gnd
Gnd
5
12
Gnd
COS+
6
11
SINE+
COS-
7
10
SINE-
VCC
8
9
BIAS
Block Diagram
BIAS
FREQIN
Charge Pump
F/VOUT
Ð
SQOUT
+
CP+
CPInput
Comp.
+
VREG
Voltage
Regulator
Ð
Gnd
COS+
Ð
+
COS
Output
+
Ð
Ð
COS-
VCC
19
F/VOUT
FREQIN
3
18
VREG
17
Gnd
16
Gnd
Gnd
Gnd 6
15
Gnd
Gnd
7
14
Gnd
COS+ 8
13
SIN+
COS- 9
12
SIN-
VCC 10
11
BIAS
SINE
Output
+
CP-
2
Gnd 5
+
Func.
Gen.
CP+ 1
Gnd 4
SINE+
Ð
20
SQOUT
Gnd
VREG
7.0V
Gnd
20 Lead SOIC
(internally fused leads)
SINEHigh Voltage
Protection
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: [email protected]
Web Site: www.cherry-semi.com
Rev 12/4/96
1
A
¨
Company
CS4121
Electrical Characteristics: -40¡C ² TA ² 85¡C, 8.0V ² VCC ² 16V unless otherwise specified.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
50
125
mA
8.0
13.1
16.0
V
Positive Input Threshold
1.0
2.0
3.0
V
Input Hysteresis
200
500
■ Supply Voltage Section
ICC Supply Current
VCC = 16V, -40¡C, No Load
VCC Normal Operation Range
■ Input Comparator Section
Input Bias Current *
0V ² VIN ² 8V
-10
Input Frequency Range
Input Voltage Range
in series with 1k½
Output VSAT
ICC = 10mA
Output Leakage
VCC = 7V
-80
µA
0
20
kHz
-1
VCC
V
0.15
Logic 0 Input Voltage
mV
0.40
V
10
µA
1
V
*Note: Input is clamped by an internal 12V Zener.
■ Voltage Regulator Section
Output Voltage
6.25
7.00
Output Load Current
7.50
V
10
mA
Output Load Regulation
0 to 10 mA
10
50
mV
Output Line Regulation
8.0V ² VCC ² 16V
20
150
mV
Power Supply Rejection
VCC = 13.1V, 1VP/P 1kHz
34
46
dB
1.5
2.0
2.5
V
40
150
nA
1.5
2.0
2.5
V
0.7
1.1
V
-0.10
0.28
+0.70
%
7
10
13
mV/Hz
■ Charge Pump Section
Inverting Input Voltage
Input Bias Current
Vbias Input Voltage
Non Invert. Input Voltage
IIN = 1mA
Linearity*
@ 0, 87.5, 175, 262.5, + 350Hz
F/VOUT Gain
@ 350Hz, CT = 0.0033µF, RT = 243k½
Norton Gain, Positive
IIN = 15µA
0.9
1.0
1.1
I/I
Norton Gain, Negative
IIN = 15µA
0.9
1.0
1.1
I/I
*Note: Applies to % of full scale (270¡).
■ Function Generator Section: -40¡C ² TA ² 85¡C, VCC = 13.1V unless otherwise noted.
Differential Drive Voltage
(VCOS+ - VCOS-)
8.0V ² VCC ² 16V
Q = 0¡
5.5
6.5
7.5
V
Differential Drive Voltage
(VSIN+ - VSIN-)
8.0V ² VCC ² 16V
Q = 90¡
5.5
6.5
7.5
V
Differential Drive Voltage
(VCOS+ - VCOS-)
8.0V ² VCC ² 16V
Q = 180¡
-7.5
-6.5
-5.5
V
Differential Drive Voltage
(VSIN+ - VSIN-)
8.0V ² VCC ² 16V
Q = 270¡
-7.5
-6.5
-5.5
V
Differential Drive Current
8.0V ² VCC ² 16V, TA=25¡C
33
42
mA
-1.5
0.0
1.5
deg
-2
0
+2
deg
Zero Hertz Output Angle
Function Generator Error *
Reference Figures 1,2,3,4
VCC = 13.1V, TA=25¡C
Q = 0¡ to 305¡
*Note: Deviation from nominal per Table 1 after calibration at 0¡ and 270¡.
2
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
■ Function Generator Section: continued
Function Generator Error
13.1V ² VCC ² 16V, TA=25¡C
-2.5
0
+2.5
deg
Function Generator Error
13.1V ² VCC ² 11V, TA=25¡C
-1
0
+1
deg
Function Generator Error
13.1V ² VCC ² 8V, TA=25¡C
-3
0
+3
deg
Function Generator Error
25¡C ² TA ² 85¡C
-3
0
+3
deg
Function Generator Error
25¡C ² TA ² 105¡C
-5.5
0
+5.5
deg
Function Generator Error
Ð40¡C ² TA ² 25¡C
-3
0
+3
deg
Function Generator Gain
TA = 25¡C Q vs F/VOUT
60
77
95
¡/V
Package Lead Description
PACKAGE LEAD #
LEAD SYMBOL
FUNCTION
16L PDIP*
20L SO*
1
1
CP+
Positive input to charge pump.
2
2
SQOUT
Buffered square wave output signal.
3
3
FREQIN
Speed or rpm input signal.
4, 5, 12, 13
4-7, 14-17
Gnd
Ground Connections.
6
8
COS+
Positive cosine output signal.
7
9
COS-
Negative cosine output signal.
8
10
VCC
Ignition or battery supply voltage.
9
11
BIAS
Test point or zero adjustment.
10
12
SIN-
Negative sine output signal.
11
13
SIN+
Positive sine output signal.
14
18
VREG
Voltage regulator output.
15
19
F/VOUT
Output voltage proportional to input signal frequency.
16
20
CP-
Negative input to charge pump.
*Internally Fused Leads
Typical Performance Characteristics
Figure 2: Charge Pump Output Voltage vs Output Angle
Figure 1: Function Generator Output Voltage
vs Degrees of Deflection
F/VOUT = 2.0V + 2 FREQ ´ CT ´ RT ´ (VREG - 0.7)
7
7
6
6
5
COS
5
3
2
F/V Output (V)
Output Voltage (V)
4
1
0
-1
-2
-3
4
3
2
-4
-5
1
SIN
-6
-7
0
45
90
135
180
225
270
0
315
0
Degrees of Deflection (°)
45
90
135
180
225
Frequency/Output Angle (°)
3
270
315
CS4121
Electrical Characteristics: continued
CS4121
Typical Performance Characteristics: continued
Figure 4: Nominal Output Deviation
Figure 3: Output Angle in Polar Form
1.50
7V
1.25
(VSINE+) - (VSINE-)
1.00
Q
Deviation (°)
0.75
Angle
+7V
Ð7V
0.50
0.25
0.00
-0.25
-0.50
(VCOS+) - (VCOS-)
-0.75
-1.00
-1.25
[
VSIN+ Ð VSINQ = ARCTAN
VCOS+ Ð VCOS-
]
-1.50
0
-7V
45
90
135
180
Theoretical Angle (°)
225
270
315
Nominal Angle vs. Ideal Angle (After calibrating at 180¡)
Note: Temperature, voltage and nonlinearity not included.
45
40
35
Ideal Angle (Degrees)
30
25
20
Ideal Degrees
15
Nominal Degrees
10
5
0
1
5
9
13
17
21
25
29
33
37
41
45
Nominal Angle (Degrees)
Table 1: Function Generator Output Nominal Angle vs. Ideal Angle (After calibrating at 270¡)
Ideal Q
Degrees
Nominal
Q Degrees
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
0
1.09
2.19
3.29
4.38
5.47
6.56
7.64
8.72
9.78
10.84
11.90
12.94
13.97
14.99
16.00
17.00
Ideal Q Nominal
Degrees Q Degrees
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
17.98
18.96
19.92
20.86
21.79
22.71
23.61
24.50
25.37
26.23
27.07
27.79
28.73
29.56
30.39
31.24
32.12
Ideal Q Nominal
Degrees Q Degrees
34
35
36
37
38
39
40
41
42
43
44
45
50
55
60
65
70
33.04
34.00
35.00
36.04
37.11
38.21
39.32
40.45
41.59
42.73
43.88
45.00
50.68
56.00
60.44
64.63
69.14
Note: Temperature, voltage and nonlinearity not included.
4
Ideal Q
Degrees
Nominal
Q Degrees
75
80
85
90
95
100
105
110
115
120
125
130
135
140
145
150
155
74.00
79.16
84.53
90.00
95.47
100.84
106.00
110.86
115.37
119.56
124.00
129.32
135.00
140.68
146.00
150.44
154.63
Ideal Q Nominal
Degrees Q Degrees
160
165
170
175
180
185
190
195
200
205
210
215
220
225
230
235
240
159.14
164.00
169.16
174.33
180.00
185.47
190.84
196.00
200.86
205.37
209.56
214.00
219.32
225.00
230.58
236.00
240.44
Ideal Q Nominal
Degrees Q Degrees
245
250
255
260
265
270
275
280
285
290
295
300
305
244.63
249.14
254.00
259.16
264.53
270.00
275.47
280.84
286.00
290.86
295.37
299.21
303.02
CS4121
Circuit Description and Application Notes
The CS4121 is specifically designed for use with air-core
meter movements. It includes an input comparator for
sensing an input signal from an ignition pulse or speed
sensor, a charge pump for frequency to voltage conversion, a bandgap voltage regulator for stable operation,
and a function generator with sine and cosine amplifiers
to differentially drive the motor coils.
From the simplified block diagram of Figure 5A, the
input signal is applied to the FREQIN lead, this is the
input to a high impedance comparator with a typical positive input threshold of 2.0V and typical hysteresis of
0.5V. The output of the comparator, SQOUT, is applied to
the charge pump input CP+ through an external capacitor
CT. When the input signal changes state, CT is charged
or discharged through R3 and R4. The charge accumulated on CT is mirrored to C4 by the Norton Amplifier circuit comprising of Q1, Q2 and Q3. The charge pump output voltage, F/VOUT, ranges from 2V to 6.3V depending
on the input signal frequency and the gain of the charge
pump according to the formula:
Design Example
Maximum meter Deflection = 270¡
Maximum Input Frequency = 350Hz
1. Select RT and CT
Q = AGEN ´ ÆF/V
ÆF/V = 2 ´ FREQ ´ CT ´ RT ´ (VREG Ð 0.7V)
Q = 970 ´ FREQ ´ CT ´ RT
Let CT = 0.0033µF, Find RT
270¡
RT = 970 ´ 350Hz ´ 0.0033µF
RT = 243k½
RT should be a 250k½ potentiometer to trim out any inaccuracies due to IC tolerances or meter movement pointer
placement.
F/VOUT = 2.0V + 2 ´ FREQ ´ CT ´ RT ´ (VREG Ð 0.7V)
2. Select R3 and R4
Resistor R3 sets the output current from the voltage regulator. The maximum output current from the voltage regulator is 10mA R3 must ensure that the current does not
exceed this limit.
RT is a potentiometer used to adjust the gain of the F/V
output stage and give the correct meter deflection. The
F/V output voltage is applied to the function generator
which generates the sine and cosine output voltages. The
output voltage of the sine and cosine amplifiers are
derived from the on-chip amplifier and function generator circuitry. The various trip points for the circuit (i.e., 0¡,
90¡, 180¡, 270¡) are determined by an internal resistor
divider and the bandgap voltage reference. The coils are
differentially driven, allowing bidirectional current flow
in the outputs, thus providing up to 305¡ range of meter
deflection. Driving the coils differentially offers faster
response time, higher current capability, higher output
voltage swings, and reduced external component count.
The key advantage is a higher torque output for the
pointer.
The output angle, Q, is equal to the F/V gain multiplied
by the function generator gain:
Q = AF/V ´ AFG,
where:
AFG = 77¡/V (typ)
The relationship between input frequency and output
angle is:
Choose R3 = 3.3k½
The charge current for CT is
VREG Ð 0.7V
= 1.90mA
3.3k½
C1 must charge and discharge fully during each cycle of
the input signal. Time for one cycle at maximum frequency is 2.85ms. To ensure that CT is discharged, assume that
the (R3 + R4) CT time constant is less than 10% of the
minimum input frequency pulse width.
T = 285µs
Choose R4 = 1k½.
Charge time:
Discharge time:T = (R3 + R4)CT = 4.3k½ ´ 0.0033µF = 14.2µs
3. Determine C4
C4 is selected to satisfy both the maximum allowable ripple voltage and response time of the meter movement.
Q = AFG ´ 2 ´ FREQ ´ CT ´ RT ´ (VREG Ð 0.7V)
or,
Q = 970 ´ FREQ ´ CT ´ RT
The ripple voltage at the F/V converterÕs output is determined by the ratio of CT and C4 in the formula:
ÆV =
T = R3 ´ CT = 3.3k½ ´ 0.0033µF = 10.9µs
C4 =
CT(VREG Ð 0.7V)
VRIPPLE(MAX)
With C4 = 0.47µF, the F/V ripple voltage is 44mV.
Figure 7 shows how the CS4121 and the CS-8441 are used
to produce a Speedometer and Odometer circuit.
CT(VREG Ð 0.7V)
C4
Ripple voltage on the F/V output causes pointer or needle flutter especially at low input frequencies.
The response time of the F/V is determined by the time
constant formed by RT and C4. Increasing the value of C4
will reduce the ripple on the F/V output but will also
increase the response time. An increase in response time
causes a very slow meter movement and may be unacceptable for many applications.
5
CS4121
Circuit Description and Application Notes: continued
VREG
2.0V
R3
SQOUT
0.25V
CT
R4
Q3
Q1
QSQUARE
Q2
Figure 5A: Partial Schematic of Input and Charge Pump
T
PW
T-PW
VCC
FREQIN 0
VREG
0
ICP+
VCP+
0
Figure 5B: Timing Diagram of FREQIN and ICP
6
RT
C4
2.0V
SQOUT
CPÐ
CP+
+
Ð
F to V
Ð
VC(t)
+ Ð
FREQIN
F/VOUT
+
CS4121
Speedometer/Odometer or Tachometer Application
R4
1
CP+
CP+
2
SQOUT
3
FREQIN
4
Gnd
5
Gnd
6
COS+
7
COS-
8
VCC
CT
R2
C3
Battery
CP- 16
C4
F/VOUT 15
+
RT
VREG 14
CS4121
R3
Speedo
Input
Gnd 13
Gnd 12
SINE+ 11
SINE- 10
BIAS 9
D1 R1
D2
C1
COSINE
SINE
Gnd
Speedometer
Air Core
Gauge
200W
Figure 6
CT - 0.0033µF, +/- 30 PPM/¡C
D1 - 1A, 600 PIV
D2 - 50V, 500mW Zener
Note 1: For 58% Speed Input TMAX ² 5/fMAX where
R1 - 3.9, 500mW
R2 - 10k½
R3 - 3k½
R4 - 1k½
RT - Trim Resistor +/- 20 PPM/¡C 243k½
C1 - 0.1µF
C3 - 0.1µF
C4 - 0.47µF
TMAX = CT(R3+R4)
fMAX = maximum speed input frequency
R4
1
CP+
CP+
2
SQOUT
3
FREQIN
4
Gnd
5
Gnd
6
COS+
7
COS-
8
VCC
CT
Speedo
Input
R2
C3
Battery
CP- 16
F/VOUT 15
C4
+
RT
VREG 14
CS4121
R3
Gnd 13
Gnd 12
SINE+ 11
SINE- 10
BIAS 9
D1 R1
D2
C1
COSINE
SINE
Gnd
Air Core
Gauge
200W
C2
Speedometer
1
CS8441
Air Core
Stepper Motor
200W
Odometer
Figure 7
Note 1: The product of CT and RT have a direct effect on
gain and therefore directly affect temperature compensation
Note 2: CT Range; 20pF to .2µF
Note 4: The IC must be protected from transients above 60V and
reverse battery conditions
Note 5: Additional filtering on FREQIN lead may be required
Note 3: RT Range; 100k½ to 500k½
7
CS4121
Package Specification
PACKAGE THERMAL DATA
PACKAGE DIMENSIONS IN mm (INCHES)
D
Lead Count
Metric
Max
Min
19.69 18.67
13.00 12.60
16L PDIP*
20L SOIC*
Thermal Data
RQJC
typ
RQJA
typ
English
Max Min
.775 .735
.512 .496
16L PDIP*
15
50
20L SOIC*
9
55
ûC/W
ûC/W
*Internally Fused Leads
Plastic DIP (N); 300 mil wide
7.11 (.280)
6.10 (.240)
8.26 (.325)
7.62 (.300)
1.77 (.070)
1.14 (.045)
2.54 (.100) BSC
3.68 (.145)
2.92 (.115)
0.39 (.015)
MIN.
.356 (.014)
.203 (.008)
.558 (.022)
.356 (.014)
REF: JEDEC MS-001
D
Some 8 and 16 lead
packages may have
1/2 lead at the end
of the package.
All specs are the same.
Surface Mount Wide Body (DW); 300 mil wide
7.60 (.299)
7.40 (.291)
10.65 (.419)
10.00 (.394)
0.51 (.020)
0.33 (.013)
1.27 (.050) BSC
2.49 (.098)
2.24 (.088)
1.27 (.050)
0.40 (.016)
2.65 (.104)
2.35 (.093)
0.32 (.013)
0.23 (.009)
D
REF: JEDEC MS-013
0.30 (.012)
0.10 (.004)
Ordering Information
Part Number
CS4121ENF16
CS4121EDWF20
CS4121EDWFR20
Rev. 12/4/96
Description
16L PDIP (internally fused leads)
20L SOIC (internally fused leads)
20L SOIC (internally fused leads)
(tape & reel)
Cherry Semiconductor Corporation reserves the
right to make changes to the specifications without
notice. Please contact Cherry Semiconductor
Corporation for the latest available information.
8
© 1999 Cherry Semiconductor Corporation