EDI8F321024CA 1024Kx32 SRAM Module 1024Kx32 Static RAM CMOS, High Speed Module Features The EDI8F321024CA is a high speed 32 megabit Static RAM module organized as 1024K words by 32 bits. This module is constructed from eight 1024Kx4 Static RAMs in SOJ packages on an epoxy laminate (FR4) board. Four chip enables (EØ-E3) are used to independently enable the four bytes. Reading or writing can be executed on individual bytes or any combination of multiple bytes through proper use of selects. The EDI8F321024CA is offered in a 72 lead SIMM package, which enable 32 megabits of memory to be placed in less than 1.3 square inches of board space. All inputs and outputs are TTL compatible and operate from a single 5V supply. Fully asynchronous circuitry requires no clocks or refreshing for operation and provides equal access and cycle times for ease of use. Pins PD1- PD4, are used to identify module memory density in applications where alternate modules can be interchanged. 1024Kx32 bit CMOS Static Random Access Memory • Access Times: 12, 15ns • Individual Byte Selects • Fully Static, No Clocks • TTL Compatible I/O High Density Package • 72 lead SIMM, No. 176 (Angle) • 72 lead SIMM, No. 356 (Straight) • Common Data Inputs and Outputs Single +5V (±10%) Supply Operation Pin Configurations and Block Diagram NC PD4 PD1 DQØ DQ1 DQ2 DQ3 VCC A7 A8 A9 DQ4 DQ5 DQ6 DQ7 W A14 EØ 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 E2 A16 VSS DQ16 DQ17 DQ18 DQ19 A10 A11 A12 A13 DQ20 DQ21 DQ22 DQ23 VSS A19 NC 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 NC PD3 VSS PD2 DQ8 DQ9 DQ10 DQ11 AØ A1 A2 DQ12 DQ13 DQ14 DQ15 VSS A15 E1 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 E3 A17 G DQ24 DQ25 DQ26 DQ27 A3 A4 A5 VCC A6 DQ28 DQ29 DQ30 DQ31 A18 NC Pin Names AØ-A19 EØ-E3 W G DQØ-DQ31 Address Inputs Chip Enables Write Enable Output Enable Common Data Input/Output Power (+5V±10%) Ground No Connection VCC VSS NC AØ-A19 W G 20 DQØ-DQ3 DQ4-DQ7 4 4 EØ DQ8-DQ11 4 DQ12-DQ15 4 E1 DQ16-DQ19 4 DQ20-DQ23 4 E2 PD1 & PD3 = VSS PD2 & PD4 = Open DQ24-DQ27 4 E3 Electronic Designs, Inc. • One Research Drive • Westborough, MA 01581 USA • 508-366-5151 • FAX 508-836-4850 • http://www.electronic-designs.com 1 EDI8F321024CA Rev. 0 7/98 ECO#10589 DQ28-DQ31 4 Absolute Maximum Ratings* Recommended DC Operating Conditions Voltage on any pin relative to VSS -0.5V to 7.0V Operating Temperature TA (Ambient) Commercial 0°C to +70°C Industrial -40°C to +85°C Storage Temperature, Plastic -55°C to +125°C Power Dissipation 7.0 Watts Output Current 20 mA *Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Parameter Sym Supply Voltage VCC Supply Voltage VSS Input High Voltage VIH Input Low Voltage VIL Min 4.5 0 2.2 -0.3 Typ 5.0 0 --- Max Units 5.5 V 0 V 6.0 V 0.8 V AC Test Conditions Input Pulse Levels Input Rise and Fall Times Input and Output Timing Levels Output Load VSS to 3.0V 5ns 1.5V 1TTL, CL = 30pF (note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF) DC Electrical Characteristics Parameter Operating Power Supply Current Standby (TTL) Power Supply Current Full Standby Power Supply Current CMOS Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage Sym Conditions ICC1 W, E = VIL, II/O = 0mA, Min Cycle ICC2 E ³ VIH, VIN £ VIL or VIN ³ VIH ICC3 E ³ VCC-0.2V VIN ³ VCC-0.2V or VIN £ 0.2V ILI VIN = 0V to VCC ILO V I/O = 0V to VCC VOH IOH = -4.0mA VOL IOL = 8.0mA Min Typ Max 1600 600 90 Units mA mA mA --2.4 -- ----- ±80 ±20 -0.4 µA µA V V *Typical: TA = 25°C, VCC = 5.0V Truth Table E H L L W X H L G X L X L H H Capacitance Mode Standby Read Write Output Deselect Output HIGH Z DOUT DIN Power ICC2/ICC3 ICC1 ICC1 HIGH Z ICC1 (f=1.0MHz, VIN=VCC or VSS) Parameter Address Lines Data Lines Chip Enable Line Write Line Sym CI CD/Q CC CN These parameters are sampled, not 100% tested. EDI8F321024CA 1024Kx32 SRAM Module 2 EDI8F321024CA Rev. 0 7/98 ECO#10589 Max 60 20 20 60 Unit pF pF pF pF EDI8F321024CA 1024Kx32 SRAM Module AC Characteristics Read Cycle Symbol JEDEC Alt. TAVAV TRC TAVQV TAA TELQV TACS TELQX TCLZ TEHQZ TCHZ TAVQX TOH TGLQV TOE TGLQX TOLZ TGHQZ TOHZ Parameter Read Cycle Time Address Access Time Chip Enable Access Chip Enable to Output in Low Z (1) Chip Disable to Output in High Z (1) Output Hold from Address Change Output Enable to Output Valid Output Enable to Output in Low Z (1) Output Disable to Output in High Z(1) 12ns Min Max 12 12 12 3 6 3 6 0 6 15ns Min Max 15 15 15 3 7 3 7 0 7 Note 1: Parameter guaranteed, but not tested. Read Cycle 1 - W High, G, E Low TAVAV ADDRESS 1 A TAVQV Q ADDRESS 2 TAVQX DATA 1 DATA 2 Read Cycle 2 - W High TAVAV A E TAVQV TELQV TEHQZ TELQX G TGLQV TGHQZ TGLQX Q 3 EDI8F321024CA Rev. 0 7/98 ECO#10589 Units ns ns ns ns ns ns ns ns ns AC Characteristics Write Cycle Parameter Write Cycle Time Chip Enable to End of Write Address Setup Time Address Valid to End of Write Write Pulse Width Write Recovery Time Data Hold Time Write to Output in High Z (1) Data to Write Time Output Active from End of Write (1) Symbol JEDEC Alt. TAVAV TWC TELWH TCW TWLEH TCW TAVWL TAS TAVEL TAS TAVWH TAW TAVEH TAW TWLWH TWP TELEH TWP TWHAX TWR TEHAX TWR TWHDX TDH TEHDX TDH TWLQZ TWHZ TDVWH TDW TDVEH TDW TWHQX TWLZ 15ns Min 15 10 10 0 0 10 10 10 10 0 0 0 0 0 7 7 3 17ns Min 15 12 12 0 0 12 12 12 12 0 0 0 0 0 10 10 3 Max 7 Max 8 Note 1: Parameter guaranteed, but not tested. Write Cycle 1 - W Controlled TAVAV A E TELWH TAVWH TWHAX TWLWH W TAVWL TDVWH D TWHDX DATA VALID TWLQZ HIGH Z Q EDI8F321024CA 1024Kx32 SRAM Module 4 EDI8F321024CA Rev. 0 7/98 ECO#10589 TWHQX Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns EDI8F321024CA 1024Kx32 SRAM Module Write Cycle 2 - E Controlled TAVAV A TELEH TAVEL E TEHAX TAVEH TWLEH W TDVEH DATA VALID D Q HIGH Z 5 EDI8F321024CA Rev. 0 7/98 ECO#10589 TEHDX Ordering Information Part Number Speed (ns) Package No. EDI8F321024CA12MNC 12 176 EDI8F321024CA15MNC 15 176 Part Number Speed (ns) EDI8F321024CA12MMC 12 EDI8F321024CA15MMC 15 EDI8G321024CA12MNC EDI8G321024CA15MNC EDI8G321024CA12MMC EDI8G321024CA15MMC 12 15 176 176 12 15 Package No. 356 356 356 356 Note: To order gold SIMM option refer to "EDI8G321024CXXMNC"; to order tin plated contacts option refer to "EDI8F321024CXXMNC". Package Descriptions Package No. 176 72 Lead Angled SIMM 4.255 MAX. 3.984 1.992 .400 .225 MIN. .680 MAX. .250 P1 .250 TYP. .062 R. 2.045 .062 R. .050 TYP. .125 MIN. 3.750 .360 MAX. Package No. 356 72 Pin SIMM .125 DIA (2x) 4.255 MAX 3.984 J2 .400 164 J1 .250 .360 MAX. R.# J4 .600 MAX. P1 .050 TYP. 2.045 .062 R. (2x) .250 TYP. 1.992 3.750 .125 MIN. Electronic Designs, Inc. • One Research Drive • Westborough, MA 01581 USA • 508-366-5151 • FAX 508-836-4850 • http://www.electronic-designs.com Electronic Designs Inc. reserves the right to change specifications without notice. CAGE No. 66301 EDI8F321024CA 1024Kx32 SRAM Module 6 EDI8F321024CA Rev. 0 7/98 ECO#10589