NZF220DFT1 EMI Filter with ESD Protection Features: • • • • • • 2 EMI/RFI Bi–directional “Pi” Low–Pass Filters ESD Protection Meets IEC6000–4–2, ±8 kV Contact Discharge Diode Capacitance: 7 – 10 pF Zener/Resistor Line Capacitance: 22 ±20% pF Low Zener Diode Leakage: 1 A Maximum Zener Breakdown Voltage; 6 – 8 Volts http://onsemi.com CIRCUIT DESCRIPTION Pin 4 Pin 5 Benefits: • Designed to suppress EMI/RFI Noise in Systems Subjected to Electromagnetic Interference • Nominal Cutoff Frequency of 220 MHz (per Figure 2) • Small Package Size Minimizes Parasitic Inductance, Thus a More “Ideal” Low Pass Filtering Response Pin 3 Typical Applications: • • • • Pin 2 (GND) Cellular Phones Communication Systems Computers Portable Products with Input/Output Conductors 5 4 1 MAXIMUM RATINGS Rating Pin 1 Symbol Value Unit Peak Power Dissipation (Note 1.) 8 × 20 s Pulse PPK 14 Watts IEC6100–4–2 Contact Discharge ESD ±8.0 kV Maximum Junction Temperature TJ 150 °C 2 3 SC–88A CASE 419A DF SUFFIX MARKING DIAGRAM 5 1. Between I/O Pins 4 FA D 1 2 3 FA = Specific Device Code D = Date Code ORDERING INFORMATION Device NZF220DFT1 Semiconductor Components Industries, LLC, 2001 April, 2001 – Rev. 3 1 Package Shipping SC–88A 3000/Tape & Reel Publication Order Number: NZF220DFT1/D NZF220DFT1 ELECTRICAL CHARACTERISTICS Symbol Min Typ Max Unit Zener Breakdown Voltage, @ IZT = 1 mA 6.0 – 8.0 V Zener Leakage Current, @ VR = 3 V N/A – 1.0 A Zener Forward Voltage, @ IF = 50 mA N/A – 1.5 V Capacitance Zener Internal Capacitance, @ 0 V Bias 7.0 – 10 pF Capacitance Zener/Resistor Array Line Capacitance 17.6 – 26.4 pF VZ Ir VF Resistor FC (Note 2.) Characteristic Resistance 90 – 110 Cutoff Frequency – 220 – MHz 2. 50 Source and 50 Lead Termination per Figure 2 Applications Information Suppressing Noise at the Source • Filter all I/O signals leaving the noisy environment • Locate I/O driver circuits close to the connector • Use the longest rise/fall times possible for all digital signals Reducing Noise at the Receiver • Filter all I/O signals entering the unit • Locate the I/O filters as close as possible to the connector Minimizing Noise Coupling • • • • • Use multilayer PCBs to minimize power and ground inductance Keep clock circuits away from the I/O connector Ground planes should be used whenever possible Minimize the loop area for all high speed signals Provide for adequate power decoupling ESD Protection • Locate the suppression devices as close to the I/O connector as possible • Minimize the PCB trace length to the suppression device • Minimize the PCB trace length for the ground return for the suppression device Frequency Response Specification TRACKING GENERATOR SPECTRUM ANALYZER 50 TG OUTPUT RF INPUT NZF220DF 50 VG Vin Vout TEST BOARD Test Conditions: Source Impedance = 50 Load Impedance = 50 Input Power = 0 dB NZF220DF Figure 1. Measurement Conditions http://onsemi.com 2 NZF220DFT1 0 –20 –30 –40 –50 1.0 10 100 1000 3000 f, FREQUENCY (MHz) Figure 2. Typical EMI Filter Response (50 Source and 50 Lead Termination) 0.5 mm (min) ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ 1.9 mm ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ http://onsemi.com 3 0.65 mm 0.65 mm Footprint 0.4 mm (min) GAIN (dB) –6.3 –10 OUTPUT 3 dB = 220 MHz NZF220DFT1 OUTLINE DIMENSIONS EMI Filter with ESD Protection SC–88A/SOT–323 CASE 419A–01 ISSUE E A G NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. V 5 DIM A B C D G H J K N S V 4 –B– S 1 2 3 D 5 PL 0.2 (0.008) B M M N INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 0.012 0.016 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 0.30 0.40 J C K H STYLE 1: PIN 1. 2. 3. 4. 5. BASE EMITTER BASE COLLECTOR COLLECTOR STYLE 2: PIN 1. 2. 3. 4. 5. ANODE EMITTER BASE COLLECTOR CATHODE STYLE 3: PIN 1. 2. 3. 4. 5. ANODE 1 N/C ANODE 2 CATHODE 2 CATHODE 1 STYLE 4: PIN 1. 2. 3. 4. 5. SOURCE 1 DRAIN 1/2 SOURCE 1 GATE 1 GATE 2 STYLE 5: PIN 1. 2. 3. 4. 5. CATHODE COMMON ANODE CATHODE 2 CATHODE 3 CATHODE 4 STYLE 6: PIN 1. 2. 3. 4. 5. EMITTER BASE EMITTER COLLECTOR COLLECTOR STYLE 7: PIN 1. 2. 3. 4. 5. BASE EMITTER BASE COLLECTOR COLLECTOR ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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