ETC AP2600

AP2600
4-Channel Audio Process
AP2600
\
4-Channel Audio Processor
AP2600
4-Channel Audio Process
Table of Contents
1. OVERVIEW ......................................................................................................... 1
2. APPLICATIONS .................................................................................................. 1
3. ORDERING INFORMATION ............................................................................... 1
4. FEATURES.......................................................................................................... 1
5. BLOCK DIAGRAM.............................................................................................. 1
6. PIN CONFIGURATION........................................................................................ 2
7. DEVICE PIN OUT AND PIN DESCRIPTIONS .................................................... 2
8. APPLICATION CIRCUIT ..................................................................................... 3
9. ABSOLUTE MAXIMUM RATING (Ta = 25oC) ..................................................... 3
10. ELECTRICAL CHARACTERISTICS................................................................... 4
11. EQUALIZER DESCRIPTION .............................................................................. 7
12. I2C-BUS CONCEPTS .......................................................................................... 9
13. I2C-BUS FORMAT ............................................................................................. 10
14. DATA BYTE FUNCTION & POWER ON RESET CONDITION......................... 10
15. SOFTWARE SPECIFICATION...........................................................................11
16. PACKAGE INFORMATION ............................................................................... 14
AP2600
4-Channel Audio Process
1. OVERVIEW
4. FEATURES
The AP2600 is a four-channel input audio
processor with input multiplexer, input volume
attenuator, equalizer and loudness features. It can
effectively suppress noise with very few external
components. AP2600’s built-in zero-cross function
can effectively prevent click noise. This chip is
controlled by serial data I2C bus which makes the
chip user-friendly by simple command.
„
2. APPLICATIONS
„
„
„
„
„
„
„
„
„
„
Boombox
Mini Stereo System
MP3 Docking Speaker System
Discman
Portable Audio System
„
„
„
„
„
3. ORDERING INFORMATION
„
PART NUMBER
PINS
PACKAGE
AP2600-CB-L
28
COB
AP2600-SO-L
28
SOP
„
„
4 stereo input selectors
Input volume attenuator (64 steps): master
control in 1.25dB steps
Two output speaker attenuators (32 steps):
balance controls in 1.25dB steps
Loudness function on/off
Treble and Bass control in 2dB step
(15 steps)
Few external components
Built-in zero-cross detector prevents click
noise
No DC level shift
Gain control in 3.75dB step (4 steps)
Separate outputs: line out, speaker out
Built-in power-up reset
Controlled by serial data I2C bus
Separate ground for analog and digital
circuits
2.7V to 5.5V single supply operation
12
C H 1L
C H 2L
C H 3L
C H 4L
3
16
15
14
13
L
19
LVOLI
LM AXO
B IN L
20
TR EBLE
M U LTIPLEXER
+
VOLU M E
+
LOU DN ESS
C H 1R
C H 2R
C H 3R
C H 4R
B OU TL
TREL
LOU DL
5. BLOCK DIAGRAM
17
18
GA IN
+
SPR ATT
LEFT
BASS
24
27
26
2
I C BUS D ECODER + LATC HES
11
10
9
8
R
TR EBLE
25
GA IN
+
SPR ATT
RIGHT
BASS
23
LOU T
SC L
SD A
GN D
R OU T
SUPPLY
7
2
28
4
22
6
5
R VOLI
R M AXO
B OUTR
Page 1 of 16
21
B IN R
TRER
VREF
VSA
VDA
LOU DR
Revision 1.2
1
March 26, 2007
AP2600
4-Channel Audio Process
6. PIN CONFIGURATION
VDA
1
28
VREF
VDA
1
28
VREF
VSA
2
27
SCL
VSA
2
27
SCL
TREL
3
26
SDA
TREL
3
26
SDA
TRER
4
25
GND
TRER
4
25
GND
RVOLI
5
24
LOUT
RVOLI
5
24
LOUT
RMAXO
6
23
ROUT
RMAXO
6
23
ROUT
LOUDR
7
22
BOUTR
LOUDR
7
22
BOUTR
CH4R
8
21
BINR
CH4R
8
21
BINR
CH3R
9
20
BOUTL
CH3R
9
20
BOUTL
BINL
CH2R
10
19
BINL
AP2600
COB
CH2R
10
19
CH1R
11
18
LMAXO
LOUDL
12
17
LVOLI
CH4L
13
16
CH1L
CH3L
14
15
CH2L
AP2600
SOP
CH1R
11
18
LMAXO
LOUDL
12
17
LVOLI
CH4L
13
16
CH1L
CH3L
14
15
CH2L
7. DEVICE PIN OUT AND PIN DESCRIPTIONS
PIN NUMBER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Revision 1.2
PIN NAME
VDA
VSA
TREL
TRER
RVOLI
RMAXO
LOUDR
CH4R
CH3R
CH2R
CH1R
LOUDL
CH4L
CH3L
CH2L
CH1L
LVOLI
LMAXO
BINL
BOUTL
BINR
BOUTR
ROUT
LOUT
GND
SDA
SCL
VREF
DESCRIPTIONS
Power Supply Voltage Input
Analog Ground
Left Channel Treble Band
Right Channel Treble Band
Right Channel Volume Control Input
Right Channel Maximum Output
Right Channel Loudness
Right Channel Audio Input for Stereo Input Channel 4
Right Channel Audio Input for Stereo Input Channel 3
Right Channel Audio Input for Stereo Input Channel 2
Right Channel Audio Input for Stereo Input Channel 1
Left Channel Loudness
Left Channel Audio Input for Stereo Input Channel 4
Left Channel Audio Input for Stereo Input Channel 3
Left Channel Audio Input for Stereo Input Channel 2
Left Channel Audio Input for Stereo Input Channel 1
Left Channel Volume Control Input
Left Channel Maximum Output
Bass Band Left Channel Input
Bass Band Left Channel Output
Bass Band Right Channel Input
Bass Band Right Channel Output
Right Channel Audio Output for Speaker Use
Left Channel Audio Output for Speaker Use
Digital Ground
Serial Data Line
Serial Clock Line
Reference Voltage Input
Page 2 of 16
March 26, 2007
AP2600
4-Channel Audio Process
I2C BUS
8. APPLICATION CIRCUIT
R1
R2
5.6K
5.6K
C26
10U
C23
C1
16
15
CH2L
17
CH3L
18
CH1L
19
CH4L
20
10U
10U
LVOLI
ROUT
0.1U
LOUDL
21
0.1U
10U
LMAXO
22
0.1U
C2
C8
CH1R
23
LOUT
SCL
24
0.1U
C18
BINL
25
GND
26
SDA
27
VREF
28
10U
C17
BINR
10U
C7
CH2R
C6
BOUTL
C22
BOUTR
C11
10U
VDA
VSA
TREL
TRER
RVOLI
RMAXO
LOUDR
CH4R
CH3R
ASP
AP680
AP2600
1
2
3
4
5
6
7
8
9
C24
13
14
10U
C15
C16
10U
C20
2.7N
C14
10U
C13
10U
C12
10U
C4
C3
10U
10U
10U
10U
R4
R3
470K
0.1U
12
C19
2.7N
C25
11
470K
C5
10
C10
0.1U
C21
0.1U
Application Notes
„
Application circuit above can be applied to both COB and SOP
„
Tolerance of all resistors = 1%
„
Tolerance of capacitors = 5%
„
Line out signal can be obtained through pin 6, 18
„
Speaker out signal can be obtained through pin 23, 24
9. ABSOLUTE MAXIMUM RATING (Ta = 25oC)
[Under no circumstances should the absolute maximum ratings given below be violated. Stresses exceeding
one or more of the limiting values may cause permanent damage to the device.]
PARAMETER
SYMBOL
VALUE
UNIT
Supply Voltage
Vcc
6
V
Power Dissipation
Pd
50
mW
Operating Temperature Range
Topr
-20 to 70
o
C
-20 to 100
o
C
Storage Temperature Range
Revision 1.2
Tstg
Page 3 of 16
March 26, 2007
AP2600
4-Channel Audio Process
10. ELECTRICAL CHARACTERISTICS
[Refer to the application circuit VCC=3.3V, Ta=25oC, f=1kHz, all controls flat unless otherwise specified]
PARAMETER
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
SUPPLY
Supply Voltage
Vcc
2.7
3.3
5.5
V
Supply Current
Id
-
-
9
mA
SVR
-
80
-
dB
All flat, f=20 to 20kHz
-
-91
-89
All max, f=20 to 20kHz
-
-79
-77
All flat, f=1k
-
80
-
dB
-1.5
-
1.5
dB
-0.2
-
0.2
dB
All flat
-
0.05
0.1
All max
-
0.1
0.2
All flat, THD=3%
-
-
1.5
All max, THD=3%
-
-
0.5
-
0.5 Vcc
-
V
54
60
66
kΩ
Supply Rejection
GENERAL
Output Noise
Channel Separation
Nout
SC
Total Normalized Volume Set Error
ΔGa
Total Tracking Error (ch. L – ch. R)
ΔGt
Total Harmonic Distortion + Noise
THD+N
Maximum Input Voltage
Internal Reference Voltage
VIM
G = 0 through –50dB
Vref
dBV
%
Vrms
INPUT MASTER VOLUME
Input Resistance
Rin
At pins 9-11, 14-16
Control Range
Crange
78.25
78.75
79.25
dB
Maximum Attenuation
Amax
78.25
78.75
79.25
dB
Step Resolution
Astep
dB
Normalized Attenuation Set Error
Tracking Error (ch. L – ch. R)
1
1.25
1.5
ΔGa
G = 0 through –50dB
-0.8
-
0.8
dB
ΔGt
G = 0 through –78.75dB
-0.2
-
0.2
dB
Crange
37
37.5
38
dB
Maximum Attenuation
Amax
37
37.5
38
dB
Step Resolution
Astep
1
1.25
1.5
dB
Normalized Attenuation Set Error
ΔGa
G = 0 through –37.5dB
-0.8
-
0.8
dB
Tracking Error (ch. L – ch. R)
ΔGt
G = 0 through –37.5dB
-0.2
-
0.2
dB
Mute Attenuation
Amute
f=1k
90
100
-
dB
OUTPUT BALANCE AND VOLUME CONTROL
Control Range
OUTPUT GAIN CONTROL
Maximum Output Gain
Gmaxo
10.75
11.25
11.75
dB
Minimum Output Gain
Gmino
-0.5
0
0.5
dB
Step Resolution
Astep
3.5
3.75
4
dB
Revision 1.2
Page 4 of 16
March 26, 2007
AP2600
4-Channel Audio Process
ELECTRICAL CHARACTERISTICS (continued)
[Refer to the application circuit VCC=3.3V, Ta=25oC, Vin = -20dBV (0.1Vrms), f=1kHz unless otherwise specified]
PARAMETER
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
±13
±14
±15
dB
1.5
2
2.5
dB
BASS
Control Range
Crange
f=100Hz
Step Resolution
Astep
Attenuation Set Error
ΔGa
G = -14 through 14dB
-1
-
1
dB
Tracking Error (ch. L – ch. R)
ΔGt
G = -14 through 14dB
-0.5
-
0.5
dB
f=20kHz
±13
±14
±15
dB
1.5
2
2.5
dB
TREBLE
Control Range
Crange
Step Resolution
Astep
Attenuation Set Error
ΔGa
G = -14 through 14dB
-1
-
1
dB
Tracking Error (ch. L – ch. R)
ΔGt
G = -14 through 14dB
-0.5
-
0.5
dB
Maximum Output Voltage
Vom
THD=3% at pin 6,18,23,24
-
1 Vcc
-
V
Output DC Voltage Level
Vdc
At pin 6,18,23,24
-
0.5 Vcc
-
V
Output Resistance
Rout
At pin 6,18,23,24
250
300
400
Ω
Vrst
-
0.3 Vcc
-
V
Input High Voltage for Pin 27
VIH
0.7 Vcc
-
-
V
Input Low Voltage for Pin 27
VIL
-
-
0.3 Vcc
V
Input Threshold Voltage for Pin 26
VTH
-
0.5 Vcc
-
V
Output-Low Current for Pin 26
IOL
-
4
-
mA
AUDIO OUTPUT
POWER-ON RESET
Start of Reset
2
DIGITAL CIRCUIT (I C-BUS)
Revision 1.2
Page 5 of 16
March 26, 2007
AP2600
4-Channel Audio Process
ELECTRICAL CHARACTERISTICS (continued)
[Refer to the application circuit VCC=3.3V, Ta=25oC, Vin = -20dBV (0.1Vrms), f=1kHz unless otherwise specified]
MAXIMUM INPUT VOLTAGE (THD=3%)
FREQUENCY RESPONSE (Loudness)
VIM - MAXIMUM INPUT VOLTAGE (V)
5
f = 1kHz
4
3
All flat
2
All maximum
1
Loudness on
In vol. 0 to -50dB
0
2
2.5
3
3.5
4
4.5
5
5.5
6
V CC - SUPPLY VOLTAGE (V)
FREQUENCY RESPONSE (Treble)
Vin = -20dBV Lch
Vout = Lch
FREQUENCY RESPONSE (Bass)
Vin = -20dBV Lch
Vout = Lch
Revision 1.2
Page 6 of 16
March 26, 2007
AP2600
4-Channel Audio Process
11. EQUALIZER DESCRIPTION
In AP2600, there is a two-band digitally controlled stereo equalizer. The circuit structures of the
Bass band and Treble band are similar. They are connected in a serial format. Each band can be
considered as a filtering cell which can boost or cut the signal at certain frequency range.
Bass Band Control Circuit
A. Boost mode
IN
fO =
OUT
R3
R2
C1
C2
Q≈
1
2 π R1(R2 + R3)(C1)(C2)
1
(C1)(C2)(R2)
C1 + C2
R1
R2 + R3
+2
R1
G V = 20 log
R3
+2
R1
R1
(Hz)
(dB)
B. Cut mode
fO =
IN
OUT
R2
R3
C2
C1
Q≈
1
2 π R1(R2 + R3)(C1)(C2)
1
(C1)(C2)(R2)
C1 + C2
R1
R3
+2
GV = 20 log R1
R2 + R3
+2
R1
R1
(Hz)
(dB)
Under both boost and cut mode, their center frequency (fo), Q-factor (Q) and maximum gain (Gv)
can be controlled by the external components (C1, C2, R1). Corresponding instance names in
application circuit are shown below:
LEFT CHANNEL
RIGHT CHANNEL
INSTANCE NAME IN STRUCTURE
C1
C2
R1
C1
C2
R1
INSTANCE NAME IN APPLICATION CIRCUIT
C18
C17
R2
C7
C6
R1
Revision 1.2
Page 7 of 16
March 26, 2007
AP2600
4-Channel Audio Process
Treble Band Control Circuit
A. Boost mode
IN
OUT
fO =
1
2 π(R1)(C1)
R2
G V = 20 log
R1
(Hz)
R1+ R2
R1
(dB)
C1
B. Cut mode
IN
R2
OUT
fO =
1
2 π(R1)(C1)
(Hz)
R1
C1
G V = 20 log
R1
R1+ R2
(dB)
Under both boost and cut mode, their cut-off frequency (fo) can be controlled by the external
component (C1). Corresponding instance names in application circuit are shown below:
LEFT CHANNEL
RIGHT CHANNEL
INSTANCE NAME IN STRUCTURE
C1
C1
INSTANCE NAME IN APPLICATION CIRCUIT
C5
C16
Revision 1.2
Page 8 of 16
March 26, 2007
AP2600
4-Channel Audio Process
12. I2C-BUS CONCEPTS
I2C-bus is a simple bi-directional, 2-wire serial
data (SDA) and serial clock (SCL) bus for
inter-IC control. Both lines must be connected
to a positive supply via a pull-up resistor when
connected to output of device.
Device Address
After the Start condition, the address of a Slave
device is sent. This address is 7 bits long
followed by an 8th-bit, which is a data direction
bit (R/W): 0 indicates a transmission (Write), 1
indicates a request for data (Read).
Data Validity
One data bit is transferred during each clock
pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse.
Changes in the data line at this time will be
interpreted as control signals.
Acknowledge
There is no limit to the number of data byte
transferred between the start and stop
conditions from transmitter to receiver. Each
byte of 8 bits is followed by an acknowledge bit
(ACK). A slave receiver must generate an ACK
after the reception of each byte. Also a master
must generate an ACK after the reception of
each byte that has been clocked out of the
slave transmitter. Device that acknowledges
has to pull down the SDA line during the
acknowledge clock pulse, so that the SDA line
is stable LOW during the HIGH period of the
ACK related clock pulse, set-up and hold times
must be taken into consideration. A master
receiver must signal an end of data to the
transmitter by not generating an ACK on the
last byte that has been clocked out of the slave.
In this case, the transmitter must release the
data line HIGH to allow the master to generate
a stop condition.
SDA
SCL
SDA stable
data valid
change
of data
allowed
Data Transfer
Start and Stop Conditions
Both data and clock remain HIGH when the bus
is not busy. A HIGH-to-LOW transition of the
data, while the clock is HIGH, is defined as the
start condition (S). A LOW-to-HIGH transition of
the data line while the clock is HIGH is defined
as the stop condition (P).
SDA
SDA
SCL
S
SCL
P
START condition
STOP condition
Definition of START and STOP condition
DATA OUTPUT
BY TRANSMITTER
not acknowledge
DATA OUTPUT
BY RECEIVER
acknowledge
SCL FROM
MASTER
1
START
condition
Revision 1.2
2
8
9
clock pulse for
acknowledge
Acknowledgement on I2C-bus
Page 9 of 16
March 26, 2007
AP2600
4-Channel Audio Process
MSB
LSB
MSB
1
7
2-6
Slave Address
Start
Condition
*NAK
LSB
*ACK
~
~
~
~
SCL
~ ~
~
~
~
~ ~
SDA
1
8
9
R/W
ACK
2-7
8
9
DATA
ACK
Stop
Condition
* NAK – SDA line is HIGH
**ACK – SDA line is pulled LOW by receiver
Overall Diagram
13. I2C-BUS FORMAT
The interface protocol comprises:
z
A start condition (S)
z
A chip address byte
z
CHIP ADDRESS
DATA 1 to DATA n
MSB
S
1
LSB
0
0
0
A sequence of data + acknowledge (A)
A stop condition (P)
z
1
0
0
0
MSB
LSB
A
DATA
A
P
The byte order and the number of bytes sent are arbitrary. The sequence of data is terminated by
the stop condition.
14. DATA BYTE FUNCTION & POWER ON RESET CONDITION
DATA BYTE
POWER ON RESET CONDITION
MSB
FUNCTION
LSB
D7
D6
D5
D4
0
0
X
1
1
0
1
1
1
X
MODE STATUS
BIT
STATUS
D3
D2
D1
D0
X
X
X
X
X
Input Volume
0dB
D5:D0
000000
X
X
X
X
X
00000
X
X
X
0dB
0dB
D4:D0
X
Left Output Attenuation
Right Output Attenuation
D4:D0
00000
0dB
OFF
CH1
D4:D3
D2
D1:D0
11
1
00
0
1
0
X
X
X
X
X
Output Gain
Loudness
Input Sources Selection
0
1
1
0
X
X
X
X
EQ Bass Level
-14dB
D3:D0
0000
0
1
1
1
X
X
X
X
EQ Treble Level
-14dB
D3:D0
0000
Revision 1.2
Page 10 of 16
March 26, 2007
AP2600
4-Channel Audio Process
15. SOFTWARE SPECIFICATION
INPUT MASTER VOLUME SELECTION
D5:D3 – input volume 10dB attenuation
D2:D0 – input volume 1.25dB attenuation
MSB
D7
D6
0
0
D5
D4
D3
LSB
INPUT VOLUME
D2
D1
D0
1.25dB STEPS
0
0
0
0dB
0
0
1
-1.25dB
0
1
0
-2.5dB
0
1
1
-3.75dB
1
0
0
-5dB
1
0
1
-6.25dB
1
1
0
-7.5dB
1
1
1
-8.75dB
10dB STEPS
0
0
0
0
0
0dB
0
0
1
-10dB
0
1
0
-20dB
0
1
1
-30dB
1
0
0
-40dB
1
0
1
-50dB
1
1
0
-60dB
1
1
1
-70dB
LEFT OUTPUT SPEAKER ATTENUATE SELECTION
D4:D3 – left output speaker 10dB attenuation
D2:D0 – left output speaker 1.25dB attenuation
MSB
D7
D6
D5
1
1
0
D4
D3
LSB
LEFT OUTPUT SPEAKER ATTENUATION
D2
D1
D0
1.25dB STEPS
0
0
0
0dB
0
0
1
-1.25dB
0
1
0
-2.5dB
0
1
1
-3.75dB
1
0
0
-5dB
1
0
1
-6.25dB
1
1
0
-7.5dB
1
1
1
-8.75dB
10dB STEPS
1
Revision 1.2
1
0
0
0
0dB
0
1
-10dB
1
0
-20dB
1
1
-30dB
1
1
1
1
1
Page 11 of 16
MUTE
March 26, 2007
AP2600
4-Channel Audio Process
RIGHT OUTPUT SPEAKER ATTENUATE SELECTION
D4:D3 – right output speaker 10dB attenuation
D2:D0 – right input speaker 1.25dB attenuation
MSB
D7
D6
D5
1
1
1
D4
D3
LSB
RIGHT OUTPUT SPEAKER ATTENUATION
D2
D1
D0
1.25dB STEPS
0
0
0
0dB
0
0
1
-1.25dB
0
1
0
-2.5dB
0
1
1
-3.75dB
1
0
0
-5dB
1
0
1
-6.25dB
1
1
0
-7.5dB
1
1
1
-8.75dB
10dB STEPS
1
1
1
0
0
0dB
0
1
-10dB
1
0
-20dB
1
1
-30dB
1
1
1
1
1
MUTE
SOURCES SELECTION / LOUDNESS / OUTPUT GAIN SELECTION
D4:D3 – output gain selection
D2 – loudness ON/OFF
D1:D0 – input sources selection
D1
D0
INPUT SOURCES SELECTION
LOUDNESS
OUTPUT GAIN SELECTION
0
0
CH1
0
1
CH2
1
0
CH3
1
1
CH4
MSB
LSB
D7
D6
D5
0
1
0
Revision 1.2
D4
D3
D2
0
Loudness ON
1
Loudness OFF
0
0
Output Gain +11.25dB
0
1
Output Gain +7.5dB
1
0
Output Gain +3.75dB
1
1
No Gain
Page 12 of 16
March 26, 2007
AP2600
4-Channel Audio Process
BASS LEVEL SELECTION
D3:D0 – bass level selection
MSB
LSB
BASS LEVEL
D7
D6
D5
D4
D3
D2
D1
D0
0
1
1
0
0
0
0
0
-14dB
0
0
0
1
-12dB
0
0
1
0
-10dB
0
0
1
1
-8dB
0
1
0
0
-6dB
0
1
0
1
-4dB
0
1
1
0
-2dB
0
1
1
1
0dB
1
1
1
1
0dB
1
1
1
0
2dB
1
1
0
1
4dB
1
1
0
0
6dB
1
0
1
1
8dB
1
0
1
0
10dB
1
0
0
1
12dB
1
0
0
0
14dB
TREBLE LEVEL SELECTION
D3:D0 – treble level selection
MSB
LSB
TREBLE LEVEL
D7
D6
D5
D4
D3
D2
D1
D0
0
1
1
1
0
0
0
0
-14dB
0
0
0
1
-12dB
0
0
1
0
-10dB
0
0
1
1
-8dB
0
1
0
0
-6dB
0
1
0
1
-4dB
0
1
1
0
-2dB
0
1
1
1
0dB
1
1
1
1
0dB
1
1
1
0
2dB
1
1
0
1
4dB
1
1
0
0
6dB
1
0
1
1
8dB
1
0
1
0
10dB
1
0
0
1
12dB
1
0
0
0
14dB
Revision 1.2
Page 13 of 16
March 26, 2007
AP2600
4-Channel Audio Process
16. PACKAGE INFORMATION
1
PIN 1 LOCATION
COB PACKAGE
Revision 1.2
Page 14 of 16
March 26, 2007
AP2600
4-Channel Audio Process
PACKAGE INFORMATION
SOP28 PACKAGE
Revision 1.2
Page 15 of 16
March 26, 2007
AP2600
4-Channel Audio Process
Valence Semiconductor Design Limited
Unit 2001, 20/F, APEC Plaza,
49 Hoi Yuen Road, Kwun Tong, Hong Kong
Tel: (852) 2797 3288
Fax: (852) 2776 7770
Email: inquiry@valencetech.com
Website: http://www.valencetech.com
IMPORTANT NOTICE
“Preliminary” product information describes products that are in production, but for which full characterization data is not yet available. ValenceTech Ltd. and its affiliates (“Valence”) believe that the
information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any kind (express or implied).
Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the
terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. No responsibility is assumed by Valence
for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the
property of Valence and by furnishing this information, Valence grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual
property rights. Valence owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with
respect to Valence integrated circuits or other products of Valence. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for
creating any work for resale. An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this material and
controlled under the “Foreign Exchange and Foreign Trade Law” is to be exported or taken out of Japan. An export license and /or quota needs to be obtained from the competent authorities of the
Chinese Government if any of the products or technologies described in this material is subject to the PRC Foreign Trade Law and is to be exported or taken out of the PRC. CERTAIN APPLICATIONS
USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). VALENCE PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN AIRCRAFT SYSTEMS, MILITARY APPLICATIONS, PRODUCTS SURGICALLY
IMPLANTED INTO THE BODY, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS (INCLUDING MEDICAL DEVICES, AIRCRAFT SYSTEMS OR COMPONENTS AND
PERSONAL OR AUTOMOTIVE SAFETY OR SECURITY DEVICES). INCLUSION OF VALENCE PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S
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Revision 1.2
Page 16 of 16
March 26, 2007