PHILIPS 74AUP1G79

74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
Rev. 01 — 12 September 2005
Product data sheet
1. General description
The 74AUP1G79 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
The 74AUP1G79 provides the single positive-edge triggered D-type flip-flop. Information
on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock
pulse. The D input must be stable one set-up time prior to the LOW-to-HIGH clock
transition for predictable operation.
2. Features
■ Wide supply voltage range from 0.8 V to 3.6 V
■ High noise immunity
■ Complies with JEDEC standards:
◆ JESD8-12 (0.8 V to 1.3 V)
◆ JESD8-11 (0.9 V to 1.65 V)
◆ JESD8-7 (1.2 V to 1.95 V)
◆ JESD8-5 (1.8 V to 2.7 V)
◆ JESD8-B (2.7 V to 3.6 V)
■ ESD protection:
◆ HBM JESD22-A114-C exceeds 2000 V
◆ MM JESD22-A115-A exceeds 200 V
◆ CDM JESD22-C101-C exceeds 1000 V
■ Low static power consumption; ICC = 0.9 µA (maximum)
■ Latch-up performance exceeds 100 mA per JESD 78 Class II
■ Inputs accept voltages up to 3.6 V
■ Low noise overshoot and undershoot < 10 % of VCC
■ IOFF circuitry provides partial Power-down mode operation
■ Multiple package options
■ Specified from −40 °C to +85 °C and −40 °C to +125 °C
74AUP1G79
Philips Semiconductors
Low-power D-type flip-flop; positive-edge trigger
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3 ns.
Symbol
Parameter
Conditions
tPHL, tPLH propagation delay
CP to Q
fclk(max)
maximum clock
frequency
Ci
input capacitance
CPD
power dissipation
capacitance
[1]
Min
Typ
Max
Unit
CL = 5 pF; RL = 1 MΩ
VCC = 0.8 V
-
19.7
-
ns
VCC = 1.1 V to 1.3 V
2.6
5.5
11.0
ns
VCC = 1.4 V to 1.6 V
2.0
3.8
7.0
ns
VCC = 1.65 V to 1.95 V
1.7
3.1
5.4
ns
VCC = 2.3 V to 2.7 V
1.4
2.3
4.0
ns
VCC = 3.0 V to 3.6 V
1.2
2.0
3.4
ns
-
309
-
MHz
-
0.8
-
pF
VCC = 1.8 V
-
2.3
-
pF
VCC = 3.3 V
-
3.0
-
pF
CL = 30 pF;
VCC = 3.0 V to 3.6 V
f = 10 MHz;
VI = GND to VCC
[1]
CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of the outputs.
4. Ordering information
Table 2:
Ordering information
Type number
Package
Temperature range Name
Description
Version
74AUP1G79GW
−40 °C to +125 °C
TSSOP5
plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
SOT353-1
74AUP1G79GM
−40 °C to +125 °C
XSON6
plastic extremely thin small outline package; no leads; SOT886
6 terminals; body 1 × 1.45 × 0.5 mm
5. Marking
Table 3:
Marking
Type number
Marking code
74AUP1G79GW
pP
74AUP1G79GM
pP
9397 750 14682
Product data sheet
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 01 — 12 September 2005
2 of 20
74AUP1G79
Philips Semiconductors
Low-power D-type flip-flop; positive-edge trigger
6. Functional diagram
1
D
Q
4
1
2
CP
2
4
D
CP
mna441
mna440
Fig 1. Logic symbol
Fig 2. IEC logic symbol
CP
C
C
D
C
C
TG
TG
C
C
C
Q
C
TG
TG
C
C
mna442
Fig 3. Logic diagram
7. Pinning information
7.1 Pinning
79
D
1
CP
2
GND
3
5
VCC
1
6
VCC
CP
2
5
n.c.
GND
3
4
Q
79
4
Q
001aac524
Transparent top view
001aac562
Fig 4. Pin configuration SOT353-1
(TSSOP5)
Fig 5. Pin configuration SOT886 (XSON6)
9397 750 14682
Product data sheet
D
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 01 — 12 September 2005
3 of 20
74AUP1G79
Philips Semiconductors
Low-power D-type flip-flop; positive-edge trigger
7.2 Pin description
Table 4:
Pin description
Symbol
Pin
Description
TSSOP5
XSON6
D
1
1
data input D
CP
2
2
clock pulse input CP
GND
3
3
ground (0 V)
Q
4
4
data output Q
n.c.
-
5
not connected
VCC
5
6
supply voltage
8. Functional description
8.1 Function table
Table 5:
Function table [1]
Input
Output
CP
D
Q
↑
L
L
↑
H
H
L
X
q
[1]
H = HIGH voltage level;
L = LOW voltage level;
↑ = LOW-to-HIGH CP transition;
X = don’t care;
q = lower case letter indicates the state of referenced input, one set-up time prior to the LOW-to-HIGH
CP transition.
9. Limiting values
Table 6:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
Conditions
IIK
input clamping
current
VI
input voltage
IOK
output clamping
current
VO > VCC or VO < 0 V
VO
output voltage
active mode
Power-down mode
IO
output current
ICC
quiescent supply
current
VI < 0 V
9397 750 14682
Product data sheet
Max
Unit
+4.6
V
-
−50
mA
−0.5
+4.6
V
-
±50
mA
[1]
−0.5
VCC + 0.5 V
[1]
−0.5
+4.6
V
-
±20
mA
-
+50
mA
[1]
VO = 0 V to VCC
Min
−0.5
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 01 — 12 September 2005
4 of 20
74AUP1G79
Philips Semiconductors
Low-power D-type flip-flop; positive-edge trigger
Table 6:
Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol
Parameter
Conditions
IGND
ground current
Tstg
storage temperature
Ptot
total power
dissipation
Tamb = −40 °C to +125 °C
[2]
Min
Max
Unit
-
−50
mA
−65
+150
°C
-
250
mW
[1]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
For TSSOP5 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 packages: above 45 °C the value of Ptot derates linearly with 2.4 mW/K.
10. Recommended operating conditions
Table 7:
Recommended operating conditions
Symbol
Parameter
Min
Max
Unit
VCC
supply voltage
Conditions
0.8
3.6
V
VI
input voltage
0
3.6
V
VO
output voltage
active mode
0
VCC
V
Power-down mode; VCC = 0 V
0
3.6
V
Tamb
ambient temperature
−40
+125
°C
tr, tf
input rise and fall times
0
200
ns/V
VCC = 0.8 V to 3.6 V
11. Static characteristics
Table 8:
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
VCC = 0.8 V
Typ
Max
Unit
0.70 × VCC -
-
V
VCC = 0.9 V to 1.95 V
0.65 × VCC -
-
V
Tamb = 25 °C
VIH
VIL
HIGH-state input voltage
LOW-state input voltage
VCC = 2.3 V to 2.7 V
1.6
-
-
V
VCC = 3.0 V to 3.6 V
2.0
-
-
V
VCC = 0.8 V
-
-
0.30 × VCC V
VCC = 0.9 V to 1.95 V
-
-
0.35 × VCC V
VCC = 2.3 V to 2.7 V
-
-
0.7
V
VCC = 3.0 V to 3.6 V
-
-
0.9
V
9397 750 14682
Product data sheet
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 01 — 12 September 2005
5 of 20
74AUP1G79
Philips Semiconductors
Low-power D-type flip-flop; positive-edge trigger
Table 8:
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
VOH
VI = VIH or VIL
VOL
HIGH-state output voltage
LOW-state output voltage
Min
Typ
Max
Unit
IO = −20 µA; VCC = 0.8 V to 3.6 V
VCC − 0.1
-
-
V
IO = −1.1 mA; VCC = 1.1 V
0.75 × VCC -
-
V
IO = −1.7 mA; VCC = 1.4 V
1.11
-
-
V
IO = −1.9 mA; VCC = 1.65 V
1.32
-
-
V
IO = −2.3 mA; VCC = 2.3 V
2.05
-
-
V
IO = −3.1 mA; VCC = 2.3 V
1.9
-
-
V
IO = −2.7 mA; VCC = 3.0 V
2.72
-
-
V
IO = −4.0 mA; VCC = 3.0 V
2.6
-
-
V
VI = VIH or VIL
IO = 20 µA; VCC = 0.8 V to 3.6 V
-
-
0.1
V
IO = 1.1 mA; VCC = 1.1 V
-
-
0.3 × VCC
V
IO = 1.7 mA; VCC = 1.4 V
-
-
0.31
V
IO = 1.9 mA; VCC = 1.65 V
-
-
0.31
V
IO = 2.3 mA; VCC = 2.3 V
-
-
0.31
V
IO = 3.1 mA; VCC = 2.3 V
-
-
0.44
V
IO = 2.7 mA; VCC = 3.0 V
-
-
0.31
V
IO = 4.0 mA; VCC = 3.0 V
-
-
0.44
V
ILI
input leakage current
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
-
-
±0.1
µA
IOFF
power-off leakage current
VI or VO = 0 V to 3.6 V; VCC = 0 V
-
-
±0.2
µA
∆IOFF
additional power-off
leakage current
VI or VO = 0 V to 3.6 V;
VCC = 0 V to 0.2 V
-
-
±0.2
µA
ICC
quiescent supply current
VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V
-
-
0.5
µA
∆ICC
additional quiescent supply VI = VCC − 0.6 V; IO = 0 A;
current (per pin)
VCC = 3.3 V
-
-
40
µA
Ci
input capacitance
VCC = 0 V to 3.6 V; VI = GND or VCC
-
0.8
-
pF
Co
output capacitance
VO = GND; VCC = 0 V
-
1.7
-
pF
VCC = 0.8 V
0.70 × VCC -
-
V
VCC = 0.9 V to 1.95 V
0.65 × VCC -
-
V
VCC = 2.3 V to 2.7 V
1.6
-
-
V
VCC = 3.0 V to 3.6 V
2.0
-
-
V
VCC = 0.8 V
-
-
0.30 × VCC V
VCC = 0.9 V to 1.95 V
-
-
0.35 × VCC V
VCC = 2.3 V to 2.7 V
-
-
0.7
V
VCC = 3.0 V to 3.6 V
-
-
0.9
V
[1]
Tamb = −40 °C to +85 °C
VIH
VIL
HIGH-state input voltage
LOW-state input voltage
9397 750 14682
Product data sheet
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 01 — 12 September 2005
6 of 20
74AUP1G79
Philips Semiconductors
Low-power D-type flip-flop; positive-edge trigger
Table 8:
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
VOH
VI = VIH or VIL
VOL
HIGH-state output voltage
LOW-state output voltage
Min
Typ
Max
Unit
IO = −20 µA; VCC = 0.8 V to 3.6 V
VCC − 0.1
-
-
V
IO = −1.1 mA; VCC = 1.1 V
0.7 × VCC
-
-
V
IO = −1.7 mA; VCC = 1.4 V
1.03
-
-
V
IO = −1.9 mA; VCC = 1.65 V
1.30
-
-
V
IO = −2.3 mA; VCC = 2.3 V
1.97
-
-
V
IO = −3.1 mA; VCC = 2.3 V
1.85
-
-
V
IO = −2.7 mA; VCC = 3.0 V
2.67
-
-
V
IO = −4.0 mA; VCC = 3.0 V
2.55
-
-
V
VI = VIH or VIL
IO = 20 µA; VCC = 0.8 V to 3.6 V
-
-
0.1
V
IO = 1.1 mA; VCC = 1.1 V
-
-
0.3 × VCC
V
IO = 1.7 mA; VCC = 1.4 V
-
-
0.37
V
IO = 1.9 mA; VCC = 1.65 V
-
-
0.35
V
IO = 2.3 mA; VCC = 2.3 V
-
-
0.33
V
IO = 3.1 mA; VCC = 2.3 V
-
-
0.45
V
IO = 2.7 mA; VCC = 3.0 V
-
-
0.33
V
IO = 4.0 mA; VCC = 3.0 V
-
-
0.45
V
ILI
input leakage current
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
-
-
±0.5
µA
IOFF
power-off leakage current
VI or VO = 0 V to 3.6 V; VCC = 0 V
-
-
±0.5
µA
∆IOFF
additional power-off
leakage current
VI or VO = 0 V to 3.6 V;
VCC = 0 V to 0.2 V
-
-
±0.6
µA
ICC
quiescent supply current
VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V
-
-
0.9
µA
∆ICC
additional quiescent supply VI = VCC − 0.6 V; IO = 0 A;
current (per pin)
VCC = 3.3 V
-
-
50
µA
[1]
Tamb = −40 °C to +125 °C
VIH
VIL
HIGH-state input voltage
LOW-state input voltage
VCC = 0.8 V
0.75 × VCC -
-
V
VCC = 0.9 V to 1.95 V
0.70 × VCC -
-
V
VCC = 2.3 V to 2.7 V
1.6
-
-
V
V
VCC = 3.0 V to 3.6 V
2.0
-
-
VCC = 0.8 V
-
-
0.25 × VCC V
VCC = 0.9 V to 1.95 V
-
-
0.30 × VCC V
VCC = 2.3 V to 2.7 V
-
-
0.7
V
VCC = 3.0 V to 3.6 V
-
-
0.9
V
9397 750 14682
Product data sheet
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 01 — 12 September 2005
7 of 20
74AUP1G79
Philips Semiconductors
Low-power D-type flip-flop; positive-edge trigger
Table 8:
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
VOH
VI = VIH or VIL
HIGH-state output voltage
LOW-state output voltage
VOL
Min
Typ
Max
Unit
IO = −20 µA; VCC = 0.8 V to 3.6 V
VCC − 0.11 -
-
V
IO = −1.1 mA; VCC = 1.1 V
0.6 × VCC
-
-
V
IO = −1.7 mA; VCC = 1.4 V
0.93
-
-
V
IO = −1.9 mA; VCC = 1.65 V
1.17
-
-
V
IO = −2.3 mA; VCC = 2.3 V
1.77
-
-
V
IO = −3.1 mA; VCC = 2.3 V
1.67
-
-
V
IO = −2.7 mA; VCC = 3.0 V
2.40
-
-
V
IO = −4.0 mA; VCC = 3.0 V
2.30
-
-
V
V
VI = VIH or VIL
IO = 20 µA; VCC = 0.8 V to 3.6 V
-
-
0.11
IO = 1.1 mA; VCC = 1.1 V
-
-
0.33 × VCC V
IO = 1.7 mA; VCC = 1.4 V
-
-
0.41
V
IO = 1.9 mA; VCC = 1.65 V
-
-
0.39
V
IO = 2.3 mA; VCC = 2.3 V
-
-
0.36
V
IO = 3.1 mA; VCC = 2.3 V
-
-
0.50
V
IO = 2.7 mA; VCC = 3.0 V
-
-
0.36
V
IO = 4.0 mA; VCC = 3.0 V
-
-
0.50
V
ILI
input leakage current
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
-
-
±0.75
µA
IOFF
power-off leakage current
VI or VO = 0 V to 3.6 V; VCC = 0 V
-
-
±0.75
µA
∆IOFF
additional power-off
leakage current
VI or VO = 0 V to 3.6 V;
VCC = 0 V to 0.2 V
-
-
±0.75
µA
ICC
quiescent supply current
VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V
-
-
1.4
µA
∆ICC
additional quiescent supply VI = VCC − 0.6 V; IO = 0 A;
current (per pin)
VCC = 3.3 V
-
-
75
µA
[1]
[1]
One input at VCC − 0.6 V, other input at VCC or GND.
12. Dynamic characteristics
Table 9:
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7
Symbol
Parameter
Conditions
Min
Typ
VCC = 0.8 V
-
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
[1]
Max
Unit
19.7
-
ns
2.6
5.5
11.0
ns
2.0
3.8
7.0
ns
VCC = 1.65 V to 1.95 V
1.7
3.1
5.4
ns
VCC = 2.3 V to 2.7 V
1.4
2.3
4.0
ns
VCC = 3.0 V to 3.6 V
1.2
2.0
3.4
ns
Tamb = 25 °C; CL = 5 pF
tPHL, tPLH
propagation delay CP to Q
see Figure 6
9397 750 14682
Product data sheet
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 01 — 12 September 2005
8 of 20
74AUP1G79
Philips Semiconductors
Low-power D-type flip-flop; positive-edge trigger
Table 9:
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7
Symbol
Parameter
Conditions
Min
Typ
fclk(max)
maximum clock frequency
see Figure 6
VCC = 0.8 V
-
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
[1]
Max
Unit
53
-
MHz
-
203
-
MHz
-
347
-
MHz
VCC = 1.65 V to 1.95 V
-
435
-
MHz
VCC = 2.3 V to 2.7 V
-
550
-
MHz
VCC = 3.0 V to 3.6 V
-
619
-
MHz
VCC = 0.8 V
-
23.1
-
ns
VCC = 1.1 V to 1.3 V
3.1
6.3
12.3
ns
VCC = 1.4 V to 1.6 V
2.5
4.4
8.1
ns
VCC = 1.65 V to 1.95 V
2.1
3.6
6.3
ns
VCC = 2.3 V to 2.7 V
1.8
2.8
4.7
ns
VCC = 3.0 V to 3.6 V
1.7
2.5
4.1
ns
VCC = 0.8 V
-
52
-
MHz
VCC = 1.1 V to 1.3 V
-
192
-
MHz
VCC = 1.4 V to 1.6 V
-
324
-
MHz
VCC = 1.65 V to 1.95 V
-
421
-
MHz
VCC = 2.3 V to 2.7 V
-
486
-
MHz
VCC = 3.0 V to 3.6 V
-
550
-
MHz
VCC = 0.8 V
-
26.6
-
ns
VCC = 1.1 V to 1.3 V
3.5
7.1
13.6
ns
VCC = 1.4 V to 1.6 V
2.8
5.0
9.2
ns
VCC = 1.65 V to 1.95 V
2.4
4.1
7.1
ns
VCC = 2.3 V to 2.7 V
2.2
3.2
5.4
ns
VCC = 3.0 V to 3.6 V
2.0
2.9
4.5
ns
VCC = 0.8 V
-
50
-
MHz
VCC = 1.1 V to 1.3 V
-
181
-
MHz
VCC = 1.4 V to 1.6 V
-
301
-
MHz
VCC = 1.65 V to 1.95 V
-
407
-
MHz
VCC = 2.3 V to 2.7 V
-
422
-
MHz
VCC = 3.0 V to 3.6 V
-
481
-
MHz
Tamb = 25 °C; CL = 10 pF
tPHL, tPLH
fclk(max)
propagation delay CP to Q
maximum clock frequency
see Figure 6
see Figure 6
Tamb = 25 °C; CL = 15 pF
tPHL, tPLH
fclk(max)
propagation delay CP to Q
maximum clock frequency
see Figure 6
see Figure 6
9397 750 14682
Product data sheet
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 01 — 12 September 2005
9 of 20
74AUP1G79
Philips Semiconductors
Low-power D-type flip-flop; positive-edge trigger
Table 9:
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7
Symbol
Parameter
Conditions
Min
Typ
[1]
Max
Unit
Tamb = 25 °C; CL = 30 pF
tPHL, tPLH
fclk(max)
propagation delay CP to Q
maximum clock frequency
see Figure 6
VCC = 0.8 V
-
36.8
-
ns
VCC = 1.1 V to 1.3 V
4.7
9.3
17.3
ns
VCC = 1.4 V to 1.6 V
3.8
6.4
11.8
ns
VCC = 1.65 V to 1.95 V
3.3
5.3
9.4
ns
VCC = 2.3 V to 2.7 V
3.0
4.3
7.0
ns
VCC = 3.0 V to 3.6 V
2.8
3.9
5.8
ns
VCC = 0.8 V
-
28
-
MHz
VCC = 1.1 V to 1.3 V
-
128
-
MHz
VCC = 1.4 V to 1.6 V
-
206
-
MHz
VCC = 1.65 V to 1.95 V
-
262
-
MHz
VCC = 2.3 V to 2.7 V
-
269
-
MHz
VCC = 3.0 V to 3.6 V
-
309
-
MHz
VCC = 0.8 V
-
3.4
-
ns
VCC = 1.1 V to 1.3 V
-
0.8
-
ns
VCC = 1.4 V to 1.6 V
-
0.5
-
ns
VCC = 1.65 V to 1.95 V
-
0.5
-
ns
VCC = 2.3 V to 2.7 V
-
0.4
-
ns
VCC = 3.0 V to 3.6 V
-
0.4
-
ns
VCC = 0.8 V
-
3.0
-
ns
VCC = 1.1 V to 1.3 V
-
0.9
-
ns
VCC = 1.4 V to 1.6 V
-
0.6
-
ns
VCC = 1.65 V to 1.95 V
-
0.5
-
ns
VCC = 2.3 V to 2.7 V
-
0.5
-
ns
VCC = 3.0 V to 3.6 V
-
0.7
-
ns
VCC = 0.8 V
-
-1.9
-
ns
VCC = 1.1 V to 1.3 V
-
-0.6
-
ns
VCC = 1.4 V to 1.6 V
-
-0.4
-
ns
VCC = 1.65 V to 1.95 V
-
-0.4
-
ns
VCC = 2.3 V to 2.7 V
-
-0.4
-
ns
VCC = 3.0 V to 3.6 V
-
-0.3
-
ns
see Figure 6
Tamb = 25 °C
tsu(H)
tsu(L)
th
set-up time HIGH D to CP
set-up time LOW D to CP
hold time D to CP
see Figure 6
see Figure 6
see Figure 6
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Philips Semiconductors
Low-power D-type flip-flop; positive-edge trigger
Table 9:
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7
Symbol
Parameter
Conditions
Min
Typ
tW
CP pulse width HIGH or LOW
see Figure 6
VCC = 0.8 V
-
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
Max
Unit
-
-
ns
-
2.4
-
ns
-
1.3
-
ns
VCC = 1.65 V to 1.95 V
-
0.9
-
ns
VCC = 2.3 V to 2.7 V
-
0.7
-
ns
-
0.6
-
ns
VCC = 0.8 V
-
2.2
-
pF
VCC = 1.1 V to 1.3 V
-
2.2
-
pF
VCC = 1.4 V to 1.6 V
-
2.2
-
pF
VCC = 1.65 V to 1.95 V
-
2.3
-
pF
VCC = 2.3 V to 2.7 V
-
2.6
-
pF
VCC = 3.0 V to 3.6 V
-
3.0
-
pF
VCC = 3.0 V to 3.6 V
power dissipation capacitance
CPD
f = 10 MHz
[1]
All typical values are measured at nominal VCC.
[2]
CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of the outputs.
[3]
The condition is VI = GND to VCC.
9397 750 14682
Product data sheet
[1]
[2] [3]
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 01 — 12 September 2005
11 of 20
74AUP1G79
Philips Semiconductors
Low-power D-type flip-flop; positive-edge trigger
Table 10: Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7
Symbol
Parameter
Conditions
−40 °C to +85 °C −40 °C to +125 °C Unit
Min
Max
Min
Max
VCC = 1.1 V to 1.3 V
2.4
12.9
2.4
14.2
ns
VCC = 1.4 V to 1.6 V
1.8
8.1
1.8
9.0
ns
VCC = 1.65 V to 1.95 V
1.5
6.4
1.5
7.1
ns
VCC = 2.3 V to 2.7 V
1.1
4.7
1.1
5.2
ns
VCC = 3.0 V to 3.6 V
0.9
4.0
0.9
4.4
ns
VCC = 1.1 V to 1.3 V
170
-
170
-
MHz
VCC = 1.4 V to 1.6 V
310
-
300
-
MHz
VCC = 1.65 V to 1.95 V
400
-
390
-
MHz
VCC = 2.3 V to 2.7 V
490
-
480
-
MHz
VCC = 3.0 V to 3.6 V
550
-
510
-
MHz
CL = 5 pF
tPHL, tPLH
fclk(max)
propagation delay
CP to Q
maximum clock
frequency
see Figure 6
see Figure 6
CL = 10 pF
tPHL, tPLH
fclk(max)
propagation delay
CP to Q
maximum clock
frequency
see Figure 6
VCC = 1.1 V to 1.3 V
2.8
14.4
2.8
15.9
ns
VCC = 1.4 V to 1.6 V
2.2
9.5
2.2
10.5
ns
VCC = 1.65 V to 1.95 V
1.9
7.5
1.9
8.3
ns
VCC = 2.3 V to 2.7 V
1.5
5.6
1.5
6.2
ns
VCC = 3.0 V to 3.6 V
1.3
4.5
1.3
5.0
ns
VCC = 1.1 V to 1.3 V
150
-
150
-
MHz
VCC = 1.4 V to 1.6 V
280
-
230
-
MHz
VCC = 1.65 V to 1.95 V
310
-
250
-
MHz
VCC = 2.3 V to 2.7 V
370
-
360
-
MHz
VCC = 3.0 V to 3.6 V
410
-
360
-
MHz
VCC = 1.1 V to 1.3 V
3.2
15.6
3.2
17.2
ns
VCC = 1.4 V to 1.6 V
2.5
10.7
2.5
11.8
ns
VCC = 1.65 V to 1.95 V
2.2
8.5
2.2
9.4
ns
VCC = 2.3 V to 2.7 V
1.9
6.3
1.9
7.0
ns
VCC = 3.0 V to 3.6 V
1.6
5.0
1.6
5.5
ns
VCC = 1.1 V to 1.3 V
120
-
120
-
MHz
VCC = 1.4 V to 1.6 V
190
-
160
-
MHz
VCC = 1.65 V to 1.95 V
240
-
190
-
MHz
VCC = 2.3 V to 2.7 V
300
-
270
-
MHz
VCC = 3.0 V to 3.6 V
320
-
300
-
MHz
see Figure 6
CL = 15 pF
tPHL, tPLH
fclk(max)
propagation delay
CP to Q
maximum clock
frequency
see Figure 6
see Figure 6
9397 750 14682
Product data sheet
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 01 — 12 September 2005
12 of 20
74AUP1G79
Philips Semiconductors
Low-power D-type flip-flop; positive-edge trigger
Table 10: Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7
Symbol
Parameter
Conditions
−40 °C to +85 °C −40 °C to +125 °C Unit
Min
Max
Min
Max
VCC = 1.1 V to 1.3 V
4.2
23.3
4.2
25.6
ns
VCC = 1.4 V to 1.6 V
3.3
14.3
3.3
15.7
ns
VCC = 1.65 V to 1.95 V
3.0
11.3
3.0
12.4
ns
VCC = 2.3 V to 2.7 V
2.7
8.5
2.7
9.4
ns
VCC = 3.0 V to 3.6 V
2.6
7.2
2.6
7.9
ns
VCC = 1.1 V to 1.3 V
70
-
70
-
MHz
VCC = 1.4 V to 1.6 V
120
-
110
-
MHz
VCC = 1.65 V to 1.95 V
150
-
120
-
MHz
VCC = 2.3 V to 2.7 V
190
-
170
-
MHz
VCC = 3.0 V to 3.6 V
200
-
190
-
MHz
VCC = 1.1 V to 1.3 V
1.6
-
1.6
-
ns
VCC = 1.4 V to 1.6 V
1.0
-
1.0
-
ns
CL = 30 pF
tPHL, tPLH
fclk(max)
propagation delay
CP to Q
maximum clock
frequency
see Figure 6
see Figure 6
CL = 5 pF, 10 pF, 15 pF and 30 pF
tsu(H)
tsu(L)
th
tW
set-up time HIGH
D to CP
set-up time LOW
D to CP
hold time D to CP
CP pulse width
HIGH or LOW
see Figure 6
VCC = 1.65 V to 1.95 V
0.9
-
0.9
-
ns
VCC = 2.3 V to 2.7 V
0.7
-
0.7
-
ns
VCC = 3.0 V to 3.6 V
0.6
-
0.6
-
ns
see Figure 6
VCC = 1.1 V to 1.3 V
1.6
-
1.6
-
ns
VCC = 1.4 V to 1.6 V
1.0
-
1.0
-
ns
VCC = 1.65 V to 1.95 V
0.9
-
0.9
-
ns
VCC = 2.3 V to 2.7 V
0.8
-
0.8
-
ns
VCC = 3.0 V to 3.6 V
1.0
-
1.0
-
ns
VCC = 1.1 V to 1.3 V
0
-
0
-
ns
VCC = 1.4 V to 1.6 V
0
-
0
-
ns
VCC = 1.65 V to 1.95 V
0
-
0
-
ns
VCC = 2.3 V to 2.7 V
0
-
0
-
ns
VCC = 3.0 V to 3.6 V
0
-
0
-
ns
see Figure 6
see Figure 6
VCC = 1.1 V to 1.3 V
3.5
-
3.5
-
ns
VCC = 1.4 V to 1.6 V
2.0
-
2.0
-
ns
VCC = 1.65 V to 1.95 V
1.9
-
1.9
-
ns
VCC = 2.3 V to 2.7 V
2.0
-
2.0
-
ns
VCC = 3.0 V to 3.6 V
2.2
-
2.2
-
ns
9397 750 14682
Product data sheet
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Rev. 01 — 12 September 2005
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74AUP1G79
Philips Semiconductors
Low-power D-type flip-flop; positive-edge trigger
13. Waveforms
VI
VM
D input
GND
th
th
t su(H)
t su(L)
1/fclk
VI
CP input
VM
GND
tW
t PHL
t PLH
VOH
VM
Q output
VOL
001aad498
Measurement points are given in Table 11.
Logic levels: VOL and VOH are typical output voltage drop that occur with the output load.
Fig 6. The clock input (CP) to output (Q) propagation delays, clock input (CP) pulse
width, data input (D) to clock input (CP) set-up times, clock input (CP) to data input
(D) hold times and the maximum input clock (CP) frequency
Table 11:
Measurement points
Supply voltage
Output
Input
VCC
VM
VM
VI
tr = tf
0.8 V to 3.6 V
0.5 × VCC
0.5 × VCC
VCC
≤ 3.0 ns
VCC
VEXT
5 kΩ
PULSE
GENERATOR
VI
VO
DUT
RT
CL
RL
001aac521
Test data is given in Table 12.
Definitions for test circuit:
RL = Load resistor
CL = Load capacitance including jig and probe capacitance
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator
Fig 7. Load circuitry for switching times
9397 750 14682
Product data sheet
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 01 — 12 September 2005
14 of 20
74AUP1G79
Philips Semiconductors
Low-power D-type flip-flop; positive-edge trigger
Table 12:
Test data
Supply voltage
Load
VEXT
VCC
CL
0.8 V to 3.6 V
5 pF, 10 pF,
5 kΩ or 1 MΩ open
15 pF and 30 pF
[1]
RL
[1]
tPZH, tPHZ
tPZL, tPLZ
GND
2 × VCC
For measuring enable and disable times RL = 5 kΩ, for measuring propagation delays, setup and hold times
and pulse width RL = 1 MΩ.
9397 750 14682
Product data sheet
tPLH, tPHL
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 01 — 12 September 2005
15 of 20
74AUP1G79
Philips Semiconductors
Low-power D-type flip-flop; positive-edge trigger
14. Package outline
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm
E
D
SOT353-1
A
X
c
y
HE
v M A
Z
5
4
A2
A
(A3)
A1
θ
1
Lp
3
L
e
w M
bp
detail X
e1
0
1.5
3 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D(1)
E(1)
e
e1
HE
L
Lp
v
w
y
Z(1)
θ
mm
1.1
0.1
0
1.0
0.8
0.15
0.30
0.15
0.25
0.08
2.25
1.85
1.35
1.15
0.65
1.3
2.25
2.0
0.425
0.46
0.21
0.3
0.1
0.1
0.60
0.15
7°
0°
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
OUTLINE
VERSION
SOT353-1
REFERENCES
IEC
JEDEC
JEITA
MO-203
SC-88A
EUROPEAN
PROJECTION
ISSUE DATE
00-09-01
03-02-19
Fig 8. Package outline SOT353-1 (TSSOP5)
9397 750 14682
Product data sheet
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 01 — 12 September 2005
16 of 20
74AUP1G79
Philips Semiconductors
Low-power D-type flip-flop; positive-edge trigger
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
SOT886
b
1
2
3
4×
(2)
L
L1
e
6
5
e1
4
e1
6×
A
(2)
A1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A (1)
max
A1
max
b
D
E
e
e1
L
L1
mm
0.5
0.04
0.25
0.17
1.5
1.4
1.05
0.95
0.6
0.5
0.35
0.27
0.40
0.32
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
OUTLINE
VERSION
SOT886
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
04-07-15
04-07-22
MO-252
Fig 9. Package outline SOT886 (XSON6)
9397 750 14682
Product data sheet
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 01 — 12 September 2005
17 of 20
74AUP1G79
Philips Semiconductors
Low-power D-type flip-flop; positive-edge trigger
15. Abbreviations
Table 13:
Abbreviations
Acronym
Description
CMOS
Complementary Metal Oxide Semiconductor
TTL
Transistor Transistor Logic
HBM
Human Body Model
ESD
ElectroStatic Discharge
MM
Machine Model
CDM
Charged Device Model
16. Revision history
Table 14:
Revision history
Document ID
Release date
Data sheet status
Change notice
Doc. number
Supersedes
74AUP1G79_1
20050912
Product data sheet
-
9397 750 14682
-
9397 750 14682
Product data sheet
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 01 — 12 September 2005
18 of 20
74AUP1G79
Philips Semiconductors
Low-power D-type flip-flop; positive-edge trigger
17. Data sheet status
Level
Data sheet status [1]
Product status [2] [3]
Definition
I
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
Please consult the most recently issued data sheet before initiating or completing a design.
[2]
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
18. Definitions
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
20. Trademarks
19. Disclaimers
Notice — All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
21. Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: [email protected]
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Product data sheet
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Rev. 01 — 12 September 2005
19 of 20
74AUP1G79
Philips Semiconductors
Low-power D-type flip-flop; positive-edge trigger
22. Contents
1
2
3
4
5
6
7
7.1
7.2
8
8.1
9
10
11
12
13
14
15
16
17
18
19
20
21
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 4
Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 8
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 18
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 19
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Contact information . . . . . . . . . . . . . . . . . . . . 19
© Koninklijke Philips Electronics N.V. 2005
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner. The information presented in this document does
not form part of any quotation or contract, is believed to be accurate and reliable and may
be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights.
Date of release: 12 September 2005
Document number: 9397 750 14682
Published in The Netherlands