ETC VG509A

tel:13510398583 13798484366
VG509A
1. General Description
T his EP R OM- Bas ed 8-bi t mic r o- contr o ller
us es a fully s ta tic CM OS tec hno logy pr oc ess
to achi eve high er s pe ed an d s ma lle r s iz e wit h
th e l ow powe r co ns u mpt ion and hi gh n oise
i mmu n ity . O n c hip me mor y i ncl ude s 1K
wor d s of ROM , and 41 by tes of s tatic RA M.
2. Features
T he foll owi n gs a re so me o f th e fea tur es on
th e har dwa re and s oftw are :
RC - L ow cos t RC os c illa to r
L F XT- L ow fr equ ency cry s ta l os cil lat or
XT AL- S tanda r d crys tal o sc ill ator
HF XT- Hi gh fr e que ncy cry s ta l osc ill ato r
◆ 3 o sc illat or s tar t- up ti me c an be s el ec ted
by pr o gra mmi ng o ptio n
◆ 8- bi t r eal ti me c lock/c oun ter (RT CC)
wi th 8- bi t pr o gr a mma bl e pr es ca ler
◆ On-ch ip RC osc illa tor ba se d Watc hdo g
T i me r ( WDT)
◆ Wa ke- up fr o m sl ee p on pi n c hange
◆ F ully COMS s tat ic de si gn
3. Applications
◆ 8- bi t data bus
◆ On chi p EP R OM size : 1 K words
◆ I nte r na l R AM s ize : 47 by tes
( 41 ge ner a l pur po se re gis ter s, 6 s pecia l
r eg is ter s)
◆ 36 si ngle w or d ins truc tio ns
T he ap plicat ion ar eas of t his VG5 09A ra nge
fr o m ap pli anc e motor co ntr ol a nd high s pee d
au to mo tive to low po wer re mot e
tr a ns mitt er s/r ece ivers, sma l l in st r ume n ts ,
ch ar g er s, toy, a uto mo bi le a nd P C
pe -r ip hera l … et c.
4. Pin Assignment
◆ 14- bi t in st r uc tion s
VG509A
◆ 2- le ve l s ta cks
◆ Oper at ing vol tag e : 2.5 V ~ 6. 0 V
◆ Oper at ing fr eq uen cy : 0 ~ 2 0 M Hz
◆ T he mos t fa s t e xe cution ti me is 200 ns
un der 20 MH z in a ll s ingl e cyc le
in st r uct ions e xcep t the b r anc h
in st r uct ion
◆ Addres sing mode s inc lud e dire ct,
in dir ect and r el at ive addr ess in g mo d es
5. Packages available:
P DIP 8
S OP 8
◆ P ower- on Res et
◆ S leep Mod e for p owe r savi ng
Sleep current @ 5V 5.0 A, WDT Enable
◆ 5 ty pes of os cil lat or c an be s el ec ted by
pr ogr a mmi n g o ptio n:
I NTRC- I nter na l 4 M Hz RC os c illato r
- 1 -
Ver 1.2
VG509A
5. Pin Function Description
P in N ame
I /O
F un ct ion De s cr ipt ion
P B0, P B1 , PB 3~P B5
I /O
P ort B, T TL in put level
RT CC/P B 2
I /O
Re al Time Cl ock / Cou nt er, S ch mitt T rig ger i np ut le ve ls
/MC LR
I
Mas te r Clear, Sc hmitt T rig ger i nput le vel s
O S C1
I
O scil lat or In put
O S C2
O
O scil lat or O utp ut
Vd d
P ow e r sup pl y
Vs s
G rou nd
6. Memory Map
( A) Reg ist er Map
Ad dr ess
BA NK 0
00
01
02
03
04
06
07 ~1F
BA NK 1
30 ~3F
De scri pt ion
I nd i r e c t Add r es s in g R eg is te r
RT CC
PC
S TA TUS
MS R
P ort B
G ene ra l pur p ose re gist ers
G ene ra l pur p ose re gist ers
( 1)I A R ( I ndi r ec t A ddre ss Reg is ter) : R0
( 2) RT CC (R ea l T i me C ount er /C oun ter Re gis te r) : R1
( 3) P C ( Pr ogr a m Co unte r) : R 2
Wr it e P C, CA LL - -- a lwa ys 0
J UMP -- - fro m in st r uct ion wor d
RTI W, RET - -- fr o m S T AC K
A9
A8
A7~ A0
W r i t e P C , J U M P , C AL L - - - fr o m S T A T US b 5
RTI W, RET - -- fr o m S T AC K
Wr it e P C --- fr o m AL U
J UMP, C ALL --- fr o m i n st r uct ion wor d
RTI W, RET - -- fr o m S T AC K
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Ver 1.2
VG509A
( 4) STA TUS (S ta tus regi st er) : R 3
Bi t
0
1
2
3
4
5
6
7
Sy mbo l
C
HC
Z
PF
TF
P AGE
——
P CW UF
F unc ti on
Ca rry bit
Ha lf C arry bi t
Z er o bit
P ower down bit
WDT Ti mer o ver flow Flag bi t
RO M page sel ec t bi t :
Uni mple me nt ed
P in ch ang e wak e u p fr om s le ep
( 5) MS R ( Me mor y Ba nk Sel ec t Regist er) : R 4
b7
b6
b5
b4
b3
b2
b1
b0
Ba nk s elect
Re ad on ly “1”
I ndir ec t A ddr ess in g M ode
( 7) P ORT B : R 6
P B5 ~P B0, I/ O R egist er
( 8) TM R ( Ti me Mod e Regi st er)
Bi t
Sy mbo l
F unc ti on
Presc al er Valu e
2
—
0
P S 2— 0
3
PSC
4
T CE
5
T CS
6
P BP HB
7
P BW UB
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
RT C C
r ate
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 1 28
1 : 2 56
0
1
0
1
0
1
0
1
WDT
r ate
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 1 28
P resc al er ass ign ment bi t :
0 — RTC C
1 — Wa tc hdog T i mer
RT C C si gnal E dge :
0 — I ncr e me nt on low- to - hi gh t ransit ion on RTC C p in
1 — I ncr e me nt on high-to- lo w tra nsiti on on RTCC pi n
RT C C si gnal se t :
0 — I nt er nal i ns tr uc tio n cy cle clo ck
1 — T rans i tion on RT CC p in
P ort B p ull-hi gh :
0 — E nab le
1 — Di sa ble
P ort B wake-up :
0 — E nab le
1 — Di sa ble
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Ver 1.2
VG509A
( 9) CPI O B ( Con tr ol P or t I /O Mode Re gis ter)
T he CPI O re gis ter is “wr it e- on ly ”
= “0”, I /O pi n in ou tput mod e;
= “1”, I /O pi n in inp ut mode .
Package:
8L SOP ( 150 mil body )
Unit : Inch
θ
Symbols
A
A1
D
E
H
L
Min.
0.053
0.004
0.189
0.150
0.228
0.016
0
Max.
0.069
0.010
0.196
0.157
0.244
0.050
8
NOTES :
Jedec outline MS-012 AA
- 4 -
Ver 1.2
VG509A
8PINS P-DIP(300mil body)
Unit : Inch
Symbols
A
A1
A2
D
Min.
-
0.015
0.115
0.355
Nor.
-
-
0.130
0.365
Max.
0.210
-
0.195
0.400
E
0.300 BSC
θ
E1
L
eB
0.240
0.115
-
0
0.250
0.130
-
7
0.280
0.150
0.430
15
NOTES :
Jedec outline: MS-001 BA
- 5 -
Ver 1.2