Order this document by MDC5001T1/D SEMICONDUCTOR TECHNICAL DATA • Maintains Stable Bias Current in N–Type Discrete Bipolar Junction and Field Effect Transistors • Provides Stable Bias Using a Single Component Without Use of Emitter Ballast and Bypass Components SILICON SMALLBLOCK INTEGRATED CIRCUIT • Operates Over a Wide Range of Supply Voltages Down to 1.8 Vdc • Reduces Bias Current Variation Due to Temperature and Unit–to–Unit Parametric Changes • Consumes t 0.5 mW at VCC = 2.75 V 6 • Active High Enable is CMOS Compatible 5 4 This device provides a reference voltage and acts as a DC feedback element around an external discrete, NPN BJT or N–Channel FET. It allows the external transistor to have its emitter/source directly grounded and still operate with a stable collector/drain DC current. It is primarily intended to stabilize the bias of discrete RF stages operating from a low voltage regulated supply, but can also be used to stabilize the bias current of any linear stage in order to eliminate emitter/source bypassing and achieve tighter bias regulation over temperature and unit variations. The “ENABLE” polarity nulls internal current, Enable current, and RF transistor current in “STANDBY.” This device is intended to replace a circuit of three to six discrete components. The combination of low supply voltage, low quiescent current drain, and small package make the MDC5001T1 ideal for portable communications applications such as: 1 2 3 CASE 419B–01, Style 19 SOT–363 INTERNAL CIRCUIT DIAGRAM VCC (4) R1 • Cellular Telephones Q1 • Pagers R2 • PCN/PCS Portables • GPS Receivers Vref (6) R3 • PCMCIA RF Modems • Cordless Phones Q2 • Broadband and Multiband Transceivers and Other Portable Wireless Products VENBL (5) R5 MAXIMUM RATINGS Rating Power Supply Voltage Ambient Operating Temperature Range Storage Temperature Range Junction Temperature Iout (1) R4 Q4 Symbol Value Unit VCC 15 Vdc TA –40 to +85 °C Tstg –65 to +150 °C TJ 150 °C Collector Emitter Voltage (Q2) VCEO –15 V Enable Voltage (Pin 5) VENBL VCC V Symbol Max Unit R6 GND (2) and (3) THERMAL CHARACTERISTICS Characteristic Total Device Power Dissipation (FR–5 PCB of 1″ × 0.75″ × 0.062″, TA = 25°C) Derate above 25°C Thermal Resistance, Junction to Ambient PD RθJA mW 150 1.2 mW/°C 833 °C/W SMALLBLOCK is a trademark of Motorola, Inc. REV 1 Small–Signal Transistors, FETs and Diodes Device Data Motorola Motorola, Inc. 1997 1 MDC5001T1 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Recommended Operating Supply Voltage VCC 1.8 2.75 10 Volts Power Supply Current (VCC = 2.75 V) Vref, Iout are unterminated See Figure 8 ICC — 130 200 µA V(BR)CEO2 15 Q2 Collector Emitter Breakdown Voltage (IC2 = 10 µA, IB2 = 0) Reference Voltage (VENBL = VCC = 2.75 V, Vout = 0.7 V) (Iout = 30 µA) (Iout = 150 µA) See Figure 1 Volts Vref Volts 2.050 2.110 2.075 2.135 2.100 2.160 ±5.0 ±15 ±25 ±10 ±30 ±50 DVref Reference Voltage (VENBL = VCC = 2.75 V, Vout = 0.7 V, –40°C ≤ TA ≤ +85°C) VCC Pulse Width = 10 mS, Duty Cycle = 1% (Iout = 10 µA) (Iout = 30 µA) (Iout = 100 µA) See Figures 2 and 11 mV The following SPICE models are provided as a convenience to the user and every effort has been made to insure their accuracy. However, no responsibility for their accuracy is assumed by Motorola. .MODEL Q4 NPN BF = 136 BR = 0.2 CJC = 318.6 f CJE = 569.2 f CJS = 1.9 p EG = 1.215 FC = 0.5 IKF = 24.41 m IKR = 0.25 IRB = 0.0004 IS = 256E–18 ISC = 1 f ISE = 500E–18 ITF = 0.9018 MJC = 0.2161 MJE = 0.3373 MJS = 0.13 NC = 1.09 2 NE = 1.6 NF = 1.005 RB = 140 RBM = 70 RC = 180 RE = 1.6 TF = 553.6 p TR = 10 n VAF = 267.6 VAR = 12 VJC = 0.4172 VJE = 0.7245 VJS = 0.39 VTF = 10 XTB = 1.5 XTF = 2.077 XTI = 3 .MODEL Q1, Q2 PNP BF = 87 BR = 0.6 CJC = 800E–15 CJE = 46E–15 EG = 1.215 FC = 0.5 IKF = 3.8E–04 IKR = 2.0 IRB = 0.9E–3 IS = 1.027E–15 ISC = 10E–18 ISE = 1.8E–15 ITF = 2E–3 MJC = 0.2161 MJE = 0.2161 NC = 0.8 NE = 1.38 NF = 1.015 NK = 0.5 NR = 1.0 RB = 720 RBM = 470 RC = 180 RE = 26 TF = 15E–9 TR = 50E–09 VAF = 54.93 VAR = 20 VAR = 20 VJC = 0.4172 VJE = 0.4172 VTF = 10 XTB = 1.5 XTF = 2.0 XTI = 3 RESISTOR VALUES R1 = 12 K R2 = 6 K R3 = 3.4 K R4 = 12 K R5 = 20 K R6 = 40 K These models can be retrieved electronically by accessing the Motorola Web page at http://design–net.sps.mot.com/models and searching the section on SMALLBLOCK models Motorola Small–Signal Transistors, FETs and Diodes Device Data MDC5001T1 V CC , SUPPLY VOLTAGE (Vdc) 0 1 2 3 4 5 6 7 8 0 1 2 TJ = 25°C V ENBL = VCC 3 4 5 6 7 8 Iout Iout Iout Iout 9 = 1000 m A = 500 m A = 100 m A = 10 mA 10 TYPICAL OPEN LOOP CHARACTERISTICS Vref (Vdc) Figure 1. Vref versus VCC @ Iout Motorola Small–Signal Transistors, FETs and Diodes Device Data 3 MDC5001T1 TYPICAL OPEN LOOP CHARACTERISTICS (Refer to Circuits of Figures 10 through 15) 50 30 VCC = 2.75 Vdc VENBL = VCC Iout = 30 mA 20 ∆V ref (mV) 800 Iout = 100 mA ICC , SUPPLY CURRENT ( m Adc) 40 900 Iout = 500 mA 10 0 Iout = 10 mA –10 –20 –30 VENBL = VCC 600 TJ = 25°C 500 TJ = 85°C 400 300 200 100 –40 –50 –45 –35 –25 –15 –5 5 15 25 35 45 55 TJ, JUNCTION TEMPERATURE (°C) 65 75 0 85 0 8 9 10 160 TJ = –40°C TJ = 25°C TJ = 85°C 500 300 TJ = –40°C VCC = 2.75 Vdc Iref = 30 mA 140 TJ = 25°C 120 IENABLE (m Adc) H FE , Q2 DC CURRENT GAIN 3 4 5 6 7 VCC, SUPPLY VOLTAGE (Vdc) Figure 3. ICC versus VCC @ TJ 1000 200 100 50 100 TJ = 85°C 80 60 40 30 10 10 2 1 Figure 2. DVref versus TJ @ Iout 20 TJ = –40°C 700 VCE2 = Vout – Vref = –1.5 Vdc 20 0 20 30 50 100 200 300 Iout, DC OUTPUT CURRENT (mAdc) 500 1000 0 0.5 Figure 4. Q2 Current Gain versus Output Current @ TJ 1.0 1.5 2.0 VENABLE (Vdc) 2.5 3.0 Figure 5. Ienable versus Venable 6.0 Iout = 500 mA Iout = 30 mA VCC = 5.0 Vdc 5.0 Vref , (Vdc) 4.0 3.3 Vdc 3.0 2.75 Vdc 2.0 1.8 Vdc TJ = 25°C 1.0 MIN VENBL FOR STABLE Vref @ VCC 0 0 0.5 1.0 1.5 2.0 2.5 3.0 Venable (Vdc) 3.5 4.0 4.5 5.0 Figure 6. Vref versus Venable @ VCC and Iout 4 Motorola Small–Signal Transistors, FETs and Diodes Device Data MDC5001T1 TYPICAL CLOSED LOOP PERFORMANCE (Refer to Circuits of Figures 16 & 17) 1.5 D IC 3 (%) 0.5 0 IC3 = 15 mA 2.0 IC3 = 10 mA IC3 = 3 mA –0.5 1.0 0 –1.0 –1.0 –1.5 IC3 = 15 mA IC3 = 10 mA IC3 = 3 mA IC3 = 1 mA 3.0 ∆V ref (%) 1.0 4.0 VCC = 2.75 Vdc VENBL = VCC VCC = 2.75 Vdc VENBL = VCC TA = 25°C IC3 = 1 mA –2.0 –2.0 –45 –35 –25 –15 –5 5 15 25 35 45 55 TA, AMBIENT TEMPERATURE (°C) –3.0 65 75 85 Figure 7. DIC3 versus TA @ IC3 0 50 100 150 200 250 EXTERNAL TRANSISTOR DC BETA @ IC3 300 Figure 8. DVref versus External Transistor DC Beta @ IC3 10 VCC = 2.75 Vdc VENBL = VCC TA = 25°C D I C 3 (%) 5.0 0 –5.0 IC3 = 15 mA IC3 = 10 mA IC3 = 3 mA IC3 = 1 mA –10 –15 0 50 100 150 200 250 HFE, EXTERNAL TRANSISTOR DC BETA 300 Figure 9. DIC3 versus External Transistor DC Beta @ IC3 Motorola Small–Signal Transistors, FETs and Diodes Device Data 5 MDC5001T1 OPEN LOOP TEST CIRCUITS ICC ICC VCC (4) VCC (4) Q1 Q1 ENABLE (5) ENABLE (5) Vref (6) Vref (6) Q2 Iout (1) Q2 Iout (1) + Iout MDC5001 MDC5001 + Q4 VCC + VBE3 = 0.7 V GND (2) & (3) GND (2) & (3) Figure 11. Vref versus VCC Test Circuit VCC (4) VCC (4) Q1 MDC5001 Q1 IB ENABLE (5) Vref (6) Q2 Iout (1) Vref (6) Q2 Iref Iout GND (2) & (3) VBE3 = 0.7 V + Iout Q4 V Vref Iout Iout (1) MDC5001 Q4 VCC = 2.75 V A See NOTE 1 Figure 10. ICC versus VCC Test Circuit + V Vref Iout VCC ENABLE (5) Iref Q4 A Iout A GND (2) & (3) 1.5 V + See NOTE 1 Figure 12. Vref versus TJ Test Circuit Figure 13. HFE versus Iout Test Circuit VCC (4) VCC (4) + + VCC = 2.75 V Q1 Q1 VCC ENABLE (5) IENBL A Vref (6) Q2 MDC5001 Q4 + Iout (1) Iout Vref (6) ENABLE (5) Iref = 30 mA Q2 MDC5001 + + GND (2) & (3) VBE3 = 0.7 V GND (2) & (3) Iref Iout Vref + V Q4 VENBL VENBL Iout (1) Iout A + VBE3 = 0.7 V See NOTE 1 Figure 14. IENBL versus VENBL Test Circuit Figure 15. Vref versus VENBL Test Circuit NOTE 1: VBE3 is used to simulate actual operating conditions that reduce VCE2 & HFE2, and increase IB2 & Vref. 6 Motorola Small–Signal Transistors, FETs and Diodes Device Data MDC5001T1 CLOSED LOOP TEST CIRCUITS VCC (4) A IC3 Q1 Vref (6) ENABLE (5) Q2 Iout (1) A MDC5001 + VBE3 Q3 Iout Q4 V VCC = 2.75 V Vref GND (2) & (3) Figure 16. Vref and RF Stage IC3 versus HFE3 Test Circuit VCC (4) A IC3 Q1 Vref (6) ENABLE (5) Q2 Iout (1) 1K VBE3 MDC5001 + Q4 VCC = 2.75 V Q3 MRF941 HFE = 113 51 51 0.1 mF 100 pF 100 pF 0.018 mF 0.018 mF GND (2) & (3) NOTE: External R–Cs used to Maintain Broadband Stability of MRF941 Figure 17. RF Stage IC3 versus TA Test Circuit Motorola Small–Signal Transistors, FETs and Diodes Device Data 7 MDC5001T1 APPLICATION CIRCUITS REGULATED VCC = 2.75 Vdc VCC (4) IC3 = 3 mAdc Q1 ENABLE (5) Q2 VENBL Iout (1) 470 pF 30 nH 180 MDC5001 + R5 240 W Vref = 2.025 Vdc Vref (6) 1K Q4 Iout 8.0 nH 470 pF VCC = 2.75 V 18 nH RF OUT Q3 MRF9411 Typ RF IN 9 pF GND (2) & (3) 5–STEP DESIGN PROCEDURE Step 1: Step 2: Step 3: Step 4: Step 5: Choose VCC (1.8 V Min to 10 V Max) Insure that Min VENBL is ≥ minimum indicated in Figures 5 and 6. Choose bias current, IC3, and calculate needed Iout from typ HFE3 From Figure 1, read Vref for VCC and Iout calculated. Calculate Nominal R5 = (VCC – Vref) (IC3 + Iout). Tweak as desired. Figure 18. Class A Biasing of a Typical 900 MHz BJT Amplifier Application REGULATED VCC = 2.75 Vdc VCC (4) ID = 15 mAdc R5 43 W Q1 RFC Vref (6) ENABLE (5) Q2 VENBL Vref = 2.085 Vdc Iout (1) 1000 pF 6.8 nH MDC5001 + 2.7 pF RF OUT 1K Q4 Iout VCC = 2.75 V 12.5 nH 1000 pF R6 22 K RF IN GND (2) & (3) 6.1 pF Q3 MRF9811 Typ + EGS 5 Vdc 7–STEP DESIGN PROCEDURE Step 1: Step 2: Step 3: Step 4: Choose VCC (1.8 V Min to 10 V Max) Insure that Min VENBL is ≥ minimum indicated in Figures 5 and 6. Choose bias current, ID, and determine needed gate–source voltage, VGS. Choose Iout keeping in mind that too large an Iout can impair MDC5000 DVref/DTJ performance (Figure 2) but too large an R6 can cause IDGO & IGSO to bias on the FET. Step 5: Calculate R6 = (VGS + EGS) Iout Step 6: From Figure 1, read Vref for VCC & Iout chosen Step 7: Calculate Nominal R5 = (VCC – Vref) (ID + Iout). Tweak as desired. Figure 19. Class A Biasing of a Typical 890 MHz Depletion Mode GaAs FET Amplifier 8 Motorola Small–Signal Transistors, FETs and Diodes Device Data MDC5001T1 PACKAGE DIMENSIONS A G NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. V 6 5 4 1 2 3 DIM A B C D G H J K N S V –B– S 0.2 (0.008) D 6 PL M B M INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC ––– 0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 0.012 0.016 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC ––– 0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 0.30 0.40 N STYLE 19: PIN 1. I OUT 2. GND 3. GND 4. V CC 5. V EN 6. V REF J C K H CASE 419B–01 ISSUE G P P DIM L P S W INCHES MIN MAX 0.035 0.026 BSC 0.063 NOM 0.014 NOM MILLIMETERS MIN MAX 0.9 0.65 BSC 1.6 NOM 0.34 NOM S L W Motorola Small–Signal Transistors, FETs and Diodes Device Data STYLE 19: PIN 1. I OUT 2. GND 3. GND 4. V CC 5. V EN 6. V REF 9 MDC5001T1 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. 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