GM71V65800C 8,388,608 WORDS x 8 BIT CMOS DYNAMIC RAM Pin Configuration Description 32 SOJ / TSOP II The GM71V65800C is the second generation dynamic RAM organized 8,388,608 words by 8 bits. The GM71V65800C utilizes 0.35um CMOS Silicon Gate Process Technology as well as advanced circuit techniques for wide operating margins, both internally and to the system user. System oriented features include single power supply of 3.3V+/- 0.3V tolerance, direct interfacing capability with high performance logic families such as Schottky TTL. The GM71V65800C offers Fast Page Mode as a high speed access mode. Features • 8,388,604 Words x 8 Bit • Fast Page Mode Capability • Fast Access Time & Cycle Time (Unit: ns) tRAC tAA tCAC tRC tPC 35 GM71V65800C-5 50 25 13 90 GM71V65800C-6 60 30 15 110 40 GM71V65800C-7 70 35 18 130 45 VCC 1 32 VSS I/O0 2 31 I/O7 I/O1 3 30 I/O6 I/O2 4 29 I/O5 I/O3 5 28 I/O4 NC 6 27 VSS VCC 7 26 CAS WE 8 25 OE RAS 9 24 NC A0 10 23 A11 A1 11 22 A10 A2 12 21 A9 A3 13 20 A8 A4 14 19 A7 A5 15 18 A6 VCC 16 17 VSS (Top View) • Low Power - Active : 522 mW / 450 mW / 360 mW (MAX) - Standby : 3.6 mW ( CMOS level :MAX ) • RAS Only Refresh, CAS before RAS Refresh, Hidden Refresh Capability • LVTTL • 4096 Refresh Cycles/64 ms • Single Power Supply of 3.3V+/- 0.3V with a built-in VBB generator Rev 0.1 / Apr’01 * This Data Sheet is subject to change without notice. GM71V65800C Pin Description Pin Function A0-A11 Address Inputs A0-A11 Refresh Address Inputs Pin WE I/O0 - I/O7 Function Write Enable Data Input / Data Output RAS Row Address Strobe VCC Power (+3.3V) CAS Column Address Strobe VSS Ground OE Output Enable NC No Connection Ordering Information Type No. Access Time Package GM71V65800CJ-5 GM71V65800CJ-6 GM71V65800CJ-7 50ns 60ns 70ns 400 Mil 32Pin Plastic SOJ GM71V65800CT-5 GM71V65800CT-6 GM71V65800CT-7 50ns 60ns 70ns 400 Mil 32Pin Plastic TSOP II Absolute Maximum Ratings* Symbol Parameter Rating Unit 0 to 70 C -55 to 125 C -0.5 to VCC + 0.5 (MAX ; 4.6V) V -0.5 to 4.6 V TA Ambient Temperature under Bias TSTG Storage Temperature (Plastic) VIN/VOUT Voltage on any Pin Relative to VSS VCC Voltage on VCC Relative to VSS IOUT Short Circuit Output Current 50 mA PD Power Dissipation 1.0 W *Note : Operation at or above Absolute Maximum Ratings can adversely affect device reliability. Recommended DC Operating Conditions (TA = 0 ~ 70C) Symbol Parameter Min Typ Max Unit VCC Supply Voltage 3.0 3.3 3.6 V VIH Input High Voltage 2.0 - Vcc+0.3 V VIL Input Low Voltage -0.3 - 0.8 V Rev 0.1 / Apr’01 GM71V65800C DC Electrical Characteristics: (VCC = 3.3V+/-0.3V, TA = 0 ~ 70C) Symbol Parameter Min Max Unit VOH Output Level Output "H" Level Voltage (IOUT = -2mA) 2.4 - V VOL Output Level Output "L" Level Voltage (IOUT = 2mA) - 0.4 V ICC1 Operating Current Average Power Supply Operating Current (RAS, CAS Cycling: tRC = tRC min) 50ns - 145 60ns - 125 70ns - 100 - 2 ICC2 ICC3 ICC4 ICC5 ICC6 Standby Current (TTL) Power Supply Standby Current (RAS, CAS = VIH, DOUT = High-Z) RAS-Only Refresh Current Average Power Supply Current RAS-Only Refresh Mode (RAS Cycling, CAS = VIH, tRC = tRC min) 50ns - 145 60ns - 125 70ns - 100 Fast Page Mode Current Average Power Supply Current Fast Page Mode (RAS = VIL, CAS, Address Cycling: tPC = tPC min) 50ns - 110 60ns - 100 70ns - 90 - 0.5 Standby Current (CMOS) Power Supply Standby Current (RAS, CAS¡ ÃVCC-0.2V, DOUT = High-Z) CAS-before-RAS Refresh Current (tRC = tRC min) mA mA 2 mA 1, 3 mA - 145 60ns - 125 70ns - 100 RAS = VIH CAS = VIL DOUT = Enable - 5 mA II(L) Input Leakage Current, Any Input (0V¡ ÂVIN¡ ÂVcc) -5 5 uA IO(L) Output Leakage Current (DOUT is Disabled, 0V¡ ÂVOUT¡ Â Vcc) -5 5 uA Standby Current mA Note: 1. ICC depends on output load condition when the device is selected. ICC(max) is specified at the output open condition. 2. Address can be changed once or less while RAS = VIL. 3. Address can be changed once or less while CAS = VIH. Rev 0.1 / Apr’01 1, 2 mA 50ns ICC7 Note 1 GM71V65800C Capacitance (VCC = 3.3V+/- 0.3V, TA = 25C) Symbol Parameter Typ Max Unit Note CI1 Input Capacitance (Address, Data-In) - 5 pF 1 CI2 Input Capacitance (Clocks) - 7 pF 1 CO Output Capacitance (Data-Out) - 7 pF 1, 2 Note: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method. 2. CAS = VIH to disable DOUT. AC Characteristics (VCC = 3.3V+/- 0.3V, TA = 0 ~ 70C, Notes 1, 14,15,16) Test Conditions Input rise and fall times : 5ns Output timing reference levels : VOL/VOH = 0.8/2.0V Input timing reference levels : VIL/VIH = 0.8/2.4V Output load : 1 TTL gate+CL (100pF) (Including scope and jig) Read, Write, Read-Modify-Write and Refresh Cycles (Common Parameters) Parameter Symbol GM71V65800C-5 GM71V65800C-6 GM71V65800C-7 Min Max Min Max Min Max Unit Note tRC Random Read or Write Cycle Time 90 - 110 - 130 - ns tRP RAS Precharge Time 30 - 40 - 50 - ns tCP CAS Precharge Time 10 - 10 - 10 - ns tRAS RAS Pulse Width 50 10000 60 10000 70 10000 ns tCAS CAS Pulse Width 13 10000 15 10000 20 10000 ns tASR Row Address Set-up Time 0 - 0 - 0 - ns tRAH Row Address Hold Time 10 - 10 - 10 - ns tASC Column Address Set-up Time 0 - 0 - 0 - ns tCAH Column Address Hold Time 10 - 15 - 15 - ns tRCD RAS to CAS Delay Time 20 37 20 45 20 50 ns 8 tRAD RAS to Column Address Delay Time 15 25 15 30 15 35 ns 9 tRSH RAS Hold Time 13 - 15 - 20 - ns tCSH CAS Hold Time 50 - 60 - 70 - ns tCRP CAS to RAS Precharge Time 5 - 5 - 5 - ns tODD OE to DIN Delay Time 13 - 15 - 20 - ns tDZO OE Delay Time from DIN 0 - 0 - 0 - ns tDZC tT CAS Set-up Time from DIN Transition Time (Rise and Fall) 0 - 0 - 0 - ns 3 50 3 50 3 50 ns tREF Refresh Period - 64 - 64 - 64 ms Rev 0.1 / Apr’01 7 GM71V65800C Read Cycles Parameter Symbol GM71V65800C-5 Min Max GM71V65800C-6 GM71V65800C-7 Min Max Min Max Unit Note tRAC Access Time from RAS - 50 - 60 - 70 ns 2,3,17 tCAC Access Time from CAS - 13 - 15 - 20 ns tAA Access Time from Column Address - 25 - 30 - 35 ns 3,4 13,17 3,5 13,17 tOAC Access Time from OE - 13 - 15 - 20 ns tRCS Read Command Set-up Time 0 - 0 - 0 - ns tRCH Read Command Hold Time to CAS 0 - 0 - 0 - ns tRRH Read Command Hold Time to RAS 0 - 0 - 0 - ns tRAL Column Address to RAS Lead Time 25 - 30 - 35 - ns tOFF Output Buffer Turn-off Time 0 13 0 15 0 20 ns 6 tOEZ Output Buffer Turn-off Time from OE 0 13 0 15 0 20 ns 6 tCDD CAS to DIN Delay Time 13 - 15 - 20 - ns tOEP OE Pulse width 13 - 15 - 20 - ns 3,17 Write Cycles GM71V65800C-5 GM71V65800C-6 GM71V65800C-7 Parameter Symbol Min Max Min Max Min Max Unit Note tWCS Write Command Set-up Time 0 - 0 - 0 - ns tWCH Write Command Hold Time 10 - 15 - 15 - ns tWP Write Command Pulse Width 10 - 10 - 10 - ns tRWL Write Command to RAS Lead Time 15 - 15 - 20 - ns tCWL Write Command to CAS Lead Time 13 - 15 - 20 - ns tDS Data-in Set-up Time 0 - 0 - 0 - ns 11 tDH Data-in Hold Time 10 - 15 - 15 - ns 11 Rev 0.1 / Apr’01 10 GM71V65800C Read-Modify-Write Cycles GM71V65800C-5 GM71V65800C-6 GM71V65800C-7 Parameter Symbol Min Max Min Max Min Max Unit Note tRWC Read-Modify-Write Cycle Time 133 - 155 - 185 - ns tRWD RAS to WE Delay Time 73 - 85 - 100 - ns 10 tCWD CAS to WE Delay Time 36 - 40 - 50 - ns 10 tAWD Column Address to WE Delay Time 48 - 55 - 65 - ns 10 tOEH OE Hold Time from WE 13 - 15 - 20 - ns Refresh Cycle Symbol Parameter GM71V65800C-5 GM71V65800C-6 Min Min Max Min Max Max GM71V65800C-7 Unit Note tCSR CAS Set-up Time (CAS-before-RAS Refresh Cycle) 10 - 10 - 10 - ns tCHR CAS Hold Time (CAS-before-RAS Refresh Cycle) 10 - 10 - 10 - ns tRPC RAS Precharge to CAS Hold Time 10 - 10 - 10 - ns tCPN CAS Precharge Time in Normal Mode 10 - 10 - 10 - ns Fast Page Mode Cycles Parameter Symbol GM71V65800C-5 GM71V65800C-6 GM71V65800C-7 Unit Note Min Max Min Max Min Max tPC tCP tRASP tACP tRHCP Fast Page Mode Cycle Time 35 - 40 - 45 - ns Fast Page Mode CAS Precharge Time 10 - 10 - 10 - ns Fast Page Mode RAS Pulse Width - 100,000 - 100,000 - 100,000 ns 12 Access Time from CAS Precharge - 30 - 35 - 40 ns 3,13 17 RAS Hold Time from CAS Precharge 30 - 35 - 40 - ns tCPW Fast Page Mode Read-Modify-Write Cycle CAS Precharge to WE Delay Time 50 - 55 - 65 - ns 10 tPRWC Fast Page Mode Read-Modify-Write Cycle Time 76 - 85 - 100 - ns 10 Rev 0.1 / Apr’01 GM71V65800C Test Mode Cycles GM71V65800C-5 Parameter Symbol Min Max GM71V65800C-6 GM71V65800C-7 Min Max Min Max Unit Note tWS Test Mode WE Set-up Time 0 - 0 - 0 - ns tWH Test Mode WE Hold Time 10 - 10 - 10 - ns Counter Test Cycles Parameter Symbol GM71V65800C-5 Min tCPT CAS Precharge Time in Counter Test Cycle 40 Max GM71V65800C-6 GM71V65800C-7 Min Max Min Max 40 - 40 - - Notes: 1. AC Measurements assume tT = 5ns. 2. Assumes that tRCD<=tRCD(max) and tRAD<=tRAD(max). If tRCD or tRAD is greater than the maximum recommended value shown in this table, tRAC exceeds the value shown. 3. Measured with a load circuit equivalent to 1 TTL loads and 100pF. 4. Assumes that tRCD=>tRCD(max) and tRAD<=tRAD(max). 5. Assumes that tRCD<=tRCD(max) and tRAD=>tRAD(max). 6. tOFF(max) defines the time at which the output achieves the open circuit condition and is not referenced to output voltage levels. 7. VIH(min) and VIL(max) are reference levels for measuring timing of input signals. Also, transition times are measured between VIH and VIL. 8. Operation with the tRCD(max) limit insures that tRAC(max) can be met, tRCD(max) is specified as a reference point only; if tRCD is greater than the specified tRCD(max) limit, then access time is controlled exclusively by tCAC. 9. Operation with the tRAD(max) limit insures that tRAC(max) can be met, tRAD(max) is specified as a reference point only; if tRAD is greater than the specified tRAD(max) limit, then access time is controlled exclusively by tAA. Rev 0.1 / Apr’01 Unit Note ns GM71V65800C 10. tWCS, tRWD, tCWD tCPW and tAWD are not restrictive operating parameters. They are included in the data sheet as electrical characteristics only; if tWCS>=tWCS(min), the cycle is an early write cycle and the data out pin will remain open circuit (high impedance) throughout the entire cycle; if tRWD>=tRWD(min), tCWD>=tCWD(min), tAWD>=tAWD(min) and tCPW>=tCPW(min), the cycle is a readmodify-write and the data output will contain data read from the selected cell; if neither of the above sets of conditions is satisfied, the condition of the data out (at access time) is indeterminate. 11. These parameters are referenced to CAS leading edge in early write cycles and to WE leading edge in delayed write or a read modify write cycle. 12. tRASP defines RAS pulse width in fast page mode cycles. 13. Access time is determined by the longer of tAA or tCAC or tACP. 14. An initial pause of 100us is required after power up followed by a minimum of eight initialization cycles (RAS only refresh cycle or CAS before RAS refresh cycle). If the internal refresh counter is used, a minimum of eight CAS before RAS refresh cycles is required. 15. In delayed write or read-modify-write cycles, OE must disable output buffer prior to applying data to the device. 16. Test mode operation specified in this data sheet is 2-bit test function controlled by control address bits - - - CA0. This test mode operation can be performed by WE-and-CAS-before-RAS (WCBR) refresh cycle. Refresh during test mode operation will be performed by normal read cycles or by WCBR refresh cycles. When the state of two test bits accord each other, the condition of the output data is high level. When the state of two test bits do not accord, the condition of the output data is low level. In order to end this test mode operation, perform a RAS only refresh cycle or a CAS-before-RAS refresh cycle. 17. In a test mode read cycle, the value of tRAC, tAA, tCAC, tOAC and tACP is delayed for 2ns to 5ns for the specified value. These parameters should be specified in test mode cycles by adding the above value to the specified value in this data sheet. Rev 0.1 / Apr’01 GM71V65800C Package Dimension Unit: Inches (mm) 32 SOJ 0.820(20.83) MIN 0.835(21.21) MAX 0.083(2.10) MIN 0.128(3.25) MIN 0.148(3.75) MAX 0.026(0.67) MIN 0.032(0.81) MAX 0.050(1.27) TYP 0.015(0.38) MIN 0.020(0.50) MAX 32 TSOP (TYPE II) o 0.016(0.40) MIN 0.024(0.60) MAX 0.400(0.10) 0.455(11.56) MIN 0.471(11.96) MAX 0~8 0.004(0.10) MIN 0.010(0.25) MAX 0.821(20.85) MIN 0.829(21.05) MAX 0.047(1.20) 0.037(0.95) Rev 0.1 / Apr’01 0.050(1.27) TYP 0.012(0.30) MIN 0.020(0.50) MAX 0.445(11.31) MAX 0.435(11.06) MIN 0.379(9.63) MAX 0.361(9.17) MIN 0.395(10.03) MIN 0.405(10.29) MAX 0.025(0.64) MIN