RENESAS HD74LVC4245A_05

HD74LVC4245A
Octal Bus Transceiver and 3.3 V to 5 V shifters
with 3-state Outputs
REJ03D0378–0101
Rev.1.01
Apr. 13, 2005
Description
The HD74LVC4245A has eight bus transceivers with three state outputs in a 24 pin package. When (DIR) is high, data
flows from the A inputs to the B outputs, and when (DIR) is low, data flows from the B inputs to the A outputs. A and
B bus are separated by making enable input (OE) high level. And this product has two terminals (VCCA, VCCB), VCCA
(5V) is connected with control input and A bus side, VCCB (3.3V) connected with B bus side. VCCA and VCCB are
isolated. This allows for translation from a 3.3 V to a 5 V environment, and vice versa. Low voltage and high-speed
operation is suitable at the battery drive product (note type personal computer) and low power consumption extends the
life of a battery for long time operation.
Features
• This product function as level shift transceiver that change VCCA input level to VCCB output level, VCCB input level to
VCCA output level by providing different supply voltage to VCCA and VCCB.
• This product is able to the power management: Turn on and off the supply on VCCB side with providing the supply
of VCCA. (Enable input (OE): High level )
• VCCA = 4.5 V to 5.5 V, VCCB = 2.7 V to 3.6 V
• All control input VI (max) = 5.5 V (@VCCA = 0 V to 5.5 V)
• All A bus side input outputs VI/O (max) = 5.5 V
(@VCCA = 0 V or output off state)
• All B bus side input outputs VI/O (max) = 3.6 V
(@VCCB = 0 V or output off state)
• High output current
A bus side : ±24 mA (@VCCA = 4.5 V to 5.5 V)
B bus side : ±12 mA (@VCCB = 2.7 V)
±24 mA (@VCCB = 3.0 V to 3.6 V)
• Ordering Information
Part Name
HD74LVC4245ATEL
Package Type
Package Code
(Previous Code)
Package
Abbreviation
TSSOP–24 pin
PTSP0024JB–A
(TTP–24DBV)
T
Taping Abbreviation
(Quantity)
EL (1,000 pcs/reel)
Function Table
Inputs
OE
L
L
H
H: High level
L: Low level
X: Immaterial
Z: High impedance
Rev.1.01 Apr. 13, 2005 page 1 of 8
DIR
L
H
X
Operation
B data to A bus
A data to B bus
Z
HD74LVC4245A
Pin Arrangement
VCCA 1
24 VCCB
DIR 2
23 VCCB
A1 3
22 OE
A2 4
21 B1
A3 5
A4 6
20 B2
A5 7
18 B4
A6 8
17 B5
A7 9
16 B6
A8 10
15 B7
GND 11
14 B8
GND 12
13 GND
19 B3
(Top view)
Absolute Maximum Ratings
(1) For VCCA
Item
Supply voltage
Input voltage*1
Input / output voltage
Symbol
VCCA
VI
VI/O
Input diode current
Output diode current
IIK
IOK
Output current
VCCA, GND current
Maximum power dissipation
*2
at Ta = 25°C (in still air)
Storage temperature
Unit
V
V
V
IO
ICCA or IGND
PT
Ratings
–0.5 to 6.0
–0.5 to 6.0
–0.5 to VCCA+0.5
–0.5 to 6.0
–50
–50
50
±50
100
862
Tstg
–65 to 150
°C
Symbol
VCCB
VI/O
Ratings
–0.5 to 4.6
–0.5 to VCCB+0.5
–0.5 to 4.6
–50
–50
50
±50
100
862
Unit
V
V
mA
mA
mA
mA
mW
Conditions
DIR, OE
A port output “H” or “L”
A port output “Z” or VCCA : OFF
VI < 0
VO < 0
VO > VCCA+0.5
TSSOP
(2) For VCCB
Item
Supply voltage
Input / output voltage*1
Input diode current
Output diode current
IIK
IOK
mA
mA
Conditions
B port output “H” or “L”
B port output “Z” or VCCB : OFF
VI < 0
VO < 0
VO > VCCB+0.5
Output current
IO
mA
VCCB,GND current
ICCB or IGND
mA
PT
Maximum power dissipation
mW
TSSOP
*2
at Ta = 25°C (in still air)
Storage temperature
Tstg
–65 to 150
°C
Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
1. The input and output voltage ratings may be exceeded even if the input and output clamp-current ratings are
observed.
2. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Rev.1.01 Apr. 13, 2005 page 2 of 8
HD74LVC4245A
Recommended Operating Conditions
(1) For VCCA
Item
Supply voltage
Input / output voltage
Output current
Input transition rise or fall time
Operating temperature
Symbol
VCCA
VI
VI/O
IOH
IOL
∆t / ∆v
Ta
Ratings
4.5 to 5.5
0 to 5.5
0 to VCCA
0 to 5.5
–24
24
10
–40 to 85
Unit
V
V
Conditions
DIR, OE
A port output “H” or “L”
A port output “Z” or VCCA : OFF
mA
ns / V
°C
(2) For VCCB
Item
Supply voltage
Input / output voltage
Symbol
VCCB
VI/O
Output current
IOH
IOL
Input transition rise or fall time
Operating temperature
∆t / ∆v
Ta
Ratings
2.7 to 3.6
0 to VCCB
0 to 3.6
–12
–24
12
24
10
–40 to 85
Unit
V
V
mA
ns / V
°C
Note: Unused or floating inputs must be held high or low.
Block Diagram
DIR
2
22
A1
3
21
To seven other channels
Rev.1.01 Apr. 13, 2005 page 3 of 8
OE
B1
Conditions
B port output “H” or “L”
B port output “Z” or VCCB : OFF
VCCB = 2.7 V
VCCB = 3.0 to 3.6 V
VCCB = 2.7 V
VCCB = 3.0 to 3.6 V
HD74LVC4245A
Electrical Characteristics
(Ta = –40 to 85°C)
Item
Input voltage
Output voltage
Symbol
VIH
VIL
VOHA
VCCB (V)
2.7 to 3.6
2.7 to 3.6
2.7 to 3.6
2.7 to 3.6
2.7 to 3.6
2.7 to 3.6
2.7
3.0
3.0
2.7 to 3.6
2.7 to 3.6
2.7 to 3.6
2.7 to 3.6
2.7
3.0
2.7 to 3.6
2.7 to 3.6
3.6
0
Min
2

VCCA–0.2
3.7
4.7
VCCB–0.2
2.2
2.4
2










Max

0.8







0.2
0.55
0.55
0.2
0.4
0.55
±1
±5
±5
20
Unit
V
IIN
IOZA
IOZB
IOFF
VCCA (V)
4.5 to 5.5
4.5 to 5.5
4.5 to 5.5
4.5
5.5
4.5 to 5.5
4.5 to 5.5
4.5 to 5.5
4.5 to 5.5
4.5 to 5.5
4.5
5.5
4.5 to 5.5
4.5 to 5.5
4.5 to 5.5
5.5
5.5
4.5 to 5.5
0
ICCA
5.5
2.7 to 3.6

80
µA
B to A,
control input =VCCA or GND
Bn = VCCB or GND,
IO (A port) = 0
ICCB
4.5 to 5.5
3.6

50
µA
A to B,
control input =VCCA or GND
An = VCCA or GND,
IO (B port) = 0
∆ICCA
5.5
2.7 to 3.6

1.5
VOHB
VOLA
VOLB
Input current
Off state
output current
Output leak current
Quiescent
supply current
Increase in ICC
*1
per input
Test Conditions
V
IOH = –100 µA
IOH = –24 mA
V
IOH = –100 µA
IOH = –12 mA
V
V
µA
µA
µA
IOH = –24 mA
IOL = 100 µA
IOL = 24 mA
IOL = 100 µA
IOL = 12 mA
IOL = 24 mA
Control input
A port, VO = VCCA or GND
B port, VO = VCCB or GND
A port, VI/O = 5.5 V
B port, VI/O = 3.6 V
mA A port or Control input,
One input at 3.4 V,
Other input at VCCA at GND
∆ICCB
4.5 to 5.5
2.7 to 3.6

0.5
mA B port,
One input at VCCB–0.6V,
Other input at VCCB at GND
Notes: For condition shown as Min or Max, use the appropriate values under recommended operating conditions.
1. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC
or GND.
Rev.1.01 Apr. 13, 2005 page 4 of 8
HD74LVC4245A
Capacitance
(Ta = 25°C)
Item
Control Input capacitance
Input/output capacitance
Symbol
CIN
CI/O
VCCA (V)
5
5
VCCB (V)
3.3
3.3
Min


Typ
5
11
Max


Unit
Test Conditions
pF VI = VCCA or GND
pF A port, VI = VCCA or GND,
B port, VI = VCCB or GND
Switching Characteristics
(Ta = –40 to 85°C), VCCA = 5.0±0.5 V, VCCB = 2.7 V to 3.6 V)
Item
Propagation delay
time
Output enable time
Output disable time
Symbol
tPLH
tPHL
tPLH
Min
1
1
1
1
1
1
1
1
1
1
1
1
tPHL
tZH
tZL
tZH
tZL
tHZ
tLZ
tHZ
tLZ
Typ












Max
6.7
6.3
5
6.1
8.1
9
9.8
8.8
5.8
7
7.8
7.7
Unit
ns
ns
ns
Test conditions From(Input) To(Output)
A
B
CL = 50 pF
RL = 500 Ω
CL = 50 pF
RL = 500 Ω
CL = 50 pF
RL = 500 Ω
B
A
OE
A
OE
B
OE
A
OE
B
Operating Characteristics
Item
Power dissipation capacitance
Symbol
CPD
VCCA (V)
5.0
VCCB (V)
3.0
Min

Typ
39.5
Max

Unit
Test Conditions
pF f = 10 MHz, CL = 0
Power-up considerations
Level-translation devices offer an opportunity for successful mixed-voltage signal design.
A proper power-up sequence always should be followed to avoid excessive supply current, bus contention, oscillations,
or other anomalies caused by improperly biased device pins.
Take these precautions to guard against such power-up problems.
1. Connect ground before any supply voltage is applied.
2. Next, power up the control side of the device.
(Power up of VCCA is first. Next power up is VCCB.)
3. Tie OE to VCCA with a pullup resistor so that it ramps with VCCA.
4. Depending on the direction of the data path, DIR can be high or low.
If DIR high is needed (A data to B bus), ramp it with VCCA. Overwise, keep DIR low.
Rev.1.01 Apr. 13, 2005 page 5 of 8
HD74LVC4245A
Test Circuit
See under table
S1
500 Ω
OPEN
GND
*1
CL = 50 pF
500 Ω
Load circuit for outputs
S1
VCCA = 5±0.5 V
VCCB = 2.7 to 3.6 V
Symbol
A/OE to B
B/OE to A
t PLH / tPHL
OPEN
OPEN
t ZH / t HZ
GND
GND
t ZL / t LZ
6V
2 × VCCA
Note: 1. CL includes probe and jig capacitance.
Waveforms – 1
tf
tr
90 %
Vref1
Input
VIH
90 %
Vref1
10 %
10 %
GND
t PHL
t PLH
V OH
Output
Vref2
Vref2
V OL
Symbol
Rev.1.01 Apr. 13, 2005 page 6 of 8
VCCA = 5±0.5 V
VCCB = 2.7 to 3.6 V
A to B
B to A
VIH
3.0 V
2.7 V
Vref1
1.5 V
1.5 V
Vref2
1.5 V
1/2 VCCA
HD74LVC4245A
Waveforms – 2
tr
tf
Output
Control
VIH
90 %
90 %
Vref1
Vref1
10 %
10 %
t ZL
GND
t LZ
VOH
Waveform - A
Vref2
V OL + 0.3 V
t ZH
t HZ
V OH - 0.3 V
Waveform - B
V OL
V OH
Vref2
GND
Symbol
VCCA = 5±0.5 V
VCCB = 2.7 to 3.6 V
OE to B
OE to A
VIH
3.0 V
3.0 V
Vref1
1.5 V
1.5 V
Vref2
1.5 V
1/2 VCCA
Notes: 1. All input pulses are supplied by generators having the following characteristics :
PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
2. Waveform - A is for an output with internal conditions such that the output is low except
when disabled by the output control.
3. Waveform - B is for an output with internal conditions such that the output is high except
when disabled by the output control.
4. The output are measured one at a time with one transition per measurement.
Rev.1.01 Apr. 13, 2005 page 7 of 8
HD74LVC4245A
Package Dimensions
JEITA Package Code
P-TSSOP24-4.4x7.8-0.65
RENESAS Code
PTSP0024JB-A
*1
Previous Code
TTP-24DBV
MASS[Typ.]
0.08g
D
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
F
24
13
c
HE
*2
E
bp
Reference
Symbol
Terminal cross section
( Ni/Pd/Au plating )
Index mark
Dimension in Millimeters
Min
Nom
Max
D
7.80
8.10
E
4.40
A2
1
Z
A1
12
e
*3
bp
0.03
0.07
0.10
0.15
0.20
0.25
0.10
0.15
0.20
6.40
6.60
1.10
A
x
L1
M
bp
b1
c
A
c
A1
θ
y
L
Detail F
1
θ
0°
HE
6.20
e
0.65
x
0.13
y
0.10
Z
0.65
0.4
L
L
Rev.1.01 Apr. 13, 2005 page 8 of 8
8°
1
0.5
1.0
0.6
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