IN16C01 16-BIT RISC MICROCONTROLLER 1. Introduction The IN16C01 is a CMOS single-chip 16-bit microcontroller. The IN16C01 is a general purpose microcomputer and can be used in control systems, data acquisition systems and DSP systems. Low-power and fully static operation allow to use the microcontroller in self-contained systems with limited power consumption. On the base of its capabilities the IN16C01 could be compared with the next general-purpose microcontrollers: Intel’s 80С196 and 80C186, Motorola’s 68300 and 68НС16, Siemens’ SAB 80C16x. The IN16C01 has an array multiplier and dedicated hardware for DSP operations support, which allows to compare the microcontroller with the next DSP: Texas Instruments’ TMS320C25, Motorola’s DSP561хх, Analog Devices’ ADSP21xx. The IN16C01 implements the modular architecture when there is a common internal bus to which all other units are connected. The architecture allows to ‘tailor’ the microcontroller to an appropriate customer’s application. The basic set of the microcontroller units includes: • • • • • • • Microprocessor RAM ROM Timers UART Synchronous Serial Interface (SSI) Bi-directional Parallel Ports The microcontroller is assumed to be extended with ADC, EEPROM, PWM unit, I2C interface and other units in future. 2. Architectural Overview A simplified functional block diagram of the IN16C01 microcontroller is shown in fig.2.1. Fig. 2.1. Simplified functional block diagram of the IN16C01 Korzhenevskogo 12, Minsk, 220108, Republic of Belarus Fax: +375 (17) 278 28 22, Phone: +375 (17) 278 07 11, 212 24 70, 212 24 61, 212 69 16 E-mail: [email protected] URL: www.bms.by IN16C01 As one can see in the figure the microcontroller consists of the following units: • • • • • • • CPU core RAM PROM Timer system (counter/timer, watchdog timer) UART Synchronous serial interface (SSI) Parallel ports D, C The IN16C01 is a synchronous VLSI with fully static operation, i.e. the microcontroller’s clock may be shut off indefinitely without the device losing its state. Once the clock is restored the microcontroller will begin executing as if there had been no interruption. The current IN16C01 realisation is assumed to have the maximum clock frequency of 10 MHz. 2.1 CPU core The brains of the IN16C01 is the CPU core. Main CPU core features are: • • • • • • • • • • • • Stack oriented RISC architecture 24-bit address 16/32-data Modified Harvard architecture with independent simultaneous access to the program and data spaces Two data stacks of 8 sixteen-bit words each Sixteen 24 bit words for return stack Eight 24 bit words for address stack All instructions are executed in one or two clock cycles Interrupt response of two clock cycles 16x16 multiply in one clock cycle Multiply-accumulate (with 38 bit accumulator) in two clock cycles Divide operation support The stack oriented architecture means that the processed data are stored in a stack (the data stack). Vast majority of the microcontroller’s instructions use one or two top stack words as their operands. The particular feature of the IN16C01 is that it has four stacks: two stacks for data, a return stack and an address stack. All the stacks can operate simultaneously. The data stacks contain processed data. The return stack contains 'return from subroutine' addresses or variables addresses. The address stack contains variables addresses. Fig. 2.2. Block diagram of the CPU core The block diagram of the CPU core is shown in fig. 2.2. As one can see from the figure, the CPU contains the following units: DS Korzhenevskogo 12, Minsk, 220108, Republic of Belarus Fax: +375 (17) 278 28 22, Phone: +375 (17) 278 07 11, 212 24 70, 212 24 61, 212 69 16 E-mail: [email protected] URL: www.bms.by IN16C01 The data stack. The stack consists of internal stack memory (two fields of eight 16-bit words) and the 'top' and 'next' registers: T and N. Т The 32-bit 'top' register of the data stack. The register is accessible as a 16-bit register (t or %t) or a 32-bit register (Т). The register is always used as one of the ALU operands. N The 32-bit 'next' register of the data stack. The register is always used as the second ALU operand and is employed for arithmetic operations. The data, written into the data stack memory, are always taken from the N register. The data, read from the data stack memory, are written into the N register. The N register can be moved into the T register via the ALU. During the data stack push operation, the T register can be written directly into the N register. Move operations between the T and N registers and between the N register and the data stack are independent from each other and can be executed simultaneously. RS The return stack. The stack consists of internal return stack memory of sixteen 24-bit words and the RT register. The return stack is accessible via the RT register only. RT The 24-bit 'top' register of the return stack. During RT register read, the return stack can be 'popped'. During RT register write, the return stack can be 'pushed'. The RT register is used in subroutine calls and return from subroutine instructions, and to local variables storing as well. AS The address stack. The stack consists of internal address stack memory of eight 24-bit words and the AT register. The address stack is accessible via the AT register only. AT The 24-bit 'top' register of the address stack. The register stores variables' addresses. During AT register read, the address stack can be 'popped'. During RT register write, the address stack can be 'pushed'. аsp, dsp, rsp The address, data and return stacks' pointers. These registers are not accessible to software. L The 16-bit instruction register. РС The 24-bit program counter. CT Korzhenevskogo 12, Minsk, 220108, Republic of Belarus Fax: +375 (17) 278 28 22, Phone: +375 (17) 278 07 11, 212 24 70, 212 24 61, 212 69 16 E-mail: [email protected] URL: www.bms.by IN16C01 The 16-bit general purpose register. The register can be used as a counter. The register contents can be analysed by conditional branch instructions and can be decremented concurrently with an ALU operation. The register is used as a counter in flow mode instructions. USER The 24-bit address register. The register's contents are used as a base address during external registers access. SP The 24-bit general purpose register. The register can contain an address and can be used to address the data memory as well. RP The 24-bit general purpose register. The register can contain an address and can be used to address the data memory as well. WORK The 32-bit general purpose register. The register can be used in integer multiply and multiply-accumulate operations. ALU The 16-bit arithmetic-logic unit with a multiplier. The ALU's two operands are the T and N registers. PSW 16-bit processor status word.. 2.2 Memory The microcontroller address space is divided into data and program memory. The IN16C01 accesses the internal data and program memories concurrently using separate buses. An external memory access is accomplished via common bus with separate address and data. The SDI input signal defines the type of the space selected (data or program). The internal data memory can not be modified. The CPU core addresses 16-bit words in memory. One clock cycle is needed to read or write a memory word. The microcontroller supports a possibility to write high/low bytes in a 16-bit word. There are special prefixes in the IN16C01 instruction set: BYTE_L and BYTE_H. These prefixes control WRL and WRH signals. Korzhenevskogo 12, Minsk, 220108, Republic of Belarus Fax: +375 (17) 278 28 22, Phone: +375 (17) 278 07 11, 212 24 70, 212 24 61, 212 69 16 E-mail: [email protected] URL: www.bms.by IN16C01 Fig 2.3. Memory Map of the IN16C01 3 The Microcontroller Pins The IN16C01 is available in PQFP 100 package (see fig. 3.1.). Table 5.1. The IN16C01 pin assignment Pin number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Mnemonic In/Out Function TXD_R VDD VSS CLKX_R FSX_L TXD_L CLKX_L CLKR_L FSR_L RXD_L PD15 PD14 PD13 PD12 PD11 PD10 PD9 PD8 in/out transmitter’s data SSI_R supply ground transmitter’s clock SSI_R transmitter’s clock SSI_L transmitter’s data SSI_L transmitter’s clock SSI_L receiver’s clock SSI_L receiver’s clock SSI_L receiver’s data SSI_L 15-th bit of the D port 14-th bit of the D port 13-th bit of the D port 12-th bit of the D port 11-th bit of the D port 10-th bit of the D port 9-th bit of the D port 8-th bit of the D port in/out in/out in/out in/out in in in in/out in/out in/out in/out in/out in/out in/out in/out Korzhenevskogo 12, Minsk, 220108, Republic of Belarus Fax: +375 (17) 278 28 22, Phone: +375 (17) 278 07 11, 212 24 70, 212 24 61, 212 69 16 E-mail: [email protected] URL: www.bms.by IN16C01 Pin number 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 Mnemonic In/Out Function PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0 VDD VSS SDI CSXR SRW PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 VDD VSS PA20 PA21 PA22 PA23 RT0 RT1 PC0 PC1 PC2 PC3 in/out in/out in/out in/out in/out in/out in/out in/out 7-th bit of the D port 6-th bit of the D port 5-th bit of the D port 4-th bit of the D port 3-rd bit of the D port 2-nd bit of the D port 1-st bit of the D port 0-th bit of the D port supply ground data/program input external device select port D read/write 0-th bit of the A port 1-st bit of the A port 2-nd bit of the A port 3-th bit of the A port 4-th bit of the A port 5-th bit of the A port 6-th bit of the A port 7-th bit of the A port 8-th bit of the A port 9-th bit of the A port 10-th bit of the A port 11-th bit of the A port 12-th bit of the A port 13-th bit of the A port 14-th bit of the A port 15-th bit of the A port 16-th bit of the A port 17-th bit of the A port 18-th bit of the A port 19-th bit of the A port supply ground 20-th bit of the A port 21-th bit of the A port 22-th bit of the A port 23-th bit of the A port transmitter’s data SCI. receiver’s data SCI. 0-th bit of the C port 1-st bit of the C port 2-nd bit of the C port 3-rd bit of the C port out out out out out out out out out out out out out out out out out out out out out out out out out out out in/out in/out in/out in/out in/out in/out Korzhenevskogo 12, Minsk, 220108, Republic of Belarus Fax: +375 (17) 278 28 22, Phone: +375 (17) 278 07 11, 212 24 70, 212 24 61, 212 69 16 E-mail: [email protected] URL: www.bms.by IN16C01 Pin number 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 Mnemonic In/Out Function PC4 PC5 PC6 PC7 PC[8] PC[9] INT2 INT1 INT0 MODА TMI3 MODE X1 VDD VSS X2 TMO0 TMO1 TMO2 PCLК INIT READY ТМI2 ТМI1 ТМI0 RST BB BR BGIN BGOU RDD WRH WRL CLKR_R FSR_R RXD_R FSX_R in/out in/out in/out in/out in/out in/out in in in in in in in 4-th bit of the C port 5-th bit of the C port 6-th bit of the C port 7-th bit of the C port 8-th bit of the C port 9-th bit of the C port interrupt request interrupt request interrupt request mode A timer 3 control mode E microcontroller’s clock in supply ground microcontroller’s clock out timer 0 output timer 1 output timer 2 output microcontroller’s clock out reset output data ready timer 2 control timer 1 control timer 0 control reset external bus hold external bus request external bus grant external bus grant port D read port D write port D write receiver’s clock SSI_R receiver’s clock SSI_R receiver’s data SSI_R transfer clock SSI_R out out out out out out in in in in in in/out in/out in out out out out in in in in/out Korzhenevskogo 12, Minsk, 220108, Republic of Belarus Fax: +375 (17) 278 28 22, Phone: +375 (17) 278 07 11, 212 24 70, 212 24 61, 212 69 16 E-mail: [email protected] URL: www.bms.by IN16C01 Fig. 3.1. The IN16C01 pin assignment Korzhenevskogo 12, Minsk, 220108, Republic of Belarus Fax: +375 (17) 278 28 22, Phone: +375 (17) 278 07 11, 212 24 70, 212 24 61, 212 69 16 E-mail: [email protected] URL: www.bms.by