LMH6654/55 Single/Dual Low Power, 250 MHz, Low Noise Amplifiers General Description Features The LMH6654/55 single and dual high speed, voltage feedback amplifiers are designed to have unity-gain stable operation with a bandwidth of 250MHz. They operate from ± 2.5V to ± 6V and each channel consumes only 4.5mA. The amplifiers feature very low voltage noise and wide output swing to maximize signal-to-noise ratio. The LMH6654/55 have a true single supply capability with input common mode voltage range extending 150 mV below negative rail and within 1.3V of the positive rail. LMH6654/55 high speed and low power combination make these products an ideal choice for many portable, high speed application where power is at a premium. The LMH6654 is packaged in SOT23-5 and SOIC-8. The LMH6655 is packaged in MSOP-8 and SOIC-8. The LMH6654/55 are built on National’s Advance VIP10™ (Vertically Integrated PNP) complementary bipolar process. (VS = ± 5V, TJ = 25˚C, Typical values unless specified). n Voltage feedback architecture n Unity gain bandwidth 250MHz ± 2.5V to ± 6V n Supply voltage range n Slew rate 200V/µsec n Supply current 4.5mA/channel n Input common mode voltage −5.15V to +3.7V n Output voltage swing (RL = 100Ω) −3.6V to 3.4V n Input voltage noise 4.5nV/ n Input current noise 1.7pA/ n Settling Time to 0.01% 25ns Applications n n n n n n ADC drivers Consumer video Active filters Pulse delay circuits xDSL receiver Pre-amps Typical Performance Characteristics Input Voltage Noise vs. Frequency 20016560 © 2001 National Semiconductor Corporation DS200165 Closed Loop Gain vs. Frequency 20016558 www.national.com LMH6654/55 Single/Dual Low Power, 250 MHz, Low Noise Amplifiers August 2001 LMH6654/55 Absolute Maximum Ratings (Note 1) Soldering Information If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Human Body Model 200V ± 1.2V VIN Differential Output Short Circuit Duration ± 2.5V to ± 6.0V Junction Temperature Range −40˚C to +85˚C 8-Pin SOIC 13.2V Storage Temperature Range −65˚C to +150˚C Junction Temperature (Note 4) (Note 1) Supply Voltage (V+ - V−) V+ +0.5V, V− −0.5V Voltage at Input pins 260˚C Thermal Resistance (θJA) (Note 3) Supply Voltage (V+ − V−) 235˚C Wave Soldering (10 sec.) Operating Ratings 2kV Machine Model Infrared or Convection (20 sec.) 172˚C/W 8-Pin MSOP 235˚C/W 5-Pin SOT-23 265˚C/W +150˚C ± 5V Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = +5V, V− = −5V, VCM = 0V, AV = +1, RF = 25Ω for gain = +1, RF = 402Ω for gain = ≥ +2, and RL = 100Ω. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units Dynamic Performance fCL GBWP Close Loop Bandwidth AV = +1 250 AV = +2 130 AV = +5 52 MHz AV = +10 26 Gain Bandwidth Product AV ≥ +5 260 MHz Bandwidth for 0.1dB Flatness AV +1 18 MHz φm Phase Margin SR Slew Rate (Note 8) TS Settling Time 0.01% tr tf 50 deg AV = +1, VIN = 2VPP 200 V/µs AV = +1, 2V Step 25 ns 15 ns Rise Time AV = +1, 0.2V Step 1.4 ns Fall Time AV = +1, 0.2V Step 1.2 ns 0.1% Distortion and Noise Response en Input Referred Voltage Noise f ≥ 0.1 MHz 4.5 nV/ in Input-Referred Current Noise f ≥ 0.1 MHz 1.7 pA/ Second Harmonic Distortion AV = +1, f = 5MHz −80 Third Harmonic Distortion VO = 2VPP, RL = 100Ω −85 Xt Crosstalk (for LMH6655 only) Input Referred, 5MHz, Channel-to-Channel −80 dB DG Differential Gain AV = +2, NTSC, RL = 150Ω 0.01 % DP Differential Phase AV = +2, NTSC, RL = 150Ω 0.025 deg dBc Input Characteristics VOS Input Offset Voltage VCM = 0V −3 −4 ±1 3 4 mV TC VOS Input Offset Average Drift VCM = 0V (Note 7) 6 IB Input Bias Current VCM = 0V 5 12 18 µA IOS Input Offset Current VCM = 0V 0.3 1 2 µA RIN Input Resistance www.national.com −1 −2 µV/˚C Common- Mode 4 MΩ Differential Mode 20 kΩ 2 (Continued) Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = +5V, V− = −5V, VCM = 0V, AV = +1, RF = 25Ω for gain = +1, RF = 402Ω for gain = ≥ +2, and RL = 100Ω. Boldface limits apply at the temperature extremes. Symbol CIN Parameter Input Capacitance Conditions Min (Note 6) Typ (Note 5) Common- Mode 1.8 Differential Mode 1 CMRR Common Mode Rejection Ration Input Referred, VCM = 0V to −5V CMVR Input Common- Mode Voltage Range CMRR ≥ 50dB 70 68 Max (Note 6) pF 90 −5.15 3.5 3.7 VO = 4VPP, RL = 100Ω 60 58 67 Output Swing High No Load 3.4 3.2 3.6 Output Swing Low No Load Output Swing High RL = 100Ω Output Swing Low RL = 100Ω Short Circuit Current (Note 3) Sourcing, VO = 0V ∆VIN = 200mV 145 130 280 Sinking, VO = 0V ∆VIN = 200mV 100 80 185 Units dB −5.0 V Transfer Characteristics AVOL Large Signal Voltage Gain dB Output Characteristics VO ISC IOUT RO Output Current Output Resistance −3.9 3.2 3.0 −3.7 −3.5 V 3.4 −3.6 −3.4 −3.2 mA Sourcing, VO = +3V 80 Sinking, VO = −3V 120 AV = +1, f < 100kHz 0.08 Ω 76 dB mA Power Supply PSRR Power Supply Rejection Ratio IS Supply Current (per channel) Input Referred , VS = ± 5V to ± 6V 60 4.5 6 7 mA 5V Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = +5V, V− = −0V, VCM = 2.5V, AV = +1, RF = 25Ω for gain = +1, RF = 402Ω for gain = ≥ +2, and RL = 100Ω to V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units Dynamic Performance fCL GBWP φm Close Loop Bandwidth AV = +1 230 AV = +2 120 AV = +5 50 MHz AV = +10 25 Gain Bandwidth Product AV ≥ +5 250 MHz Bandwidth for 0.1dB Flatness AV = +1 17 MHz 48 deg Phase Margin SR Slew Rate (Note 8) AV = +1, VIN = 2VPP 190 V/µs TS Settling Time 0.01% AV = +1, 2V Step 30 ns 20 ns 0.1% 3 www.national.com LMH6654/55 ± 5V Electrical Characteristics LMH6654/55 5V Electrical Characteristics (Continued) Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = +5V, V− = −0V, VCM = 2.5V, AV = +1, RF = 25Ω for gain = +1, RF = 402Ω for gain = ≥ +2, and RL = 100Ω to V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units tr Rise Time AV = +1, 0.2V Step 1.5 ns tf Fall Time AV = +1, 0.2V Step 1.35 ns Distortion and Noise Response en Input Referred Voltage Noise f ≥ 0.1MHz 4.5 nV/ in Input Referred Current Noise f ≥ 0.1 MHz 1.7 pA/ Second Harmonic Distortion AV = +1, f = 5MHz −65 Third Harmonic Distortion VO = 2VPP, RL = 100Ω −70 Crosstalk (for LMH6655 only) Input Referred, 5MHz −78 Xt dBc dB Input Characteristics VOS Input Offset Voltage VCM = 2.5V −5 −6.5 ±2 5 6.5 mV TC VOS Input Offset Average Drift VCM = 2.5V (Note 7) 6 IB Input Bias Current VCM = 2.5V 6 12 18 µA IOS Input Offset Current VCM = 2.5V 0.5 2 3 µA RIN Input Resistance CIN Input Capacitance −2 −3 µV/˚C Common- Mode 4 MΩ Differential Mode 20 kΩ Common- Mode 1.8 pF Differential Mode 1 CMRR Common Mode Rejection Ration Input Referred, VCM = 0V to −2.5V CMVR Input Common Mode Voltage Range CMRR ≥ 50dB 70 68 90 −0.15 3.5 3.7 VO = 1.6VPP, RL = 100Ω 58 55 64 Output Swing High No Load 3.6 3.4 3.75 Output Swing Low No Load Output Swing High RL = 100Ω Output Swing Low RL = 100Ω Short Circuit Current (Note 3) Sourcing , VO = 2.5V ∆VIN = 200mV 90 80 170 Sinking, VO = 2.5V ∆VIN = 200mV 70 60 140 dB 0 V Transfer Characteristics AVOL Large Signal Voltage Gain dB Output Characteristics VO ISC IOUT RO Output Current Output Resistance 0.9 3.5 3.35 1.1 1.3 V 3.70 1 1.3 1.45 mA Sourcing, VO = +3.5V 30 Sinking, VO = 1.5V 60 AV = +1, f < 100kHz .08 Ω 75 dB mA Power Supply PSRR Power Supply Rejection Ratio IS Supply Current (per channel) www.national.com Input Referred , VS = ± 2.5V to ± 3V 60 4.5 4 6 7 mA (Continued) Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Table. Note 2: Human body model, 1.5kΩ in series with 100pF. Machine model: 0Ω in series with 100pF. Note 3: Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature at 150˚C. Note 4: The maximum power dissipation is a function of TJ(MAX), θJA and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) − TA)/θJA. All numbers apply for packages soldered directly onto a PC board. Note 5: Typical Values represent the most likely parametric norm. Note 6: All limits are guaranteed by testing or statistical analysis. Note 7: Offset voltage average drift is determined by dividing the change in VOS at temperature extremes into the total temperature change. Note 8: Slew rate is the slower of the rising and falling slew rates. Slew rate is rate of change from 10% to 90% of output voltage step. Typical Performance Characteristics TJ = 25˚C, V+ = ± 5V, V− = −5, RF = 25Ω for gain = +1, RF = 402Ω and for gain ≥ +2, and RL = 100Ω, unless otherwise specified. Closed Loop Bandwidth (G = +1) Closed Loop Bandwidth (G = +2) 20016509 20016510 Closed Loop Bandwidth (G = +5) Closed Loop Bandwidth (G = +10) 20016511 20016512 5 www.national.com LMH6654/55 5V Electrical Characteristics LMH6654/55 Typical Performance Characteristics TJ = 25˚C, V+ = ± 5V, V− = −5, RF = 25Ω for gain = +1, RF = 402Ω and for gain ≥ +2, and RL = 100Ω, unless otherwise specified. (Continued) Supply Current per Channel vs. Supply Voltage Supply Current per Channel vs. Temperature 20016535 20016548 Offset Voltage vs. Supply Voltage (VCM = 0V) Offset Voltage vs. Common Mode 20016532 20016549 Offset Voltage vs. Common Mode Bias Current and Offset Voltage vs. Temperature 20016551 20016539 www.national.com 6 TJ = 25˚C, V+ = ± 5V, V− = −5, RF = 25Ω for gain = +1, RF = 402Ω and for gain ≥ +2, and RL = 100Ω, unless otherwise specified. (Continued) Bias Current vs. Common Mode Voltage AOL, PSRR and CMRR vs. Temperature 20016550 20016537 Inverting Large Signal Pulse Response (VS = ± 5V) Inverting Large Signal Pulse Response (VS = 5V) 20016502 20016504 Non-Inverting Large Signal Pulse Response (VS = ± 5V) Non-Inverting Large Signal Pulse Response (VS = 5V) 20016506 20016508 7 www.national.com LMH6654/55 Typical Performance Characteristics LMH6654/55 Typical Performance Characteristics TJ = 25˚C, V+ = ± 5V, V− = −5, RF = 25Ω for gain = +1, RF = 402Ω and for gain ≥ +2, and RL = 100Ω, unless otherwise specified. (Continued) Non-Inverting Small Signal Pulse Response (VS = ± 5V) Non-Inverting Small Signal Pulse Response (VS = 5V) 20016505 20016507 Inverting Small Signal Pulse Response (VS = ± 5V) Inverting Small Signal Pulse Response (VS = 5V) 20016501 20016503 Input Voltage and Current Noise vs. Frequency (VS = ± 5V) Input Voltage and Current Noise vs. Frequency (VS = 5V) 20016513 www.national.com 20016514 8 TJ = 25˚C, V+ = ± 5V, V− = −5, RF = 25Ω for gain = +1, RF = 402Ω and for gain ≥ +2, and RL = 100Ω, unless otherwise specified. (Continued) Harmonic Distortion vs. Frequency G = +1, VO = 2VPP, VS = 5V Harmonic Distortion vs. Frequency G = +1, VO = 2VPP, VS = ± 5V 20016517 20016518 Harmonic Distortion vs. Temperature VS = 5V, f = 5MHz, VO = 2VPP Harmonic Distortion vs. Temperature VS = ± 5V, f = 5MHz, VO = 2VPP 20016529 20016528 Harmonic Distortion vs. Gain VS = 5V, f = 5MHz, VO = 2VPP Harmonic Distortion vs. Gain VS = ± 5V, f = 5MHz, VO = 2VPP 20016531 20016530 9 www.national.com LMH6654/55 Typical Performance Characteristics LMH6654/55 Typical Performance Characteristics TJ = 25˚C, V+ = ± 5V, V− = −5, RF = 25Ω for gain = +1, RF = 402Ω and for gain ≥ +2, and RL = 100Ω, unless otherwise specified. (Continued) Harmonic Distortion vs. Output Swing (G = +2, VS = 5V, f = 5MHz) Harmonic Distortion vs. Output Swing (G = +2, VS = ± 5V, f = 5MHz) 20016559 20016522 PSRR vs. Frequency CMRR vs. Frequency 20016564 20016516 Output Sinking Current Output Sourcing Current 20016546 www.national.com 20016547 10 TJ = 25˚C, V+ = ± 5V, V− = −5, RF = 25Ω for gain = +1, RF = 402Ω and for gain ≥ +2, and RL = 100Ω, unless otherwise specified. (Continued) CrossTalk vs. Frequency (LMH6655 only) CrossTalk vs. Frequency (LMH6655 only) 20016561 20016562 Isolation Resistance vs. Capacitive Load Open Loop Gain and Phase vs. Frequency 20016563 20016527 11 www.national.com LMH6654/55 Typical Performance Characteristics LMH6654/55 Connection Diagrams LMH6654 in SOIC LMH6654 in SOT23-5 LMH6655 in SOIC and MSOP 20016520 20016521 Top View Top View 20016519 Top View Ordering Information Package Part Number Package Marking Transport Media NSC Drawing 8-Pin SOIC LMH6654MA LMH6654MA 95 Units Rails M08A LMH6654MAX LMH6655MA 2.5k Units Tape and Reel LMH6655MA LMH6655MAX 5-Pin SOT23-5 LMH6654MF A66A 1k Units Tape and Reel LMH6654MFX 8-Pin MSOP LMH6655MM MF05A 3K Units Tape and Reel A67A 1k Units Tape and Reel LMH6655MMX MUA08A 3.5k Units Tape and Reel should be connected in parallel, to supply current for fast large signal changes at the output. Application Information General Information The LMH6654 single and LMH6655 dual high speed, voltage feedback amplifiers are manufactured on National Semiconductor’s new VIP10 (Vertically Integrated PNP) complementary bipolar process. These amplifiers can operate from ± 2.5V to ± 6V power supply. They offer low supply current, wide bandwidth, very low voltage noise and large output swing. Many of the typical performance plots found in the datasheet can be reproduced if 50Ω coax and 50Ω RIN/ROUT resistors are used. Circuit Layout Consideration With all high frequency devices, board layouts with stray capacitance have a strong influence on the AC performance. The LMH6654/55 are not exception and the inverting input and output pins are particularly sensitive to the coupling of parasitic capacitance to AC ground. Parasitic capacitances on the inverting input and output nodes to ground could cause frequency response peaking and possible circuit oscillation. Therefore, the power supply, ground traces and ground plan should be placed away from the inverting input and output pins. Also, it is very important to keep the parasitic capacitance across the feedback to an absolute minimum. The PCB should have a ground plane covering all unused portion of the component side of the board to provide a low impedance path. All trace lengths should be minimized to reduce series inductance. Supply bypassing is required for the amplifiers performance. The bypass capacitors provide a low impedance return current path at the supply pins. They also provide high frequency filtering on the power supply traces. It is recommended that a ceramic decoupling capacitor 0.1µF chip should be placed with one end connected to the ground plane and the other side as close as possible to the power pins. An additional 10µF tantalum electrolytic capacitor www.national.com 95 Units Rails 2.5k Units Tape and Reel 20016541 FIGURE 1. Evaluation Boards National provides the following evaluation boards as a guide for high frequency layout and as an aid in device testing and characterization. 12 Device Package Evalulation Board PN LMH6654MF SOT23-5 CLC730068 LMH6654MA 8-Pin SOIC CLC730027 LMH6655MA 8-Pin SOIC CLC730036 LMH6655MM 8-Pin MSOP CLC730123 LMH6654/55 Application Information (Continued) The free evaluation board are shipped automatically when a device sample request is placed with National Semiconductor. The CLC730027 datasheet also contains tables of recommended components to evaluate several of National’s high speed amplifiers. This table for the LMH6654 is illustrated below. Refer to the evaluation board datasheet for schematics and further information. Components Needed to Evaluate the LMH6654 on the Evaluation Board: • • • 20016540 RfRg use the datasheet to select values. FIGURE 2. RIN, ROUT typically 50Ω (Refer to the Basic Operation section of the evaluation board datasheet for details) Components Selection and Feedback Resistor It is important in high-speed applications to keep all component leads short since wires are inductive at high frequency. For discrete components, choose carbon composition axially leaded resistors and micro type capacitors. Surface mount components are preferred over discrete components for minimum inductive effect. Never use wire wound type resistors in high frequency applications. Large values of feedback resistors can couple with parasitic capacitance and cause undesired effects such as ringing or oscillation in high-speed amplifiers. Keep resistors as low as possible consistent with output loading consideration. For a gain of 2 and higher, 402Ω feedback resistor used for the typical performance plots gives optimal performance. For unity gain follower, a 25Ω feedback resistor is recommended rather than a direct short. This effectively reduces the Q of what would otherwise be a parasitic inductance (the feedback wire) into the parasitic capacitance at the inverting input. Bias Current Cancellation In order to cancel the bias current errors of the non-inverting configuration, the parallel combination of the gain setting Rg and feedback Rf resistors should equal the equivalent source resistance Rseq as defined in Figure 3. Combining this constraint with the non-inverting gain equation, allows both Rf and Rg to be determined explicitly from the following equations: Rf = AVRseq and Rg = Rf/(AV−1) Rf is an optional resistor for inverting again configurations (select Rf to yield desired input impedance = Rg||Rf) • C1, C2 use 0.1µF ceramic capacitors • C3, C4 use 10µF tantalum capacitors Components not used: 1. C5, C6, C7, C8 2. R1 thru R8 The evaluation boards are designed to accommodate dual supplies. The board can be modified to provide single operation. For best performance; 1) do not connect the unused supply. 2) ground the unused supply pin. power Dissipation The package power dissipation should be taken into account when operating at high ambient temperature and/or high power dissipative conditions. In determining maximum operable temperature of the device, make sure the total power dissipation of the device is considered; this power dissipated in the device with a load connected to the output as well as the nominal dissipation of the op amp. Driving Capacitive Loads Capacitive loads decrease the phase margin of all op amps. The output impedance of a feedback amplifier becomes inductive at high frequencies, creating a resonant circuit when the load is capacitive. This can lead to overshoot, ringing and oscillation. To eliminate oscillation or reduce ringing, an isolation resistor can be placed as shown in Figure 2 below. At frequencies above For inverting configuration, bias current cancellation is accomplished by placing a resistor Rb on the non-inverting input equal in value to the resistance seen by the inverting input (Rf//(Rg+Rs). The additional noise contribution of Rb can be minimized through the use of a shunt capacitor. the load impedance of the Amplifier approaches RISO. The desired performance depends on the value of the isolation resistor. The isolation resistance vs. capacitance load graph in the typical performance characteristics provides the means for selection of the value of RS that provides ≤ 3dB peaking in closed loop AV = 1 response. In general, the bigger the isolation resistor, the more damped the pulse response becomes. For initial evaluation, a 50Ω isolation resistor is recommended. 13 www.national.com LMH6654/55 Application Information (Continued) 20016544 FIGURE 5. Non-Inverting Amplifier Noise Model (1) Rf||Rg =Rseq for bias current cancellation. Figure 6 illustrates the equivalent noise model using this assumption. The total equivalent output voltage noise (eno) is eni * AV. 20016542 FIGURE 3. Non-Inverting Amplifier Configuration 20016545 FIGURE 6. Noise Model with Rf||Rg = Rseq (2) If bias current cancellation is not a requirement, then Rf||Rg does not need to equal Rseq. In this case, according to Equation 1, RfRg should be as low as possible in order to minimize noise. Results similar to Equation 1 are obtained for the inverting configuration on Figure 2 if Rseq is replaced by Rb and Rg is replaced by Rg + Rs. With these substitutions, Equation 1 will yield an eni referred to the non-inverting input. Referring to eni to the inverting input is easily accomplished by multiplying eni by the ration of non-inverting to inverting gains. Noise Figure Noise Figure (NF) is a measure of the noise degradation caused by an amplifier. 20016543 FIGURE 4. Inverting Amplifier Configuration Total Input Noise vs. Source Resistance The noise model for the non-inverting amplifier configuration showing all noise sources is described in Figure 5. In addition to the intrinsic input voltage noise (en) and current noise (in = in+ = in−) sources, there also exits thermal voltage noise associated with each of the external resistors. Equation 1 provides the general form for total equivalent input voltage noise density (eni). Equation 2 is a simplification of Equation 1 that assumes (3) The noise figure formula is shown is Equation 3. The addition of a terminating resistor RT, reduces the external thermal noise but increases the resulting NF. www.national.com 14 LMH6654/55 Application Information (Continued) The NF is increased because the RT reduces the input signal amplitude thus reducing the input SNR. (4) The noise figure is related to the equivalent source resistance (Rseq) and the parallel combination of Rf and Rg. To minimize noise figure, the following steps are recommended: 1. Minimize Rf||Rg 2. Choose the Optimum Rs (ROPT) ROPT is the point at which the NF curve reaches a minimum and is approximated by: ROPT ≈ (en/in) 15 www.national.com LMH6654/55 Physical Dimensions inches (millimeters) unless otherwise noted 8-Pin SOIC NS Package Number M08A 5-Pin SOT23 NS Package Number MF05A www.national.com 16 LMH6654/55 Single/Dual Low Power, 250 MHz, Low Noise Amplifiers Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 8-Pin MSOP NS Package Number MUA08A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Email: [email protected] www.national.com National Semiconductor Europe Fax: +49 (0) 180-530 85 86 Email: [email protected] Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: [email protected] National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.