ONSEMI NTMD5836NLR2G

NTMD5836NL
Power MOSFET
40 V, Dual N−Channel, SOIC−8
Features
•
•
•
•
•
Asymmetrical N Channels
Low RDS(on)
Low Capacitance
Optimized Gate Charge
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Channel 1
V(BR)DSS
RDS(on) Max
ID Max
(Notes 1 and 2)
40 V
12 mW @ 10 V
11 A
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G1
G2
S1
16 mW @ 4.5 V
Channel 2
40 V
25 mW @ 10 V
N−Channel 2
D2
N−Channel 1
D1
S2
6.5 A
30.8 mW @ 4.5 V
1. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in
sq [2 oz] including traces)
2. Only selected channel is been powered
1W applied on channel 1: TJ = 1 W * 85°C/W + 25°C = 110°C
MARKING DIAGRAM*
AND PIN ASSIGNMENT
D1 D1 D2 D2
8
8
1
5836NL
AYWW G
G
SOIC−8
CASE 751
1
S1 G1 S2 G2
A
Y
WW
G
= Assembly Location
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
NTMD5836NLR2G
Package
Shipping†
SOIC−8
(Pb−Free)
2500 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D
© Semiconductor Components Industries, LLC, 2011
March, 2011 − Rev. 0
1
Publication Order Number:
NTMD5836NL/D
NTMD5836NL
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Symbol
Ch 1
Ch 2
Unit
Drain−to−Source Voltage
VDSS
40
40
V
Gate−to−Source Voltage
VGS
$20
$20
V
ID
9.0
5.7
A
7.2
4.6
1.5
1.5
0.9
0.9
11
6.5
8.6
4.6
2.1
1.9
1.3
1.2
43
26
Steady
State
Continuous Drain Current RθJA (Notes 3 and 4)
Power Dissipation RθJA (Notes 3 and 4)
TA = 25°C
TA = 70°C
TA = 25°C
PD
TA = 70°C
t v 10s
Continuous Drain Current RθJA (Notes 3 and 4)
TA = 25°C
ID
TA = 70°C
Power Dissipation RθJA (Notes 3 and 4)
TA = 25°C
PD
TA = 70°C
Pulsed Drain Current
tp = 10 ms
Operating Junction and Storage Temperature
IDM
TJ, TSTG
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche Energy (VDD = 40 V, VGS = 10 V, L = 0.1 mH)
Lead Temperature for Soldering Purposes (1/8” from case for 10s)
−55 to +150
W
A
W
A
°C
IS
10
7.0
A
EAS
76
22
mJ
IAS
39
21
A
TL
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
3. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces)
4. Only selected channel is been powered
1W applied on channel 1: TJ = 1 W * 85°C/W + 25°C = 110°C
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Ch 1
Ch 2
Unit
Junction−to−Ambient Steady State (Notes 5 and 7)
RθJA
85
86
°C/W
Junction−to−Ambient – t v 10 s (Notes 5 and 7)
RθJA
60
65
Junction−to−Ambient Steady State (Notes 5 and 8)
RθJA
Junction−to−Ambient Steady State (Notes 6 and 7)
RθJA
5. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces)
6. Surface−mounted on FR4 board using 0.155 in sq (100 mm2) pad size
7. Only selected channel is been powered
1W applied on channel 1: TJ = 1 W * 85°C/W + 25°C = 110°C
8. Both channels receive equivalent power dissipation
1 W applied on each channel: TJ = 2 W * 59°C/W + 25°C = 143°C
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59
136
136
NTMD5836NL
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Ch
Min
Ch 1
40
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown
Voltage
V(BR)DSS
Drain−to−Source Breakdown
Voltage Temperature Coefficient
V(BR)DSS
/ TJ
Zero Gate Voltage Drain Current
IDSS
VGS = 0 V, ID = 250 mA
VGS = 0 V,
VDS = 40 V
TJ = 25°C
TJ = 125°C
Gate−to−Source Leakage Current
IGSS
VDS = 0 V, VGS = $20 V
V
Ch 2
Ch 1
146
Ch 2
25
mV/
°C
1.0
Ch 1
mA
Ch 2
100
Ch 1
Ch 2
Ch 1
$100
nA
V
Ch 2
ON CHARACTERISTICS (Note 9)
Gate Threshold Voltage
VGS(TH)
Negative Threshold Temperature
Coefficient
VGS(TH) /
TJ
Drain−to−Source On Resistance
RDS(on)
Forward Transconductance
gFS
VGS = VDS, ID = 250 mA
Ch 1
1.0
1.8
3.0
Ch 2
1.0
1.8
3.0
mV/°C
Ch 1
6.0
Ch 2
6.0
VGS = 10 V, ID = 10 A
Ch 1
9.5
12
VGS = 10 V, ID = 7 A
Ch 2
20.5
25
VGS = 4.5 V, ID = 10 A
Ch 1
13
16
VGS = 4.5 V, ID = 7 A
Ch 2
25.0
30.8
VDS = 15 V, ID = 10 A
Ch 1
10.5
VDS = 15 V, ID = 7 A
Ch 2
6.0
Ch 1
2120
Ch 2
730
Ch 1
315
Ch 2
123
Ch 1
225
Ch 2
84
mW
mW
S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
VGS = 0 V, f = 1 MHz, VDS =
20 V
CRSS
9. Pulse Test: pulse width v 300 ms, duty cycle v 2%
10. Switching characteristics are independent of operating junction temperatures
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3
pF
NTMD5836NL
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Ch
VGS = 10V, VDS = 20V, ID = 10A
VGS = 10 V, VDS = 20 V, ID = 7 A
Min
Typ
Max
Unit
Ch 1
36
50
nC
Ch 2
16
Ch 1
15
23
Ch 2
8.5
11
Ch 1
2.4
Ch 2
1.0
Ch 1
6.9
Ch 2
2.8
Ch 1
7.2
Ch 2
4.0
Ch 1
3.2
Ch 2
3.3
Ch 1
1.2
Ch 2
2.1
Ch 1
16
Ch 2
11.5
Ch 1
22
Ch 2
14
Ch 1
26
Ch 2
15.5
Ch 1
8.5
Ch 2
3.5
Ch 1
0.9
1.2
Ch 2
0.85
1.2
Ch 1
0.65
Ch 2
0.73
Ch 1
27
Ch 2
17
Ch 1
14
Ch 2
11
Ch 1
13
Ch 2
6.0
Ch 1
19
Ch 2
9.0
CHARGES, CAPACITANCES & GATE RESISTANCE
Total Gate Charge
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Plateau Voltage
Gate Resistance
QG(TOT)
QG(TH)
QGS
VGS = 4.5 V, VDS = 20 V, CH1:
ID = 10 A, CH2: ID = 7 A
QGD
VGP
RG
V
W
SWITCHING CHARACTERISTICS (Note 10)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
tr
td(OFF)
VGS = 4.5 V, VDD = 20 V, CH1:
ID = 10 A, CH2: ID = 7 A, RG =
2.5 W
tf
ns
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
Reverse Recovery Time
tRR
Charge Time
Ta
Discharge Time
Reverse Recovery Charge
Tb
VGS = 0 V,
CH1: ID =
10 A, CH2: ID
=7A
TJ = 25°C
TJ = 125°C
VGS = 0 V, dISD/dt = 100 A/ms,
CH1: ID = 10 A, CH2: ID = 7 A
QRR
9. Pulse Test: pulse width v 300 ms, duty cycle v 2%
10. Switching characteristics are independent of operating junction temperatures
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4
V
ns
nC
NTMD5836NL
TYPICAL PERFORMANCE CURVES
10V
6.5 V
8.5 V
ID, DRAIN CURRENT (A)
60
50
70
TJ = 25°C
5.5 V
3.9 V
4.5 V
40
3.5 V
30
20
3.1 V
10
VGS = 2.5 V
0
1
2
3
4
20
10
TJ = −55°C
0
2
3
4
5
VGS, GATE−TO−SOURCE VOLTAGE (V)
0.025
0.02
0.015
3
4
5
6
7
8
9
VGS, GATE−TO−SOURCE VOLTAGE (V)
10
0.02
TJ = 25°C
0.015
VGS = 4.5 V
VGS = 10 V
0.01
0.005
2
6
10
14
18
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage − Channel 1
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage − Channel 1
100000
ID = 10 A
VGS = 4.5 V
VGS = 0 V
1.4
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
TJ = 25°C
Figure 2. Transfer Characteristics − Channel 1
0.03
1.6
TJ = 125°C
30
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TJ = 25°C
ID = 10 A
2
40
Figure 1. On−Region Characteristics −
Channel 1
0.035
0.01
50
5
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0
VDS ≥ 20 V
60
ID, DRAIN CURRENT (A)
70
10000
1.2
1
0.8
−50
TJ = 150°C
−25
0
25
50
75
100
125
150
1000
TJ = 125°C
10
20
30
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature − Channel 1
Figure 6. Drain−to−Source Leakage Current
vs. Voltage − Channel 1
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5
40
NTMD5836NL
TYPICAL PERFORMANCE CURVES
10
3000
TJ = 25°C
VGS, GATE−TO−SOURCE (V)
C, CAPACITANCE (pF)
Ciss
2000
1500
1000
500
0
Coss
Crss
0
10
20
30
8
6
4
2
0
40
QGD
QGS
VGS = 20 V
ID = 10 A
TJ = 25°C
0
5
10
DRAIN−TO−SOURCE VOLTAGE (V)
20
IS, SOURCE CURRENT (A)
t, TIME (ns)
VDD = 20 V
ID = 10 A
VGS = 4.5 V
tr
100
10
1
td(on)
10
35
40
VGS = 0 V
TJ = 25°C
10
5
0.4
0.5
0.6
0.7
0.8
0.9
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance − Channel 1
Figure 10. Diode Forward Voltage vs. Current
− Channel 1
1
80
10
1 ms
1
10 ms
VGS = 20 V
SINGLE PULSE
TC = 25°C
0.01
0.001
0.1
100 ms
1 ms
dc
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1
10
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
EAS, SINGLE PULSE DRAIN−TO−
SOURCE AVALANCHE ENERGY (mJ)
ID, DRAIN CURRENT (A)
30
15
0
100
100
0.1
25
Figure 8. Gate−To−Source and
Drain−To−Source Voltage vs. Total Charge −
Channel 1
1000
tf
20
QG, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation − Channel 1
td(off)
15
VDS, DRAIN−TO−SOURCE (V)
QT
VGS = 0 V
2500
100
Figure 11. Maximum Rated Forward Biased
Safe Operating Area − Channel 1
ID = 39 A
60
40
20
0
25
50
75
100
125
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature − Channel 1
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6
150
NTMD5836NL
TYPICAL PERFORMANCE CURVES
5.5 V
4V
30
3.6 V
20
10
VGS = 3 V
TJ = 25°C
0
1
2
3
4
20
3
4
5
Figure 1. On−Region Characteristics −
Channel 2
Figure 2. Transfer Characteristics − Channel 2
0.02
3
4
5
6
7
8
9
VGS, GATE−TO−SOURCE VOLTAGE (V)
10
0.03
TJ = 25°C
VGS = 4.5 V
0.025
0.02
0.015
Figure 3. On−Resistance vs. Gate−to−Source
Voltage − Channel 2
VGS = 10 V
2
6
10
14
ID, DRAIN CURRENT (A)
18
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage − Channel 2
1.6
100000
VGS = 0 V
VGS = 4.5 V
ID = 7 A
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
TJ = −55°C
VGS, GATE−TO−SOURCE VOLTAGE (V)
0.03
1.2
1
0.8
0.6
−50
TJ = 25°C
10
2
0.04
1.4
TJ = 125°C
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TJ = 25°C
ID = 7 A
2
30
0
0.05
0.01
40
5
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0
VDS ≥ 5 V
4.5 V
8.5 V
40
ID, DRAIN CURRENT (A)
50
6.5 V
10V
ID, DRAIN CURRENT (A)
50
−25
0
25
50
75
100
125
150
10000
TJ = 150°C
TJ = 125°C
1000
100
5
15
25
35
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature − Channel 2
Figure 6. Drain−to−Source Leakage Current
vs. Voltage − Channel 2
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NTMD5836NL
TYPICAL PERFORMANCE CURVES
10
1200
Ciss
800
600
400
Coss
200
0
Crss
0
10
20
30
40
8
6
4
QGD
QGS
2
0
VDS = 20 V
ID = 7 A
TJ = 25°C
0
5
10
VDS, DRAIN−TO−SOURCE (V)
VGS, GATE−TO−SOURCE (V)
1000
C, CAPACITANCE (pF)
QT
TJ = 25°C
VGS = 0 V
15
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
QG, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation − Channel 2
Figure 8. Gate−To−Source and
Drain−To−Source Voltage vs. Total Charge
1000
12
100
IS, SOURCE CURRENT (A)
t, TIME (ns)
VDD = 20 V
ID = 7 A
VGS = 4.5 V
tr
td(off)
10
td(on)
tf
10
8
6
4
2
0
1
1
10
RG, GATE RESISTANCE (W)
0.2
100
ID, DRAIN CURRENT (A)
100
10
1 ms
1
10 ms
VGS = 20 V
SINGLE PULSE
TC = 25°C
0.01
0.001
0.1
100 ms
dc
1 ms
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1
10
0.3
0.4
0.5
0.6
0.7
0.8
0.9
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
1
Figure 10. Diode Forward Voltage vs. Current
− Channel 2
100
EAS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance − Channel 2
0.1
VGS = 0 V
TJ = 25°C
20
ID = 21 A
15
10
5
0
25
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
50
75
100
125
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area − Channel 2
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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8
150
NTMD5836NL
TYPICAL PERFORMANCE CURVES
100
D = 0.5
R(t) (°C/W)
10
1
0.2
0.1
0.05
0.02
0.01
0.1
SINGLE PULSE
0.01
0.0000001 0.000001
0.00001
0.0001
0.001
0.01
0.1
t, PULSE TIME (s)
Figure 13. Thermal Response
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1
10
100
1000
NTMD5836NL
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
−Y−
K
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
SOLDERING FOOTPRINT*
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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NTMD5836NL/D