ETC 74F245SJX

Revised September 2000
74F245
Octal Bidirectional Transceiver with 3-STATE Outputs
General Description
Features
The 74F245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus-oriented
applications. Current sinking capability is 24 mA at the A
Ports and 64 mA at the B Ports. The Transmit/Receive
(T/R) input determines the direction of data flow through
the bidirectional transceiver. Transmit (active HIGH)
enables data from A Ports to B Ports; Receive (active
LOW) enables data from B Ports to A Ports. The Output
Enable input, when HIGH, disables both A and B Ports by
placing them in a High Z condition.
■ Non-inverting buffers
■ Bidirectional data path
■ A outputs sink 24 mA
■ B outputs sink 64 mA
Ordering Code:
Order Number
74F245SC
74F245SJ
Package Number
Package Description
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F245MSA
MSA20
74F245MTC
MTC20
74F245PC
N20A
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 2000 Fairchild Semiconductor Corporation
DS009503
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74F245 Octal Bidirectional Transceiver with 3-STATE Outputs
April 1988
74F245
Unit Loading/Fan Out
Pin Names
U.L.
Input IIH/IIL
HIGH/LOW
Output IOH/IOL
1.0/2.0
20 µA/−1.2 mA
Description
OE
Output Enable Input (Active LOW)
T/R
Transmit/Receive Input
A0–A7
Side A Inputs or
B0–B7
Side B Inputs or
3-STATE Outputs
1.0/2.0
20 µA/−1.2 mA
3.5/1.083
70 µA/−0.65 mA
150/40(38.3)
−3 mA/24 mA (20 mA)
3.5/1.083
70 µA/−0.65 mA
600/106.6(80) −12 mA/64 mA (48 mA)
3-STATE Outputs
Truth Table
Inputs
Output
OE
T/R
L
L
Bus B Data to Bus A
L
H
Bus A Data to Bus B
H
X
High Z State
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
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2
Recommended Operating
Conditions
Storage Temperature
−65°C to +150°C
Ambient Temperature under Bias
−55°C to +125°C
Free Air Ambient Temperature
Junction Temperature under Bias
−55°C to +150°C
Supply Voltage
0°C to +70°C
+4.5V to +5.5V
−0.5V to +7.0V
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
−0.5V to +7.0V
Input Current (Note 2)
−30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with VCC = 0V)
Standard Output
−0.5V to VCC
3-STATE Output
−0.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Current Applied to Output
in LOW State (Max)
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
twice the rated IOL (mA)
ESD Last Passing Voltage (Min)
4000V
DC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
VCC
VIL
Input LOW Voltage
0.8
V
VCD
Input Clamp Diode Voltage
−1.2
V
Min
VOH
Output HIGH Voltage
V
Min
V
Min
µA
Max
VIN = 2.7V
VIN = 7.0V (OE, T/R)
Output LOW Voltage
10% VCC
2.4
10% VCC
2.0
5% VCC
2.7
V
Conditions
Input HIGH Voltage
VOL
2.0
Units
VIH
Recognized as a HIGH Signal
Recognized as a LOW Signal
IIN = −18 mA
IOH = −3 mA (An)
IOH = −15 mA (Bn)
IOH = −3 mA (An)
10% VCC
0.5
10% VCC
0.55
IIH
Input HIGH Current
5.0
IOL = 24 mA (An)
IOL = 64 mA (Bn)
IBVI
Input HIGH Current Breakdown Test
7.0
µA
Max
IBVIT
Input HIGH Current Breakdown (I/O)
0.5
mA
Max
VIN = 5.5 V (An, Bn)
ICEX
Output HIGH Leakage Current
50
µA
Max
VOUT = VCC (An, Bn)
V
0.0
3.75
µA
0.0
−1.2
mA
Max
VIN = 0.5V (T/R, OE)
VOUT = 2.7V (An, Bn)
VID
Input Leakage
Test
IOD
4.75
Output Leakage
Circuit Current
IIL
Input LOW Current
IIH + IOZH
Output Leakage Current
70
µA
Max
IIL + IOZL
Output Leakage Current
−650
µA
Max
IOS
Output Short-Circuit Current
−60
−150
−100
−225
IID = 1.9 µA
All Other Pins Grounded
VIOD = 150 mV
All Other Pins Grounded
VOUT = 0.5V (An, Bn)
VOUT = 0V (An)
mA
Max
500
µA
0.0V
VOUT = 5.25V(An, Bn)
VOUT = 0V (Bn)
IZZ
Bus Drainage Test
ICCH
Power Supply Current
70
90
mA
Max
VO = HIGH
ICCL
Power Supply Current
95
120
mA
Max
VO = LOW
ICCZ
Power Supply Current
85
110
mA
Max
VO = HIGH Z
3
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74F245
Absolute Maximum Ratings(Note 1)
74F245
AC Electrical Characteristics
Symbol
Parameter
TA = +25°C
TA = − 55°C to +125°C
TA = 0°C to +70°C
VCC = +5.0V
CL = 50 pF
CL = 50 pF
CL = 50 pF
Min
Typ
Max
Min
Max
Min
Max
tPLH
Propagation Delay
2.5
4.2
6.0
2.0
7.5
2.0
7.0
tPHL
An to Bn or Bn to An
2.5
4.2
6.0
2.0
7.5
2.0
7.0
tPZH
Output Enable Time
3.0
5.3
7.0
2.5
9.0
2.5
8.0
3.5
6.0
8.0
3.0
10.0
3.0
9.0
tPZL
tPHZ
Output Disable Time
tPLZ
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2.0
5.0
6.5
2.0
9.0
2.0
7.5
2.0
5.0
6.5
2.0
10.0
2.0
7.5
4
Units
ns
ns
74F245
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
5
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74F245
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
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6
74F245
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
Package Number MSA20
7
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74F245
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
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8
74F245 Octal Bidirectional Transceiver with 3-STATE Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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