Revised May 2002 74LCXH16245 Low Voltage 16-Bit Bidirectional Transceiver with Bushold General Description Features The LCXH16245 contains sixteen non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The device is designed for low voltage (2.5V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment. The device is byte controlled. Each byte has separate control inputs which could be shorted together for full 16-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B Ports by placing them in a high impedance state. ■ 2.3V–3.6V VCC specifications provided The LCXH16245 data inputs include active bushold circuitry, eliminating the need for external pull-up resistors to hold unused or floating data inputs at a valid logic level. The LCXH16245 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation. ■ 4.5 ns tPD max (VCC = 3.3V), 20 µA ICC max ■ Power-down high impedance outputs ■ Bushold on inputs eliminates the need for external pull-up/pull-down resistors ■ ±24 mA output drive (VCC = 3.0V) ■ Implements patented noise/EMI reduction circuitry ■ Latch-up performance conforms to the requirements of JESD78 ■ ESD performance: Human body model > 2000V Machine model > 200V ■ Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) Ordering Code: Order Number Package Number Package Description 74LCXH16245G (Note 1) (Note 2) BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide 74LCXH16245MTD (Note 2) MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Note 1: Ordering Code “G” indicates Trays. Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol © 2002 Fairchild Semiconductor Corporation DS500581 www.fairchildsemi.com 74LCXH16245 Low Voltage 16-Bit Bidirectional Transceiver with Bushold May 2002 74LCXH16245 Connection Diagrams Pin Descriptions Pin Names Pin Assignment for SSOP and TSSOP Description OEn Output Enable Input T/Rn Transmit/Receive Input A0–A15 Side A Inputs or 3-STATE Outputs (Bushold) B0–B15 Side B Inputs or 3-STATE Outputs (Bushold) FBGA Pin Assignments 1 2 3 4 5 6 A B0 NC T/R1 OE1 NC A0 B B2 B1 NC NC A1 A2 C B4 B3 VCC VCC A3 A4 D B6 B5 GND GND A5 A6 E B8 B7 GND GND A7 A8 F B10 B9 GND GND A9 A10 A12 G B12 B11 VCC VCC A11 H B14 B13 NC NC A13 A14 J B15 NC T/R2 OE2 NC A15 Truth Tables Inputs OE1 Outputs T/R1 L L L H Bus B0–B7 Data to Bus A0–A7 Bus A0–A7 Data to Bus B0–B7 H X HIGH Z State on A0–A7, B0–B7 Inputs OE2 Pin Assignment for FBGA Outputs T/R2 L L Bus B8–B15 Data to Bus A8–A15 L H Bus A8–A15 Data to Bus B8–B15 H X HIGH Z State on A8–A15, B8–B15 H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Logic Diagram (Top Thru View) www.fairchildsemi.com 2 Symbol Parameter VCC Supply Voltage VI DC Input Voltage VO DC Output Voltage Value Conditions Units −0.5 to +7.0 V −0.5 to VCC + 0.5 V −0.5 to +7.0 Output in 3-STATE −0.5 to VCC + 0.5 Output in HIGH or LOW State (Note 4) IIK DC Input Diode Current −50 VI < GND IOK DC Output Diode Current −50 VO < GND +50 VO > VCC V mA mA IO DC Output Source/Sink Current ±50 mA ICC DC Supply Current per Supply Pin ±100 mA IGND DC Ground Current per Ground Pin ±100 mA TSTG Storage Temperature −65 to +150 °C Recommended Operating Conditions (Note 5) Symbol VCC Parameter Supply Voltage VI Input Voltage VO Output Voltage IOH/IOL Output Current TA Free-Air Operating Temperature ∆t/∆V Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V Min Max Operating 2.0 3.6 Data Retention 1.5 3.6 0 VCC HIGH or LOW State 0 VCC 3-STATE 0 VCC VCC = 3.0V − 3.6V ±24 VCC = 2.7V − 3.0V ±12 VCC = 2.3V − 2.7V ±8 Units V V V mA −40 85 °C 0 10 ns/V Note 3: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 4: IO Absolute Maximum Rating must be observed. Note 5: Floating or unused control inputs must be HIGH or LOW. DC Electrical Characteristics Symbol VIH VIL VOH VOL Parameter Conditions HIGH Level Input Voltage LOW Level Input Voltage IOH = −100 µA HIGH Level Output Voltage LOW Level Output Voltage Input Leakage Current Data (V) TA = −40°C to +85°C Min 2.3 − 2.7 1.7 2.7 − 3.6 2.0 Max 2.3 − 2.7 0.7 0.8 2.3 − 3.6 1.8 IOH = −12 mA 2.7 2.2 IOH = −18 mA 3.0 2.4 IOH = −24 mA 3.0 2.2 IOL = 100 µA 2.3 − 3.6 V 0.2 IOL = 8mA 2.3 0.6 IOL = 12 mA 2.7 0.4 IOL = 16 mA 3.0 0.4 3.0 0.55 Control O ≤ VI ≤ 5.5 3 V VCC − 0.2 2.3 VI = VCC or GND Units V 2.7 − 3.6 IOH = −8 mA IOL = 24 mA II VCC 2.3 − 3.6 ±5.0 2.3 − 3.6 ±5.0 V µA www.fairchildsemi.com 74LCXH16245 Absolute Maximum Ratings(Note 3) 74LCXH16245 DC Electrical Characteristics Symbol (Continued) Parameter VCC Conditions TA = −40°C to +85°C (V) II(HOLD) Bushold Input Minimum VIN = 0.7V Drive Hold Current VIN = 1.7V 2.3 VIN = 0.8V 3.0 VIN = 2.0V II(OD) Bushold Input Over-Drive (Note 6) Current to Change State (Note 7) 2.7 (Note 6) 3.6 (Note 7) IOZ 3-STATE I/O Leakage VO = VCC or GND IOFF Power-Off Leakage Current VI or VO = 5.5V ICC Quiescent Supply Current ∆ICC Increase in ICC per Input Min Units Max 45 −45 µA 75 −75 300 −300 µA 450 −450 2.3 − 3.6 ±5.0 0 10 µA µA VI = VCC or GND 2.3–3.6 20 µA VIH = V CC −0.6V 2.3–3.6 500 µA Note 6: An external driver must source at least the specified current to switch from LOW-to-HIGH. Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW. AC Electrical Characteristics TA = −40°C to +85°C, RL = 500Ω Symbol Parameter VCC = 3.3V ± 0.3V VCC = 2.7V VCC = 2.5V ± 0.2V CL = 50 pF CL = 50 pF CL = 30 pF Min Max Min Max Min Max tPHL Propagation Delay 1.0 4.5 1.0 5.2 1.0 5.4 tPLH An to Bn or Bn to An 1.0 4.5 1.0 5.2 1.0 5.4 tPZL Output Enable Time 1.0 6.5 1.0 7.2 1.0 8.5 1.0 6.5 1.0 7.2 1.0 8.5 1.0 6.4 1.0 6.9 1.0 7.7 1.0 6.4 1.0 6.9 1.0 7.7 tPZH tPLZ Output Disable Time tPHZ tOSHL Output to Output Skew (Note 8) 1.0 tOSLH Units ns ns ns ns 1.0 Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design. Dynamic Switching Characteristics Symbol Parameter VOLP Quiet Output Dynamic Peak VOL VOLV Quiet Output Dynamic Valley VOL Conditions VCC (V) TA = 25°C Typical CL = 50 pF, VIH = 3.3V, VIL = 0V 3.3 CL = 30 pF, VIH = 2.5V, VIL = 0V 2.5 0.6 CL = 50 pF, VIH = 3.3V, VIL = 0V 3.3 −0.8 CL = 30 pF, VIH = 2.5V, VIL = 0V 2.5 −0.6 0.8 Units V V Capacitance Typical Units CIN Symbol Input Capacitance Parameter VCC = Open, VI = 0V or VCC 7 pF CI/O Input/Output Capacitance VCC = 3.3V, VI = 0V or VCC 8 pF CPD Power Dissipation Capacitance VCC = 3.3V, VI = 0V or VCC, f = 10 MHz 20 pF www.fairchildsemi.com Conditions 4 74LCXH16245 AC LOADING and WAVEFORMS Generic for LCX Family FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance) Test Switch tPLH, tPHL Open tPZL, tPLZ 6V at VCC = 3.3 ± 0.3V, 2.7V and VCC x 2 at VCC = 2.5 ± 0.2V tPZH, tPHZ GND Waveform for Inverting and Non-Inverting Functions 3-STATE Output High Enable and Disable Times for Logic Propagation Delay. Pulse Width and trec Waveforms Setup Time, Hold Time and Recovery Time for Logic trise and tfall 3-STATE Output Low Enable and Disable Times for Logic FIGURE 2. Waveforms (Input Characteristics; f =1MHz, tr = tf = 3ns) Symbol VCC 3.3V ± 0.3V 2.7V 2.5V ± 0.2V Vmi 1.5V 1.5V VCC/2 Vmo 1.5V 1.5V VCC/2 Vx VOL + 0.3V VOL + 0.3V VOL + 0.15V Vy VOH − 0.3V VOH − 0.3V VOH − 0.15V 5 www.fairchildsemi.com 74LCXH16245 Schematic Diagram Generic for LCX Family www.fairchildsemi.com 6 74LCXH16245 Physical Dimensions inches (millimeters) unless otherwise noted 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Package Number BGA54A 7 www.fairchildsemi.com 74LCXH16245 Low Voltage 16-Bit Bidirectional Transceiver with Bushold Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD48 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 8