ACPM-5251 4x5 UMTS Band I & Band V Dual-Band Power Amplifier Module with Integrated Coupler Data Sheet Description Features The ACPM-5251 is the dual-band power amplifier module with integrated directional coupler designed for UMTS Band 1 and Band 5 uplink transmission in the mobile handsets, data cards or dongles supporting WCDMA and/ or HSPA. This product has been designed, tested and characterized to the stringent spectral linearity and other requirements of the 3GPP standards including the HSDPA, HSUPA and HSPA+ UL transmission while keeping the key emphasis on the excellent PAE over the entire power range, i.e. the exceptional average power consumption and talk-time. UMTS Band 1 and Band 5 dual-band PA Integrated directional coupler (daisy-chained between both bands with single coupled out port and internally terminated isolation port) High directivity (small coupled power or delivered power variation into mismatched load) 3-mode power/gain control (active bypass, mid power, and high power modes) Excellent PAE in low and mid power ranges. 3.5mA quiescent current in active bypass (low-power) mode Excellent average power consumption and talk-time Spectral linearity supporting HSDPA, HSUPA, and HSPA+ Internally matched 50Ω RF input & output ports Internal RF input & output DC blocking capacitors Internal Vcc bypass capacitors Internal Vref eliminating external LDO regulators and switches 1.8V CMOS compatible control logics (VH=1.35V~3.1V) 4 x 5 x 1mm 14-pad leadless surface-mount package Lead-free, RoHS compliant, Halogen-free, Sb-free, Green The ACPM-5251 contains all of the input and output matching networks, Vcc decoupling/bypass capacitors, RF input & output DC blocking capacitors as well as the daisy-chained directional coupler integrated into the module substrate PCB, all in a single 14-pad surfacemount leadless package with 4x5 mm from factor and 1mm thickness. The integrated directional coupler has a single coupledout port and is daisy-chained between the both bands with internally 50-terminated isolation port. It also has excellent coupler directivity in both bands allowing small coupled out power variation or delivered power variation caused by the load mismatch from the antenna. The coupler directivity, i.e. the power variation into the mismatched load is critical to the TRP performance of the mobile phones in the real operation as well as the spec. compliance test. The ACPM-5251 features CoolPAM-5 circuit technology which supports 3 power/gain modes – active bypass (low power), mid power, and high power modes. CoolPAM is the stage bypass technology that enables very lower power consumption especially in the low and mid output power ranges. The active bypass technology added in the CoolPAM-5 further enhances the PAE at low output power range together with the exceptionally low quiescent current. It dramatically saves the average power consumption extending the talk time of the phones and battery life of the other mobile data devices even much longer. The ACPM-5251 has integrated on-chip Vref and on-module bias switch as the one of the key features of the CoolPAM-5, so the external Vref is not required eliminating the external LDO regulators and switches from the circuit boards of the mobile devices. It also makes the PA fully digital-controllable by the Ven pin that simply turns the PA on and off from the digital control logic inputs Applications UMTS Band 1 and Band 5 Uplink Transmission in WCDMA / HSDPA / HSUPA / HSPA+ handsets, data cards and dongles Ordering Information Part Number Number of Devices Container ACPM-5251-TR1 1000 7” Tape/Reel ACPM-5251-BLK 100 Bulk Description (Cont.) from the baseband chipsets. All of the digital control input pins such as the Ven, Vmode and Vbp are fully CMOS compatible down to the 1.8V logic and all they needs just several uA of current drawn per pin to be driven. The CoolPAM series of power amplifiers are manufactured on an advanced InGaP HBT technology offering excellent performance, temperature stability, ruggedness, and reliability. Absolute Maximum Ratings – Stresses in excess of the absolute ratings may cause permanent damage. Exposure to absolute ratings for extended periods of time may adversely affect reliability. Functional operation is not implied under these conditions. Description Condition Min Nominal Max Unit Associated Pins DC Supply Voltage (Vcc) RF Off, All Modes, ZS=ZL=50 – – +6.0 V Vcc1, Vcc2 – – +4.5 V Vcc1, Vcc2 Enable Control Voltage (Ven_LB, Ven_HB) – – +3.3 V Ven_LB, Ven_HB Mode Control Voltage (Vmode) – – +3.3 V Vmode Bypass Control Voltage (Vbp) – – +3.3 V Vbp RF On, All Modes, ZS=ZL=50 RF Input Power (Pin) HPM, ZS=ZL=50 MPM, ZS=ZL=50 BPM, ZS=ZL=50 – – – – – – +10 +6 +6 dBm dBm dBm RFin_LB, RFin_HB Revere RF Power injected into RF Output Port (Por) B5, PDM, GMSK 25% Duty Cycle B1, PDM, GMSK 25% Duty Cycle – – – – +31 +29 dBm dBm RFout_LB RFout_HB -55 – +125 °C Storage Temperature (Tstg) Recommended Operating Condition Description Min Nominal Max Unit DC Supply Voltage (Vcc) 3.2 3.4 4.2 V 0 1.35 0 1.8 0.5 3.1 V V – – 0.1 mA 0 1.35 0 1.8 0.5 3.1 V V – – 0.1 mA 824 1920 – – 849 1980 MHz MHz -20 +25 +85 °C Ven_LB Ven_HB Vmode Vbp Enable Control Voltage (Ven_LB, Ven_HB) VLOW VHIGH Enable Control Current (Ien_LB, Ien_HB) Mode & Bypass Control Voltage (Vmode, Vbp) VLOW VHIGH Mode & Bypass Control Current (Imode, Ibp) Operating Frequency (fc) Band 5 Band 1 Case Temperature (Tc) Operating Logic Table Selected Band & Power Mode Vcc1 / Vcc2 LB (B5) HPM (High-Power Mode) On High Low Low X LB (B5) MPM (Mid-Power Mode) On High Low High Low LB (B5) BPM (Bypass Power Mode) On High Low High High HB (B1) HPM (High-Power Mode) On Low High Low X HB (B1) MPM (Mid-Power Mode) On Low High High Low HB (B1) BPM (Bypass Power Mode) On Low High High High PDM (Power Down Mode) On Low Low X X * BPM (Bypass Modes) = Active Bypass Mode / Low Power Mode 2 Electrical Characteristics – Conditions: Vcc=3.4V, Ta=25°C, ZSOURCE = ZLOAD = 50 – Signal Configuration : 3GPP UL RMC 12.2kbps (WCDMA R’99) unless specified otherwise Band 5 Characteristics Condition Min Typ Max Unit Operating Frequency Range 824 – 849 MHz Max. Linear Output Power HPM, WCDMA (CM=0 / MPR=-1dB) HPM, HSDPA MPR=0dB HPM, HSUPA MPR=0dB MPM, WCDMA (CM=0 / MPR=-1dB) MPM, HSPA MPR=0dB BPM, WCDMA (CM=0 / MPR=-1dB) BPM, HSPA MPR=0dB HPM, Pout=27.5dBm 27.5 26.5 26.0 18.0 17.0 12.0 11.0 24 – – – – – – – 27.8 – – – – – – – 31 dBm MPM, Pout=18.0dBm 14 17.8 22 dB BPM, Pout=12.0dBm 8 12.6 16 dB HPM, Pout=27.5dBm 34.8 39.0 – % MPM, Pout=18.0dBm 18.3 23.1 – % BPM, Pout=12.0dBm 9.8 13.8 Gain PAE Total Supply Current Quiescent Current Enable Control Current Mode Control Current dBm dBm dB % HPM, Pout=27.5dBm 350 425 475 mA MPM, Pout=18.0dBm 50 79 100 mA BPM, Pout=12.0dBm 20 32 45 mA HPM 70 100 130 mA MPM 10 19 30 mA BPM 2 3.4 5 mA HPM, Ven_LB=1.8V – 10 50 A MPM, Ven_LB=1.8V – 10 50 A BPM, Ven_LB=1.8V – 10 50 A MPM, Vmode=1.8V – 10 50 A BPM, Vmode=1.8V – 10 50 A Bypass Control Current BPM, Vbp=1.8V – 10 50 A Total Current in Power Down Mode Ven_LB=Ven_HB=0V, Vmode=Vbp=0V – 1 5 A Adjacent Channel Leakage Ratio – – – – – – – – – – – – – – – – Pout ≤ Max.Pout – MPR Pout ≤ Max.Pout – MPR – 3dB – – – – – – – – – – – – – – – – – – – -42 – – -45 – -46 – -56 – – -62 – -61 – -38 -63 -36 -36 -36 -36 -36 -36 -36 -46 -46 -46 -46 -46 -46 -46 -30 -40 5 4 2.5:1 dBc +/-5MHz Offset +/-5MHz Offset +/-5MHz Offset Adjacent Channel Leakage Ratio +/-10MHz Offset +/-10MHz Offset +/-10MHz Offset Harmonic Suppression EVM Input VSWR 3 2nd 3rd 2:1 dBc dBc dBc dBc dBc dBc % rms – Band 5 (Continue) Characteristics Condition Min Typ Max Unit Rx Band Noise HPM, Pout=27.5dBm, Vcc=4.2V – -135 -132 dBm/Hz GPS Band Noise HPM, Pout=27.5dBm, Vcc=4.2V – -155 -140 dBm/Hz ISM Band Noise HPM, Pout=27.5dBm, Vcc=4.2V – -157 -143 dBm/Hz Phase Discontinuity MPMHPM, at Pout=18dBm Typ-30 8 Typ+30 deg BPMMPM, at Pout=12dBm Typ-30 22 Typ+30 deg Ven transition to final ICQ ±10% Ven transition to ICQ ≤ 0.1mA RFin On to final Pout ±1dB RFin Off to initial Pout – 30dB Ven transition to final RF Pout ±1dB Vbp transition to final RF Pout ±1dB Vmode transition to final RF Pout ±1dB Vbp/Vmode transition to final RF Pout ±1dB Pcpl – Pout, RFout & Couple ZLOAD = 50 Load VSWR = 2.5:1 All Phase, Constant Pcpl – – – – – – – – – – – – 3.5 3.5 3.5 3.5 20 20 6 6 10 10 10 10 s – -20 – dB – ±0.3 ±1.0 dB – – -60 dBc – – 10:1 VSWR Turn-On/Off DC Turn-On (RF Off ) Time DC Turn-Off (RF Off ) RF Turn-On RF Turn-Off Mode PDMBPM / MPM / HPM Switching BPMMPM Time MPMHPM BPMHPM Coupling Factor Delivered Power Variation by Load Mismatch with Constant Coupled Power Stability (Spurious Output) Ruggedness (No Damage or Degradation) 4 In-Band Load VSWR ≤ 5:1 All Phase, Pout≤27.5dBm & Pin≤6dBm Pout≤27.5dBm & Pin≤10dBm, All Phase s Band 1 Characteristics Condition Min Typ Max Operating Frequency Range 1920 – 1980 MHz Max. Linear Output Power HPM, WCDMA (CM=0 / MPR=-1dB) HPM, HSDPA MPR=0dB HPM, HSUPA MPR=0dB MPM, WCDMA (CM=0 / MPR=-1dB) MPM, HSPA MPR=0dB BPM, WCDMA (CM=0 / MPR=-1dB) BPM, HSPA MPR=0dB HPM, Pout=27.5dBm 27.5 26.5 26.0 18.0 17.0 12.0 11.0 24 – – – – – – – 27.5 – – – – – – – 31 dB MPM, Pout=18.0dBm 15 19.5 24 dB BPM, Pout=12.0dBm 8 11.7 16 dB Gain PAE Total Supply Current Quiescent Current Enable Control Current Mode Control Current Unit dB dB dB HPM, Pout=27.5dBm 34.0 38.4 – % MPM, Pout=18.0dBm 18.3 24.5 – % BPM, Pout=12.0dBm 8.7 11.7 – % HPM, Pout=27.5dBm 360 430 485 mA MPM, Pout=18.0dBm 50 75 100 mA BPM, Pout=12.0dBm 20 37 50 mA HPM 85 115 145 mA MPM 15 22 30 mA BPM 2 3.5 5 mA HPM, Ven_HB=1.8V – 10 50 A MPM, Ven_HB=1.8V – 10 50 A BPM, Ven_HB=1.8V – 10 50 A MPM, Vmode=1.8V – 10 50 A BPM, Vmode=1.8V – 10 50 A Bypass Control Current BPM, Vbp=1.8V – 10 50 A Total Current in Power Down Mode Ven_LB=Ven_HB=0V, Vmode=Vbp=0V – 1 5 A Adjacent Channel Leakage Ratio HPM, WCDMA R’99, Pout=27.5dBm HPM, HSDPA MPR=0dB, Pout=26.5dBm HPM, HSUPA MPR=0dB, Pout=26.0dBm MPM, WCDMA R’99, Pout=18.0dBm MPM, HSPA MPR=0dB, Pout=17.0dBm BPM, WCDMA R’99, Pout=12.0dBm BPM, HSPA MPR=0dB, Pout=11.0dBm HPM, WCDMA R’99, Pout=27.5dBm HPM, HSDPA MPR=0dB, Pout=26.5dBm HPM, HSUPA MPR=0dB, Pout=26.0dBm MPM, WCDMA R’99, Pout=18.0dBm MPM, HSPA MPR=0dB, Pout=17.0dBm BPM, WCDMA R’99, Pout=12.0dBm BPM, HSPA MPR=0dB, Pout=11.0dBm HPM, Pout=27.5dBm, Meas.BW=1MHz – – – – – – – – – – – – – – – – – – – -43 – – -42 – -39 – -55 – – -63 – -58 – -44 -64 -36 -36 -36 -36 -36 -36 -36 -46 -46 -46 -46 -46 -46 -46 -30 -40 5 4 2.5:1 dBc +/-5MHz Offset +/-5MHz Offset +/-5MHz Offset Adjacent Channel Leakage Ratio +/-10MHz Offset +/-10MHz Offset +/-10MHz Offset Harmonic Suppression EVM Input VSWR 5 2nd 3rd Pout ≤ Max.Pout – MPR Pout ≤ Max.Pout – MPR – 3dB 2.2:1 dBc dBc dBc dBc dBc dBc % rms Band 1 (Continue) Characteristics Condition Min Typ Max Unit Rx Band Noise HPM, Pout=27.5dBm, Vcc=4.2V – -137 -134 dBm/Hz GPS Band Noise HPM, Pout=27.5dBm, Vcc=4.2V – -141 -136 dBm/Hz ISM Band Noise HPM, Pout=27.5dBm, Vcc=4.2V – -145 -142 dBm/Hz Phase Discontinuity MPMHPM, at Pout=18dBm Typ-30 15 Typ+30 deg BPMMPM, at Pout=12dBm Typ-30 3 Typ-30 deg Ven transition to final ICQ ±10% Ven transition to ICQ ≤ 0.1mA RFin On to final Pout ±1dB RFin Off to initial Pout – 30dB Ven transition to final RF Pout ±1dB Vbp transition to final RF Pout ±1dB Vmode transition to final RF Pout ±1dB Vbp/Vmode transition to final RF Pout ±1dB Pcpl – Pout, RFout & Couple ZLOAD = 50 Load VSWR = 2.5:1 All Phase, Constant Pcpl – – – – – – – – – – – – 3.5 3.5 3.5 3.5 10 10 6 6 10 10 10 10 s – -20 – dB – ±0.5 ±1.0 dB – – – – – – -60 dBc 10:1 VSWR Turn-On/Off DC Turn-On (RF Off ) Time DC Turn-Off (RF Off ) RF Turn-On RF Turn-Off Mode PDMBPM / MPM / HPM Switching BPMMPM Time MPMHPM BPMHPM Coupling Factor Delivered Power Variation by Load Mismatch with Constant Coupled Power Stability (Spurious Output) Ruggedness (No Damage or Degradation) In-Band Load VSWR ≤ 5:1 All Phase, Pout≤27.5dBm & Pin≤6dBm Pout≤27.5dBm & Pin≤10dBm, All Phase s HSDPA MPR=0dB Signal Configuration used: 3GPP TS 34.121-1 Annex C (normative): Measurement channels C.10.1 UL reference measurement channel for HSDPA tests Table C.10.1.4: β values for transmitter characteristics tests with HS-DPCCH Sub-test 2 (CM=1.0, MPR=0.0) HSUPA MPR=0dB Signal Configuration used: 3GPP TS 34.121-1 Annex C (normative): Measurement channels C.11.1 UL reference measurement channel for E-DCH tests Table C.11.1.3: values for transmitter characteristics tests with HS-DPCCH and E-DCH Sub-test 1 (CM=1.0, MPR=0.0) 6 Functional Block Diagram Active Bypass Impedance Transformer Bypass Circuit Pre RFin_LB Vcc1 Ven_LB Ven_HB RFin_HB Drive Main Output Match Input Match & Power Divider RFout_LB Vcc2 Vmode Vbp Bias Circuit & Control Logic Input Match & Power Divider Output Match Pre Drive Bypass Circuit RFout_HB Main Impedance Transformer Active Bypass Couple PIN DESCRIPTIONS Footprint Module Outline 0.10 0.11 1.20 Pin 1 2.50 0.73 0.40 0.40 0.10 0.11 2.00 X-Ray Top View through Package All dimensions are in mm 7 Pin # Name Description 1 2 3 4 RFIn_LB Vmode Vbp Vcc1 LB (B5) RF Input Mode Control Bypass Control Supply Voltage 1 5 6 7 Ven_LB Ven_HB RFIn_HB LB (B5) PA Enable HB (B1) PA Enable HB (B1) RF Input 8 9 10 Couple Gnd RFOut_HB Coupled Out Ground HB (B1) RF Ouptut 11 12 13 Gnd Vcc2 Gnd Ground Supply Voltage 2 Ground 14 RFOut_LB LB (B5) RF Output Package Dimensions Pin 1 Mark 1 14 2 13 3 12 4 11 5 10 6 9 7 8 5 ± 0.1 4 ± 0.1 1 ± 0.1 Marking Specification Pin 1 Mark AVAGO ACPM-5251 Part Number KYYWW K : Assembly Site Code YYWW : Assembly Year & Work Week XXXXXXXX : Assembly Lot Number (5~8 digits) XXXXXXXX 8 Evaluation Board Schematic B5 RF In B5 RF Out 1 RFIn_LB RFOut_LB 14 Vmode Vbp C6 100pF Vcc1 C5 100pF Ven_B5 Ven_B2 B1 RF In C4 2.2uF C3 1000pF 2 Vmode Gnd 13 3 Vbp Vcc2 12 4 Vcc1 Gnd 11 Vcc2 C7 1000pF C8 2.2uF B1 RF Out C2 100pF C1 100pF 5 Ven_LB RFOut_HB 10 6 Ven_HB Gnd 9 7 RFIn_HB Couple 8 Coupled Evaluation Board Description RFin_LB RFout_LB C6 C5 C4 C3 C2 C1 AVAGO ACPM-5251 KYYWW XXXXXXX C7 RFin_HB RFout_HB Couple 9 C8 Application on mobile phone board The figure 1 shows an application example in mobile. C5 and C6 should be placed close to pin4 and pin11. Bypass cap C1, C2, C3 and C4 should be also placed nearby from pin2, pin3, pin5 and pin6, respectively. The length of post-PA transmission line should be minimized to reduce line loss. TX filter C8 Output matching circuit RF In Low C10 DPX C1 C2 C11 PA_R0 RF Out Low L1 ACPM-5251 PA_R1 Low IN Vmode Vbp Vcc1 Ven_L Ven_H High IN PA_ON_Low PA_ON_Low BandBand PA_ON _High Band PA_ON_High Band Low OUT GND Vcc2 GND RFOut_Hi GND CPL Coupler C4 Output matching circuit C3 RF In High C5 C12 C6 DPX C13 C7 TX filter L2 RF Out High C9 VBATT Figure 1. Peripheral Circuits Recommended Values (L, C) C1 100pF C6 1000pF C11 DNI* C2 100pF C7 2.2uF C12 100pF C3 100pF C8 100pF C13 DNI* C4 100pF C9 100pF L1 DNI* C5 1000pF C10 100pF L2 DNI* Notes: 1. C1, C2, C3 and C4 should be placed close to each pin to reduce noise coming from the BB chipset as well as crossing between other power lines. 2. C5 and C6 are used for decoupling high frequency noise and C7 is for decoupling low frequency noise. They may affect Rx band noise, GPS band noise and spurious characteristics. For better performance, C5 and C6 should be used both Vcc1 and Vcc2 pins. * Recommended Values are changeable by phone Board impedance. 10 PCB layout and part placement on phone board 4 3 1 5 2 Via hole Figure 2. PCB guideline on phone board Notes: 1. To prevent voltage drop, make the bias lines as wide as possible (Red line). 2. Use many via holes to fence off PA RF input and output traces for better isolation. Output signal of the PA should be isolated from input signal and the receive signal. Output signal should not be fed into PA input. (Yellow line) 3. Use via holes to connect outer ground planes to internal ground planes. They help heat spread out more easily and accordingly the board temperature can be lowered. They also help to improve RF stability. 4. PA which has a ground slug requires many via holes which go through all the layers (Pink square). 5. CPL_out line and RFout line are recommended to be at the different layer for better CPL_out/ RF_out isolation (Green line). 11 Matching network and loadpull data S11 S22 S21 PA Output Matching Network TX SAW Duplexer Switch P Antenna Switch TRx RX TX impedance for PA (S11) TX impedance for ANT (S22) TX path loss (S21) Figure 3. PA matching setup on the phone board Vcc3.4v, Ven=2.6v, Vmode,Vbp=0, WCDMA(Rel99) Shunt L Series L VSWR = 3.0 VSWR = 2.0 VSWR = 1.5 Shunt C Figure 4. ACPM-5251 B1 loadpull data 12 Series C Figure 5. Matching network and PA optimized area Metallization 0.60 Solder Mask Opening Ø 0.3 Via on 0.6 pitch 0.70 0.50 Module Outline 0.55 0.50 0.40 2.30 0.73 0.73 Module Outline 0.33 0.25 Connected to an inner layer through a VIA hole. Please see the belo note 2.40 Note: High isolation between a CPL line and a RFout_HB line is required to avoid unwanted power coupling from high band RF output line to coupler line. Solder Paste Stencil Aperture 0.60 Module Outline PCB Design Guidelines The recommended PCB land pattern is shown in figures on the left side. The substrate is coated with solder mask between the I/O and conductive paddle to protect the gold pads from short circuit that is caused by solder bleeding/bridging. 0.50 0.40 2.10 Stencil Design Guidelines A properly designed solder screen or stencil is required to ensure optimum amount of solder paste is deposited onto the PCB pads. 0.73 2.00 13 The recommended stencil layout is shown here. Reducing the stencil opening can potentially generate more voids. On the other hand, stencil openings larger than 100% will lead to excessive solder paste smear or bridging across the I/O pads or conductive paddle to adjacent I/O pads. Considering the fact that solder paste thickness will directly affect the quality of the solder joint, a good choice is to use laser cut stencil composed of 0.100mm(4mils) or 0.127mm(5mils) thick stainless steel which is capable of producing the required fine stencil outline. Tape and Reel Information AVAGO ACPM-5251 PYYWW AAAAA Dimension List Annote Millimeter Annote Millimeter A0 4.40±0.10 P2 2.00±0.05 B0 5.30±0.10 P10 40.00±0.20 K0 1.20±0.10 E 1.75±0.10 D0 1.55±0.05 F 5.50±0.05 D1 1.60±0.10 W 12.00±0.30 P0 4.00±0.10 T 0.30±0.05 P1 8.00±0.10 Tape and Reel Format – 4 mm x 5 mm 14 Reel Drawing BACK VIEW Shading indicates thru slots 18.4 max. 178 +0.4 -0.2 50 min. 25 min wide (ref) Slot for carrier tape insertion for attachment to reel hub (2 places 180° apart) 12.4 +2.0 -0.0 FRONT VIEW 1.5 min. 13.0 ± 0.2 21.0 ± 0.8 Plastic Reel Format (all dimensions are in millimeters) 15 NOTES: 1. Reel shall be labeled with the following information (as a minimum). a. manufacturers name or symbol b. Avago Technologies part number c. purchase order number d. date code e. quantity of units 2. A certificate of compliance (c of c) shall be issued and accompany each shipment of product. 3. Reel must not be made with or contain ozone depleting materials. 4. All dimensions in millimeters (mm) Handling and Storage ESD (Electrostatic Discharge) Electrostatic discharge occurs naturally in the environment. With the increase in voltage potential, the outlet of neutralization or discharge will be sought. If the acquired discharge route is through a semiconductor device, destructive damage will result. ESD countermeasure methods should be developed and used to control potential ESD damage during handling in a factory environment at each manufacturing site. MSL (Moisture Sensitivity Level) Plastic encapsulated surface mount package is sensitive to damage induced by absorbed moisture and temperature. Avago Technologies follows JEDEC Standard J-STD 020B. Each component and package type is classified for moisture sensitivity by soaking a known dry package at various temperatures and relative humidity, and times. After soak, the components are subjected to three consecutive simulated reflows. The out of bag exposure time maximum limits are determined by the classification test describe below which corresponds to a MSL classification level 6 to 1 according to the JEDEC standard IPC/JEDEC J-STD-020B and J-STD-033. ACPM-5252 is MSL3. Thus, according to the J-STD-033 p.10, the maximum Manufacturers Exposure Time (MET) for this part is 168 hours. After this time period, the part would need to be removed from the reel, de-taped and then re-baked. MSL classification reflow temperature for the ACPM-5252 is targeted at 260°C +0/-5°C. Figure and table on next page show typical SMT profile for maximum temperature of 260 +0/-5°C. Moisture Classification Level and Floor Life MSL Level Floor Life (out of bag) at factory ambient =< 30°C/60% RH or as stated 1 Unlimited at =< 30°C/85% RH 2 1 year 2a 4 weeks 3 168 hours 4 72 hours 5 48 hours 5a 24 hours 6 Mandatory bake before use. After bake, must be reflowed within the time limit specified on the label Note : 1. The MSL Level is marked on the MSL Label on each shipping bag. 16 Reflow Profile Recommendations tp Tp Critical Zone TL to Tp Ramp-up Temperature TL tL Tsmax Tsmin Ramp-down ts Preheat 25 t 25°C to Peak Time Typical SMT Reflow Profile for Maximum Temperature = 260 +0/-5°C Typical SMT Reflow Profile for Maximum Temperature = 260 +0/-5°C Profile Feature Sn-Pb Solder Pb-Free Solder Average ramp-up rate (TL to TP) 3°C/sec max 3°C/sec max 100°C 150°C 60-120 sec 150°C 200°C 60-120 sec Preheat – Temperature Min (Tsmin) – Temperature Max (Tsmax) – Time (min to max) (ts) Tsmax to TL – Ramp-up Rate 3°C/sec max Time maintained above: – Temperature (TL) – Time (TL) 183°C 60-150 sec 217°C 60-150 sec Peak temperature (Tp) 240 +0/-5°C 260 +0/-5°C 10-30 sec 20-40 sec Ramp-down Rate 6°C/sec max 6°C/sec max Time 25°C to Peak Temperature 6 min max. 8 min max. Time within 5°C of actual Peak Temperature (tp) 17 Storage Condition Baking of Populated Boards Packages described in this document must be stored in sealed moisture barrier, antistatic bags. Shelf life in a sealed moisture barrier bag is 12 months at <40°C and 90% relative humidity (RH) J-STD-033 p.6. Some SMD packages and board materials are not able to withstand long duration bakes at 125°C. Examples of this are some FR-4 materials, which cannot withstand a 24 hr bake at 125°C. Batteries and electrolytic capacitors are also temperature sensitive. With component and board temperature restrictions in mind, choose a bake temperature from Table 4-1 in J-STD 033; then determine the appropriate bake duration based on the component to be removed. For additional considerations see IPC-7711 andIPC-7721. Out-of-Bag Time Duration After unpacking the device must be soldered to the PCB within 168 hours with factory conditions <30°C and 60% RH as listed in the Table 5-1 on the J-STD-020D p.6. Baking It is not necessary to re-bake the part if both conditions (storage conditions and out-of bag conditions) have been satisfied. Baking must be done if at least one of the conditions above has not been satisfied. The baking conditions are listed in the Table 4-1 on the J-STD-033 p.8. CAUTION Tape and reel materials typically cannot be baked at the temperature described above. If out-of-bag exposure time is exceeded, parts must be baked for a longer time at low temperatures, or the parts must be de-reeled, de-taped, re-baked and then put back on tape and reel. (See moisture sensitive warning label on each shipping bag for information of baking). Board Rework Component Removal, Rework and Remount If a component is to be removed from the board, it is recommended that localized heating be used and the maximum body temperatures of any surface mount component on the board not exceed 200°C. This method will minimize moisture related component damage. If any component temperature exceeds 200°C, the board must be baked dry per 4-2 prior to rework and/or component removal. Component temperatures shall be measured at the top center of the package body. Any SMD packages that have not exceeded their floor life can be exposed to a maximum body temperature as high as their specified maximum reflow temperature. Removal for Failure Analysis Not following the above requirements may cause moisture/ reflow damage that could hinder or completely prevent the determination of the original failure mechanism. 18 Derating due to Factory Environmental Conditions Factory floor life exposures for SMD packages removed from the dry bags will be a function of the ambient environmental conditions. A safe, yet conservative, handling approach is to expose the SMD packages only up to the maximum time limits for each moisture sensitivity level as shown in table of Moisture Classification Level and Floor Life. This approach, however, does not work if the factory humidity or temperature is greater than the testing conditions of 30°C/60% RH. A solution for addressing this problem is to derate the exposure times based on the knowledge of moisture diffusion in the component package materials ref. JESD22-A120). Recommended equivalent total floor life exposures can be estimated for a range of humidities and temperatures based on the nominal plastic thickness for each device. Table on following page lists equivalent derated floor lives for humidities ranging from 20-90% RH for three temperature, 20°C, 25°C, and 30°C. This table is applicable to SMDs molded with novolac, biphenyl or multifunctional epoxy mold compounds. The following assumptions were used in calculating this table: 1. Activation Energy for diffusion = 0.35eV (smallest known value). 2. For ≤60% RH, use Diffusivity = 0.121exp (-0.35eV/kT) mm2/s (this used smallest known Diffusivity @ 30°C). 3. For >60% RH, use Diffusivity = 1.320exp ( -0.35eV/kT) mm2/s (this used largest known Diffusivity @ 30°C). Recommended Equivalent Total Floor Life (days) @ 20°C, 25°C & 30°C, 35°C For ICs with Novolac, Biphenyl and Multifunctional Epoxies (Reflow at same temperature at which the component was classified) Maximum Percent Relative Humidity Maximum Percent Relative Humidity Package Type and Moisture Body Thickness Sensitivity Level 5% Body Thickness ≥3.1 mm Including PQFPs >84 pin, PLCCs (square) All MQFPs or All BGAs ≥1 mm Level 2a Level 3 Level 4 Level 5 Level 5a Body 2.1 mm ≤ Thickness <3.1 mm including PLCCs (rectangular) 18-32 pin SOICs (wide body) SOICs ≥20 pins, PQFPs ≤80 pins Level 2a Level 3 Level 4 Level 5 Level 5a Body Thickness <2.1 mm including SOICs <18 pin All TQFPs, TSOPs or All BGAs <1 mm body thickness Level 2a Level 3 Level 4 Level 5 Level 5a ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ 10% 20% 30% 40% 50% 60% 70% 80% 90% ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ 3 5 6 8 2 4 5 7 1 2 3 5 ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ 5 7 9 11 3 4 5 6 1 2 2 3 ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ 7 10 13 18 94 124 167 231 8 10 13 17 3 4 5 7 2 3 5 7 1 1 2 4 ∞ ∞ ∞ ∞ 12 19 25 32 4 5 7 9 2 3 4 5 1 1 2 2 ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ 7 13 18 26 2 3 5 6 44 60 78 103 7 9 11 14 3 4 5 7 2 3 4 6 1 1 2 3 ∞ ∞ ∞ ∞ 9 12 15 19 3 4 5 7 2 3 3 5 1 1 2 2 ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ 7 9 12 17 3 5 6 8 1 2 3 4 32 41 53 69 6 8 10 13 2 4 5 7 2 2 4 5 1 1 2 3 58 86 148 ∞ 7 9 12 15 3 4 5 6 2 2 3 4 1 1 2 2 ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ 4 5 7 9 2 3 4 6 1 1 2 3 26 33 42 57 6 7 9 12 2 3 5 7 1 2 3 5 1 1 2 3 30 39 51 69 6 8 10 13 2 3 4 6 2 2 3 4 1 1 2 2 ∞ ∞ ∞ ∞ 8 11 14 20 3 4 5 7 2 2 3 5 1 1 2 2 16 28 36 47 6 7 9 12 2 3 4 6 1 2 3 4 1 1 2 2 22 28 37 49 5 7 9 12 2 3 4 5 1 2 3 4 1 1 2 2 17 28 ∞ ∞ 5 7 10 13 2 3 4 6 1 2 3 4 1 1 2 2 7 10 14 19 4 5 7 10 2 3 3 5 1 2 2 3 1 1 1 2 3 4 6 8 2 3 5 7 1 2 3 4 1 1 2 3 1 1 1 2 1 1 2 2 1 1 2 2 1 1 2 2 1 1 2 2 1 1 1 2 5 7 10 13 3 4 6 8 1 2 3 4 1 1 2 3 1 1 1 2 2 3 4 5 2 2 3 5 1 2 2 3 1 1 1 3 0.5 0.5 1 2 0.5 1 1 2 0.5 1 1 2 0.5 1 1 2 0.5 1 1 2 0.5 1 1 2 4 6 8 10 3 4 5 7 1 2 3 4 1 1 2 3 1 1 1 2 1 2 3 4 1 2 3 4 1 1 2 3 1 1 1 2 0.5 0.5 1 1 0.5 1 1 1 0.5 1 1 1 0.5 1 1 1 0.5 1 1 1 0.5 0.5 1 1 For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2011 Avago Technologies. All rights reserved. AV02-2296EN - November 4, 2011 35°C 30°C 25°C 20°C 35°C 30°C 25°C 20°C 35°C 30°C 25°C 20°C 35°C 30°C 25°C 20°C 35°C 30°C 25°C 20°C 35°C 30°C 25°C 20°C 35°C 30°C 25°C 20°C 35°C 30°C 25°C 20°C 35°C 30°C 25°C 20°C 35°C 30°C 25°C 20°C 35°C 30°C 25°C 20°C 35°C 30°C 25°C 20°C 35°C 30°C 25°C 20°C 35°C 30°C 25°C 20°C 35°C 30°C 25°C 20°C