ROHM BD9540EFV

Hi-performance Regulator IC Series for PCs
2ch Switching Regulators
for Desktop PC
No.09030EBT07
BD9540EFV
●Description
BD9540EFV is a 2ch switching regulator synchronous controller that can generate low output voltages (0.75V to 5.5V). High
efficiency for the switching regulator can be achieved due to its external N-MOSFET power transistor. The IC also
3
TM
incorporates a new technology called H Reg , a Rohm proprietary control method which facilitates ultra-high transient
response against changes in load. For protection and ease of use, the IC also incorporates soft start, and short circuit
protection with timer latch functions. This switching regulator is designed for DRAM and power supplies for graphics chips.
●Features
3
TM
1) 2ch H Reg DC/DC converter synchronous controller
2) Thermal Shut Down (TSD), Under-Voltage Lock-Out (UVLO),
Adjustable Over Current Protection (OCP) : detected Low side FET Ron, Over Voltage Protection (OVP),
Short Circuit Protection (SCP) built-in
3) Soft start function to minimize rush current during startup
4) HTSSOP-B28 package
5) Built-in 5V power supply for FET driver
6) Integrated bootstrap diode
●Applications
LCD-TV, Game Consoles, Desktop PCs
●Maximum Absolute Ratings (Ta=25℃)
Parameter
Input Voltage
BOOT Voltage
BOOT-SW Voltage
HG-SW Voltage
LG Voltage
Output Voltage
Output Feedback Voltage
5VReg Voltage
Current Limit Setting Voltage
Logic Input Voltage 1
Logic Input Voltage 2
Power dissipation 1
Power dissipation 2
Power dissipation 3
Power dissipation 4
Operating Temperature Range
Storage Temperature Range
Junction Temperature
Symbol
VIN
BOOT1,BOOT2
BOOT1-SW1, BOOT2-SW2
HG1-SW1, HG2-SW2
LG1, LG2
VOUT1, VOUT2
FB1, FB2
5VReg
ILIM1, ILIM2
EN1, EN2
CTL1, CTL2
Pd1
Pd2
Pd3
Pd4
Topr
Tstg
Tjmax
Limit
24*1
30*1
7*1
7*1
5VReg
7*1
5VReg
7*1
5VReg
24*1
7*1
1.45*2
1.85*3
3.30*4
4.70*5
-20～+100
-55～+150
+150
Unit
V
V
V
V
V
V
V
V
V
V
V
W
W
W
W
℃
℃
℃
*1 Not to exceed Pd.
*2 Reduced by 11.6mW for each increase in Ta of 1℃ over 25℃
(when mounted on a board 70.0mm×70mm×1.6mm Glass-epoxy PCB, 1layer, no copper foil area.)
*3 Reduced by 14.8mW for increase in Ta of 1℃ over 25℃.
(when mounted on a board 70.0mm×70mm×1.6mm Glass-epoxy PCB, 2layers, copper foil area : 15mm×15mm.)
*4 Reduced by 26.4mW for increase in Ta of 1℃ over 25℃.
(when mounted on a board 70.0mm×70mm×1.6mm Glass-epoxy PCB, 2layers, copper foil area : 70mm×70mm.)
*5 Reduced by 37.6mW for increase in Ta of 1℃ over 25℃.
(when mounted on a board 70.0mm×70mm×1.6mm Glass-epoxy PCB, 4layers, copper foil area : 70mm×70mm.)
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1/17
2009.04 - Rev.B
Technical Note
BD9540EFV
●Operating Conditions (Ta=25℃)
Parameter
Input voltage
BOOT voltage
SW Voltage
BOOT-SW voltage
Logic Input Voltage 1
Logic Input Voltage 2
Output Voltage
MIN ON Time
Symbol
VIN
BOOT1, BOOT2
SW1, SW2
BOOT1-SW1, BOOT2-SW2
EN1, EN2
CTL1, CTL2
VOUT1, VOUT2
tonmin
Min.
7.5
4.5
-0.7
4.5
0
0
0.7
-
Max.
20
25
20
5.5
20
5.5
5.5
100
Unit
V
V
V
V
V
V
V
ns
*This product should not be used in a radioactive environment.
*The range of the VOUT is limited by the voltage between VIN and VOUT.
●Electrical characteristics
(Unless otherwise noted, Ta=25℃ VCC=5V, VIN=12V, VEN1=VEN2=3V, Vout1=1.5V, Vout2=1.05V)
Limit
Parameter
Symbol
Unit
Condition
Min.
Typ.
Max.
[General]
VIN Bias Current
IIN
1.6
2.5
mA
VIN Standby Current
IIN_stb
0
10
μA
VEN1=VEN2=0V
EN Low Voltage 1,2
VEN_low1,2
GND
0.3
V
EN High Voltage 1,2
VEN_high1,2
2.2
20
V
EN Bias Current 1,2
IEN1,2
1.5
5.0
μA
VEN1=VEN2=3V
[5V Linear Regulator]
5VReg Standby Voltage
5Vreg_stb
0.1
V
VEN1=VEN2=0V
VIN=7.5V to 20V
5VReg Output Voltage
5VReg
4.8
5.0
5.2
V
Ireg=0mA to 10mA
Maximum Current
IReg
50
mA
[Under-Voltage Lock-Out]
5VReg Threshold Voltage
5Vreg_UVLO
3.75
4.20
4.65
V
5VReg:Sweep up
5VReg Hysteresis Voltage
d5Vreg_UVLO
100
160
220
mV
5VReg:Sweep down
[OVP Block]
FB Threshold Voltage 1
FB_OVP1
0.92
1.02
1.12
V
FB Threshold Voltage 2
FB_OVP2
0.80
0.90
1.00
V
OVP delay time
tOVP
1.7
μs
[H3RegTM Control Block]
ON Time1
ton1
290
390
490
ns
MIN OFF Time 1
toffmin1
200
380
ns
ON Time 2
ton2
110
210
310
ns
MIN OFF Time 2
toffmin2
200
380
ns
[FET Block]
HG High side ON Resistance 1,2 RHGhon1,2
5.5
11
Ω
HG Low side ON Resistance 1,2 RHGlon1,2
2.5
5
Ω
LG High side ON Resistance 1,2 RLGhon1,2
4
8
Ω
LG Low side ON Resistance 1,2
RLGlon1,2
2
4
Ω
[Over Current Protection Block]
Current Limit
Vilim1,2
80
100
120
mV RILIM=100kΩ
Threshold Voltage 1,2
[Output Voltage Detection Block]
FB1 threshold(REF1) Voltage1
FB1-1
0.769
0.781
0.793
V
CTL1=0V, CTL2=0V
FB1 threshold(REF1) Voltage2
FB1-2
0.802
0.814
0.826
V
CTL1=5V, CTL2=0V
FB1 threshold(REF1) Voltage3
FB1-3
0.839
0.851
0.863
V
CTL1=0V, CTL2=5V
FB1 threshold(REF1) Voltage4
FB1-4
0.738
0.750
0.762
V
CTL1=5V, CTL2=5V
FB2 threshold(REF2) Voltage
FB2
0.738
0.750
0.762
V
CTL Low Voltage 1,2
VCTL_low1,2
GND
0.5
V
CTL High Voltage 1,2
VCTL_high1,2 VCC-0.5
VCC
V
FB1/2 Input Current
IFB1,2
-1
1
μA
VOUT Discharge Current
IVOUT1,2
5
10
mA VOUT=1V, EN=0V
[SCP Block]
REF1,2× REF1,2× REF1,2×
Threshold Voltage 1,2
Vthscp1,2
V
0.60
0.70
0.80
SCP delay time
tSVP
28
μs
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2/17
2009.04 - Rev.B
Technical Note
BD9540EFV
●Block Diagram
VIN
23
22
5VReg
5VReg
Thermal TSD
Protection
VOUT1
VOUT1
VIN
4
VIN
BOOT1
EN1/UVLO
TSD/OVP
1
5VReg
28
27
3
EN1
FB1
5VReg
H Reg
Controller
Block
SS1
Soft
Start
REF1
SS1
5
TM
-
EN1
3
12
26
25
1.02
FB1
+
-
24
CTL1
8
CTL2
9
EN1
Delay
UVLO
0.90
FB2
ILIM1
REF2×0.7
FB2
EN2
OVP2
REF1
PGND1
FB1
+
-
OVP
DAC
LG1
REF1×0.7
+
-
SCP
REF2
BG
Reference
Block
5VReg
SW1
OVP1
EN2
VOUT2
S
VOUT1
SW1
OVP
UVLO
ILIM1
SCP
TSD
VCC
VOUT2
Driver
OCP Circuit
Q
+
+
21
Logic Input
R
HG1
5VReg
+
VIN
-
BOOT2
14
11
VIN
EN2/UVLO
TSD/OVP
3
EN2
Soft
Start
REF2
SS2
FB2
TM
H Reg
Controller
Block
SS2
10
15
Driver
Q
S
SW2
+
OCP
GND
Circuit
SW2
VOUT2
5VReg
17
-+
LG2
OVP
UVLO
ILIM2
SCP
TSD
7
R
16
HG2
18
20
ILIM2
TEST
PGND2
19
●Pin Configuration
BOOT1 1
28 HG1
NC
2
27 SW1
EN1
3
26 LG1
VOUT1 4
FB1
5
NC
6
25 PGND1
24 ILIM1
BD9540EFV
23 VIN
GND
7
CTL1
8
21 VCC
CTL2
9
20 TEST
FB2 10
19 ILIM2
VOUT2 11
22 5VReg
18 PGND2
EN2 12
17 LG2
NC 13
16 SW2
BOOT2 14
15 HG2
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3/17
2009.04 - Rev.B
Technical Note
BD9540EFV
●Pin Function
PIN No.
PIN name
1
BOOT1
2
NC
3
EN1
4
VOUT1
5
FB1
PIN Function
HG Driver Power Supply Pin 1
Non connection Pin
Enable Input Pin 1 (0～0.3V:OFF, 2.2～20V:ON)
Output Voltage Sence Pin 1
Output Voltage Feedback Pin 1
6
NC
7
GND
Sense GND
Non connection Pin
8
CTL1
1ch Reference Voltage Setting Control Pin 1:See P12/17
9
CTL2
1ch Reference Voltage Setting Control Pin 2:See P12/17
10
FB2
11
VOUT2
12
EN2
Enable Input Pin 2 (0～0.3V:OFF, 2.2～20V:ON)
13
NC
Non connection Pin
14
BOOT2
15
HG2
16
SW2
High side FET Source Pin 2
17
LG2
Low side FET Gate Driver Pin 2
18
PGND2
Power GND for 2ch
19
ILIM2
2ch OCP Setting Pin
20
TEST
Connect to GND Pin
21
VCC
Power Supply Input Pin
22
5VReg
Output Voltage Feedback Pin 2
Output Voltage Sense Pin 2
HG Driver Power Supply Pin 2
High side FET Gate Driver Pin 2
Reference Voltage Inside IC (5V Voltage Output)
23
VIN
24
ILIM1
1ch OCP Setting Pin
Battery Voltage Sense Pin
25
PGND1
Power GND for 1ch
26
LG1
Low side FET Gate Driver Pin 1
27
SW1
High side FET Source Pin 1
28
HG1
High side FET Gate Driver Pin 1
reverse
FIN
Exposed Pad, Connect to GND
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4/17
2009.04 - Rev.B
Technical Note
BD9540EFV
●Reference Data
VOUT2
50[mV/div]
VOUT2
50[mV/div]
VOUT1
50[mV/div]
SW1
10[V/div]
SW1
10[V/div]
SW1
10[V/div]
SW2
10[V/div]
SW2
10[V/div]
SW2
10[V/div]
IOUT2
2[A/div]
IOUT2
2[A/div]
IOUT2
2[A/div]
(2μs/div)
(2μs/div)
(2μs/div)
Fig.3 Transient Respnse
(VIN=12V VOUT1=3.3V)
Fig.2 Transient Respnse
(VIN=12V VOUT2=1.05V)
Fig.1 Transient Respnse
(VIN=12V VOUT2=1.05V)
VOUT1
50[mV/div]
EN
50[V/div]
SW1
10[V/div]
VOUT
0.5[V/div]
SW2
10[V/div]
SW
10[V/div]
SW
10[V/div]
IOUT2
2[A/div]
IL
2[A/div]
IL
2[A/div]
EN
50[V/div]
1msec(typ)
1msec(typ)
VOUT
0.5[V/div]
(2μs/div)
Fig.5 VOUT wake up
(Io=0A)
Fig.4 Transient Respnse
(VIN=12V VOUT1=3.3V)
Fig.6 VOUT wake up
(Io=4A)
130
VILIM [mV]
120
28μsec(typ)
VOUT
1[V/div]
100
Vo=1.8V
RILIM=100kΩ
80
Efficiency [%]
HG, LG
20[V/div]
110
100
60
40
90
IL
5[A/div]
Vo=1.2V
VIN=12V
VMOSFET:MP6K61
20
80
0
-20
0
20
40
60
80
100
0.01
0.1
Ta [℃]
10
2.5
2
8
2
6
1.5
1
VIN=12V
VCC=VREG5V
EN1=EN2=3V
0.5
IIN [mA]
2.5
1.5
4
VIN=12V
VCC=VREG5V
EN1=EN2=0V
2
0
0
20
40
60
80
Ta [℃]
Fig.10 Ta-IIN
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© 2009 ROHM Co., Ltd. All rights reserved.
100
1
VCC=VREG5V
EN1=EN2=3V
0.5
0
-20
10
Fig.9 IOUT-Efficiency
Fig.8 Ta-VILIM
IIN_STB [μA]
IIN [mA]
Fig.7 OCP and SCP
1
IOUT [A]
0
-20
0
20
40
60
Ta [℃]
Fig.11 Ta-IIN_STB
5/17
80
100
0
5
10
15
20
VIN [V]
Fig.12 VIN-IIN
2009.04 - Rev.B
Technical Note
BD9540EFV
●Reference Data
10
VCC=VREG5V
EN1=EN2=0V
8
5
5.1
4
5VREG [V]
4
6
5VREG [V]
IIN_STB [μA]
6
5.2
5
2
4.9
2
1
4.8
0
0
4
8
12
16
0
-20
20
0
20
40
60
80
100
0
Fig.13 VIN-IIN_STB
Fig.14 Ta-5VREG
5
5
4
4
3
3
2
2
1
1
0
4
8
12
16
VEN　[V]
Fig.16 VEN‐IEN www.rohm.com
© 2009 ROHM Co., Ltd. All rights reserved.
20
20
VOUT2 [V}
VOUT1 [V]
15
0
16
6
20
5
12
Fig.15 VIN-5VREG
6
10
8
VIN [V]
25
0
4
Ta [℃]
VIN [V]
IEN [μA]
3
7.5
10
12.5
15
17.5
VIN [V]
Fig.17 VIN-VOUT1
6/17
20
0
7.5
10
12.5
15
17.5
20
VIN [V]
Fig.18 VIN-VOUT2
2009.04 - Rev.B
Technical Note
BD9540EFV
●Pin Descriptions
・EN1 (3 pin) / EN2 (12 pin)
When the input voltage on the EN pin reaches at least 2.2V, the switching regulator becomes active.
At voltages less than 0.3 V, the switching regulator becomes inactive, and the input current drops to 10μA or less.
Thus the IC can be controlled from 2.5V, 3.3V or 5V power supplies.
・5VReg (22 pin)
5.0V reference voltage output pin. If at least 2.2V is supplied to either the EN1 or EN2 pin, the reference output is switched on.
This pin supplies 5.0V at up to 10mA. Inserting a 4.7μF capacitor (with a X5R or X7R rating) between the 5VReg and GND
pins is recommended.
・ILIM1 (24 pin) / ILIM2 (19 pin)
The IC monitors the voltage between the SW pin and PGND pin as a control for the output current protection (OCP) mechanism.
The voltage at which OCP engages is determined by the resistance value connected to the ILIM pin.
This also allows for compatibility with FETs of various RON values.
・VIN (23 pin)
The IC determines the duty cycles internally based upon the input voltage on this pin. Therefore, variations in voltage on
this pin can lead to highly unstable operation. This pin also acts as the voltage input to the internal switching regulator
block, and is sensitive to the impedance of the power supply. Attaching a bypass capacitor or RC filter on this pin as
appropriate for the application is recommended.
・BOOT1 (1 pin) / BOOT2 (14 pin)
This pin supplies voltage used for driving the high-side FET. Maximum absolute ratings are 25V from GND and 5.5V from
SW. BOOT voltage swings between VIN + 5VReg and 5VReg during active operation.
・HG1 (28 pin) / HG2 (15 pin)
This pin supplies voltage used for driving the gate of the high-side FET. This voltage swings between BOOT and SW.
High-speed gate driving for the high side FET can be achieved due to its low on-resistance (5.5Ω when HG = high, 2.5Ω
when HG = low) of the driver.
・SW1 (27 pin) / SW2 (16 pin)
This pin acts as the source connection to the high-side FET. Maximum absolute rating is 20V from GND.
SW voltage swings between VIN and GND.
・LG1 (26 pin) / LG2 (17 pin)
This pin supplies voltage used for driving the gate of the low-side FET. This voltage swings between VDD and PGND.
High-speed gate driving for the low-side FET can be achieved due to its low on-resistance (4Ω when LG = high, 2Ω when
LG = low) of the driver.
・PGND1 (25 pin) / PGND2 (18 pin)
This pin acts as the ground connection to the source of the low-side FET.
・GND (7 pin)
This is the ground pin for all internal analog and digital power supplies.
・VOUT1 (4 pin) / VOUT2 (11 pin)
This is the output voltage sense pin; this pin features an integrated discharge FET used to discharge the output capacitor
when status is set to OFF.
・FB1 (5 pin) / FB2 (10 pin)
This is the output feedback pin. While the internal reference voltage of channel 2 is fixed at 0.750V, the internal reference
voltage of channel 1 is adjustable depending on the input conditions of the CTL1 and CTL2 pins.
・Vcc (21 pin)
This is the power supply pin for all internal circuitry. This pin can be supplied directly by a 5V source, or via an RC filter
(10 Ω, 0.01μF) from the 5VReg pin.
・CTL1 (8 pin) / CTL2 (9 pin)
These pins allow for the adjustment of the internal voltage reference (REF1) for channel 1. The pins recognize logic High
at VCC-0.5 V or above, and logic Low at 0.5 V or below. Refer to the voltage adjustment table for REF1 on page 12.
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7/17
2009.04 - Rev.B
Technical Note
BD9540EFV
●Explanation of Operation
The BD9540EFV is a 2ch switching regulator controller incorporating ROHM’s proprietary H3RegTM CONTROLLA control
system. When VOUT drops due to a rapid load change, the system quickly restores VOUT by extending the TON time
interval.
H3RegTM control
(Normal operation)
FB
When FB falls below the threshold voltage (REF), a drop
3
TM
is detected, activating the H Reg CONTROLLA system.
REF
tON=
HG
LG
VOUT
1
×
VIN
f
[sec]・・・(1)
HG output is determined by the formula above. (See P13)
LG output operates until FB voltage falls below REF
voltage after HG becomes OFF.
(VOUT drops due to a rapid load change)
When FB (VOUT) drops due to a rapid load change, and the
voltage remains below REF after the programmed tON time
interval has elapsed, the system quickly restores VOUT by
extending the tON time, improving transient response.
FB
REF
Io
HG
LG
●Timing Chart
・Soft Start Function
Soft start is utilized when the EN pin is set high. Current
control takes effect at startup, enabling a moderate
“ramping start” on the output voltage. Soft start time is
1msec. And input current is determined via formula
(2) below.
EN
1msec
VOUT
Rush current:
IIN
IIN =
Co×VOUT
1ms
[A] ・・・(2)
(Co: All capacitors connected with VOUT)
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8/17
2009.04 - Rev.B
Technical Note
BD9540EFV
●Timing Chart
・Over current protection circuit
tON
tON
tON
During normal operation, when FB falls below REF, HG
switches high during for the period of time tON (P8).
However, if the current of the low-side FET exceeds the
ILIMIT threshold, HG will switch off until it becomes below
ILIMIT.
tON
HG
LG
IL
ILIMIT
・Timer Latch Type Short Circuit Protection
REF×0.7
Short protection engages when output falls to or below
REF × 0.7. When the programmed time period (28μs)
elapses, output is latched off to prevent damage to the
IC. Output voltage can be restored either by reconnecting
the EN pin or disabling UVLO.
FB
28μs
HG
LG
EN/UVLO
・Output Over Voltage Protection
OVP threshod voltage
VOUT
When output voltage rises to or above the OVP threshold
voltage (1ch:1.02V, 2ch:0.9V), output over-voltage
protection engages after the set time (1.7μs) has
elapsed. During this protection period, the low-side
FET opens completely for maximum reduction of output
voltage (LG = high, HG = low). Output voltage can be
restored either by reconnecting the EN pin or disabling
UVLO.
1.7μs
HG
LG
Switching
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9/17
2009.04 - Rev.B
Technical Note
BD9540EFV
●External Component Selection
1. Inductor (L) selection
The inductance value has a major influence on output ripple current.
As formula (3) below indicates, the greater the inductance or
switching frequency, the lower the ripple current.
ΔIL
ΔIL=
VIN
HG
(VIN-VOUT)×VOUT
L×VIN×f
[A]・・・(3)
The proper output ripple current setting is about 30% of maximum
output current.
IL
ΔIL=0.3×IOUTmax. [A]・・・(4)
VOUT
SW
L
L=
Co
LG
(VIN -VOUT)×VOUT
ΔIL×VIN×f
[H]・・・(5)
(ΔIL: output ripple current; f: switch frequency)
Output Ripple Current
※Passing a current larger than the inductor’s rated current will cause magnetic saturation in the inductor and decrease
system efficiency. When selecting an inductor, be sure to allow enough margin to assure that peak current does not
exceed the inductor’s rated current value.
※To minimize possible inductor damage and maximize efficiency, choose a inductor with a low (DCR, ACR) resistance.
2. Output Capacitor (CO) Selection
VIN
HG
VOUT
SW
L
ESR
LG
ESL
When determining a proper output capacitor, be sure to factor in the equivalent
series resistance and equivalent series inductance required to set the output ripple
voltage to 20mV or more. Also, make sure the capacitor’s voltage rating is high
enough for the set output voltage (including ripple).
Output ripple voltage is determined as in formula (6) below.
ΔVOUT=ΔIL×ESR+ESL×ΔIL/TON・・・(6)
Co
(ΔIL: Output ripple current; ESR: CO equivalent series resistance,
ESL: equivalent series inductance)
Output Capacitor
Also, give due consideration to the conditions in formula (7) below for output capacitance, bearing in mind that output rise
time must be established within the soft start time frame:
Co≦
1ms×(Limit-IOUT)
VOUT
・・・(7)
Tss: Soft start time
Limit: Over current detection
IOUT : Output current
Note: an improper output capacitor may cause startup malfunctions.
3. Input Capacitor (Cin) Selection
In order to prevent transient spikes in voltage, the input capacitor selected must
have a low enough ESR resistance to fully support a large ripple current on the
output. The formula for ripple current IRMS is given in equation (8) below:
VIN
Cin
HG
VOUT
SW
L
IRMS=IOUT×
√VOUT (VIN-VOUT)
VIN
Co
LG
Where VIN=2×VOUT, IRMS=
[A]・・・(8)
IOUT
2
Input Capacitor
A low-ESR capacitor is recommended to reduce ESR loss and maximize efficiency.
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10/17
2009.04 - Rev.B
Technical Note
BD9540EFV
4. MOSFET Selection
Main MOSFET power dissipation is computed as follows:
VIN
Pmain = PRON + PGATE + PTRAN
main switch
=
VOUT
2
VIN ×Crss×IOUT×f
VOUT ×RON×IOUT2+Qg(High)×f×5VReg+
・・・(9)
IDRIVE
VIN
L
(Ron: On-resistance of FET; Qg: FET gate capacitance;
f: Switching frequency; Crss: FET inverse transfer function;
IDRIVE: Gate peak current)
Co
synchronous switch
Synchronous MOSFET power dissipation is computed as follows:
Psyn = PRON + PGATE
=
VIN-VOUT
VIN
×RON×IOUT2+5VReg×f×VDD
・・・(10)
Qg loss is also incurred as internal power dissipation in the IC:
= PIC(DRIVE) = Qg(High)×f + Qg(Low)×f
×(VIN-5VReg) ・・・(11)
For example:
If Qg(High) = 20nq, Qg(Low) = 50nq, f = 300kHz,
PIC(DRIVE) =
20n×300k +50n×300k
×(12-5)
= 0.147W
5. Determining Detection Resistance
VIN
L
VOUT
SW
Co
RILIM
PGND
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The over-current protection function is controlled via the voltage detected
between the SW and PGND pins – i.e., the ON-resistance of the
synchronous FET. The current limit value is determined by formula (12)
below:
ILIM=
10k
RILIM ×RON
[A]・・・(12)
(RILIM: Resistance for setting over-current protection limit,
RON: Low side FET On-resistance)
11/17
2009.04 - Rev.B
Technical Note
BD9540EFV
6. Output Voltage Setting
The IC will try to maintain output voltage such that REF≒VFB.
However, the actual output voltage will also reflect the average ripple voltage value.
The output voltage is set via a resistive voltage divider between the output and the FB pin. The formula for output voltage
is given in (13) below:
Output voltage=
R1+R2
R2
× REF +
1
2
×ΔIL×ESR・・・(13)
VIN
REF
H3RegTM
CONTROLLA
R
Q
Output voltage
Driver
S
ESR
Circuit
FB
R1
C1
Radd (for Low Ripple)
R2
Cadd (for Low Ripple)
It is recommended that R1 and C1 be connected in parallel to the FB pin.
In low output ripple applications (ΔV < 20 mV), add Radd and Cadd as shown in the above application circuit.
For value settings, refer to the tool provided separately.
REF voltage (for 2ch) is fixed at 0.750 V; however, REF voltage (for 1ch) can be adjusted via the CTL input conditions.
REF1 voltage setting table
CTL1
CTL2
REF1
L
L
0.781V
H
L
0.814V
L
H
0.851V
H
H
0.750V
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© 2009 ROHM Co., Ltd. All rights reserved.
12/17
2009.04 - Rev.B
Technical Note
BD9540EFV
7. Relationship between output voltage and Ton duration
Both 1ch and 2ch of BD9540EFV are synchronous rectification type of switching controllers operated at fixed-frequency.
The Ton duration for each channel depends on the output voltage settings, as described by the following formulas.
Ton1 =
VOUT1
×2μ+130n [ns]・・・(14)
VIN
Ton2 =
VOUT2
×0.9μ+130n [ns]・・・(15)
VIN
(1ch)
(2ch)
Thus from the above Ton duration, the frequency of the applied condition is
Frequency =
VOUT
×
VIN
1
Ton
[kHz]・・・(16)
However with actual applications, there exists a rising and falling time of the SW due to the gate capacitance of the
external MOSFET and the switching speed, which may vary the above parameters. Thus please also verify those
parameters experimentally.
8. Relationship between output current and frequency
BD9540EFV is a fixed-Ton type of switching controller. When the output current increases, the switching loss of the coil
and MOSFET also increases and hence the switching frequency speeds up.
The loss of the coil and MOSFET is determined as
① Loss of coil = IOUT2 × DCR
② Loss of high-side MOSFET = IOUT2 × Ronh ×
③ Loss of low-side MOSFET =
VOUT
VIN
IOUT2 × Ronn × (1-
VOUT
VIN
)
(Ronh : on-resistance of high-side MOSFET, Ronn : on resistance of low-side MOSFET)
Taking the above losses into the frequency equation, then T (=1/Freq) becomes
T (=1/Freq) =
VIN × IOUT × Ton
VOUT × IOUT + ① + ② + ③
・・・(17)
However since the parasitic resistance of the layout pattern exists in actual applications and affects the parameter, please
also verify experimentally.
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© 2009 ROHM Co., Ltd. All rights reserved.
13/17
2009.04 - Rev.B
Technical Note
BD9540EFV
●I/O Equivalent Circuits
1pin, 14pin (BOOT1, BOOT2)
3pin, 12pin (EN1, EN2)
22pin (5VReg)
VIN
1MΩ
2MΩ
HG
SW
5VReg
BOOT
8pin 9pin (CTL1, CTL2)
28pin, 15pin (HG1, HG2)
BOOT
27pin, 16pin (SW1, SW2)
BOOT
BOOT
HG
300KΩ
SW
26pin, 17pin (LG1, LG2)
20pin (TEST)
24pin, 19pin (ILIM1, ILIM2)
5pin, 10pin (FB1, FB2)
5VReg
300KΩ
300KΩ
100KΩ
21pin (VCC)
4pin, 11pin (VOUT1, VOUT2)
23pin (VIN)
400KΩ
5VReg
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© 2009 ROHM Co., Ltd. All rights reserved.
14/17
2009.04 - Rev.B
Technical Note
BD9540EFV
●Operation Notes
(1) Absolute Maximum Ratings
Use of the IC in excess of absolute maximum ratings (such as the input voltage or operating temperature range) may
result in damage to the IC. Assumptions should not be made regarding the state of the IC (e.g., short mode or open
mode) when such damage is suffered. If operational values are expected to exceed the maximum ratings for the device,
consider adding protective circuitry (such as fuses) to eliminate the risk of damaging the IC.
(2) Power Supply Polarity
Connecting the power supply in reverse polarity can cause damage to the IC. Take precautions when connecting the
power supply lines. An external power diode can be added.
(3) Power Supply Lines
In order to minimize noise, PCB layout should be designed such that separate, low-impedance power lines are routed to
the digital and analog blocks. Additionally, a coupling capacitor should be inserted between all power input pins and the
ground terminal. If electrolytic capacitors are used, keep in mind that their capacitance characteristics are reduced at
low temperatures.
(4) GND voltage
The potential of the GND pin must be the minimum potential in the system in all operating conditions.
(5) Thermal design
Use a thermal design that allows for a sufficient margin for power dissipation (Pd) under actual operating conditions.
(6) Inter-pin Shorts and Mounting Errors
Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result
in damage to the IC. Shorts between output pins or between output pins and the power supply and GND pins caused by
poor soldering or foreign objects may result in damage to the IC.
(7) Operation in Strong Electromagnetic Fields
Using this product in strong electromagnetic fields may cause IC malfunction. Caution should be exercised in
applications where strong electromagnetic fields may be present.
(8) ASO - Area of Safe Operation
When using the IC, ensure that operating conditions do not exceed absolute maximum ratings or ASO of the output
transistors.
(9) Thermal shutdown (TSD) circuit
The IC incorporates a built-in thermal shutdown circuit, which is designed to turn the IC off completely in the event of
thermal overload. It is not designed to protect the IC from damage or guarantee its operation. ICs should not be used
after this function has activated, or in applications where the operation of this circuit is assumed.
TSD ON Temp. [°C]
BD9540EFV
175
(typ.)
Hysteresis Temp. [°C]
(typ.)
15
(10)Testing on application boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance pin may subject the IC
to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be
turned off completely before connecting or removing it from a jig or fixture during the evaluation process. To prevent
damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage.
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15/17
2009.04 - Rev.B
Technical Note
BD9540EFV
(11) Regarding input pins of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. PN junctions are formed at the intersection of these P layers with the N layers of other elements, creating
parasitic diodes and/or transistors. For example (refer to the figure below):
 When GND > Pin A and GND > Pin B, the PN junction operates as a parasitic diode
 When GND > Pin B, the PN junction operates as a parasitic transistor
Parasitic diodes occur inevitably in the structure of the IC, and the operation of these parasitic diodes can result in
mutual interference among circuits, operational faults, or physical damage. Accordingly, conditions that cause these
diodes to operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate)
should be avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
Pin B
B
E
Pin A
N
N
P+
P+
P
Parasitic
element
N
N
P+
B
N
P substrate
N
C
E
Parasitic
element
P substrate
GND
Parasitic element
P+
P
Parasitic element
GND
GND
GND
Other adjacent elements
Example of IC structure
(12)Ground Wiring Pattern
When using both small-signal and large-current GND traces, the two ground traces should be routed separately but
connected to a single ground potential within the application in order to avoid variations in the small-signal ground
caused by large currents. Also ensure that the GND traces of external components do not cause variations on GND
voltage.
●Power Dissipation
5.0
①Mounted on board 70mm×70mm×1.6mm glass-epoxy PCB, 1 layer
No copper foil area. θj-a=86.2℃/W
②Mounted on board 70mm×70mm×1.6mm glass-epoxy PCB, 2 layers,
Copper foil area : 15mm×15mm, θj-a=67.6℃/W
③Mounted on board 70mm×70mm×1.6mm glass-epoxy PCB, 2 layers,
Copper foil area :: 70mm×70mm, θj-a=37.9℃/W
④Mounted on board 70mm×70mm×1.6mm glass-epoxy PCB, 4 layers,
Copper foil area :: 70mm×70mm, θj-a=26.6℃/W
Power dissipation :Pd [W]
④4.70W
4.0
③3.30W
3.0
2.0
②1.85W
①1.45W
1.0
0
0
25
50
75
100
125
150
Ambient temperature :Ta [℃]
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16/17
2009.04 - Rev.B
Technical Note
BD9540EFV
●Ordering part number
B
D
9
Part No.
5
4
0
E
Part No.
F
V
-
Package
EFV : HTSSOP-B28
E
2
Packaging and forming specification
E2: Embossed tape and reel
HTSSOP-B28
<Tape and Reel information>
9.7±0.1
(MAX 10.05 include BURR)
(5.5)
1
Tape
Embossed carrier tape (with dry pack)
Quantity
2500pcs
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
)
14
+0.05
0.17 -0.03
1PIN MARK
1.0MAX
0.625
1.0±0.2
(2.9)
0.5±0.15
15
4.4±0.1
6.4±0.2
28
+6°
4° −4°
0.08±0.05
0.85±0.05
S
0.08 S
0.65
+0.05
0.24 -0.04
0.08
1pin
M
(Unit : mm)
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© 2009 ROHM Co., Ltd. All rights reserved.
Reel
17/17
Direction of feed
∗ Order quantity needs to be multiple of the minimum quantity.
2009.04 - Rev.B
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the
consent of ROHM Co.,Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specified in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
against the possibility of physical injury, fire or any other damage caused in the event of the
failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM
shall bear no responsibility whatsoever for your use of any Product outside of the prescribed
scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or
system which requires an extremely high level of reliability the failure or malfunction of which
may result in a direct threat to human life or create a risk of human injury (such as a medical
instrument, transportation equipment, aerospace machinery, nuclear-reactor controller,
fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of
any of the Products for the above special purposes. If a Product is intended to be used for any
such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may
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obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact us.
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http://www.rohm.com/contact/
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R0039A