LINER LTC1154CS8

LTC1154
High-Side Micropower
MOSFET Driver
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DESCRIPTIO
FEATURES
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Fully Enhances N-Channel Power MOSFETs
8µA IQ Standby Current
85µA IQ ON Current
No External Charge Pump Capacitors
4.5V to 18V Supply Range
Short-Circuit Protection
Thermal Shutdown via PTC Thermistor
Status Output Indicates Shutdown
Available in 8-Pin SOIC
The LTC1154 single high-side gate driver allows using low
cost N-channel FETs for high-side switching applications.
An internal charge pump boosts the gate drive voltage
above the positive rail, fully enhancing an N-channel MOS
switch with no external components. Micropower operation, with 8µA standby current and 85µA operating current, allows use in virtually all systems with maximum
efficiency.
Included on chip is programmable over-current sensing.
A time delay can be added to prevent false triggering on
high in-rush current loads. An active high shutdown input
is also provided and interfaces directly to a standard PTC
thermistor for thermal shutdown. An open-drain output is
provided to report switch status to the µP. An active low
enable input is provided to control multiple switches in
banks.
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APPLICATI
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Laptop Computer Power Switching
SCSI Termination Power Switching
Cellular Telephone Power Management
Battery Charging and Management
High-Side Industrial and Automotive Switching
Stepper Motor and DC Motor Control
The LTC1154 is available in both 8-pin DIP and 8-pin SOIC
packages.
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TYPICAL APPLICATI
Ultra-Low Voltage Drop High-Side Switch
with Short-Circuit Protection
Standby Supply Current
50
5V
51k
0.036Ω*
IN
VS
200k**
EN
DS
LTC1154
STATUS
GND
IRLR024
G
SD
5V
LOAD
SUPPLY CURRENT (µA)
40
0.1µF**
µP
VIN = 0V
TJ = 25°C
45
2.7A MAX
35
30
25
20
15
10
5
ALL COMPONENTS SHOWN ARE SURFACE MOUNT.
* IMS026 INTERNATIONAL MANUFACTURING SERVICE, INC. (401) 683-9700
** NOT REQUIRED IF LOAD IS RESISTIVE OR INDUCTIVE.
LTC1154 • TA01
0
0
5
10
15
SUPPLY VOLTAGE (V)
20
LTC1153 • TA02
1
LTC1154
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AXI U
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ABSOLUTE
RATI GS
Supply Voltage ........................................................ 22V
Input Voltage ..................... (VS + 0.3V) to (GND – 0.3V)
Enable Input Voltage .......... (VS + 0.3V) to (GND – 0.3V)
Gate Voltage ....................... (VS + 24V) to (GND – 0.3V)
Status Output Voltage .............................................. 15V
Current (Any Pin).................................................. 50mA
Operating Temperature
LTC1154C .............................................. 0°C to 70°C
Storage Temperature Range ................. – 65°c to 150°C
Lead Temperature (Soldering, 10 sec.)................ 300°C
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PACKAGE/ORDER I FOR ATIO
TOP VIEW
IN 1
8
VS
ENABLE 2
7
DRAIN SENSE
STATUS 3
6
GATE
GND 4
5
SHUTDOWN
ORDER PART
NUMBER
LTC1154CN8
ORDER PART
NUMBER
TOP VIEW
IN 1
8
VS
ENABLE 2
7
DRAIN SENSE
STATUS 3
6
GATE
GND 4
5
SHUTDOWN
S8 PACKAGE
8-LEAD PLASTIC SOIC
N8 PACKAGE
8-LEAD PLASTIC DIP
LTC1154 • PO01
LTC1154 • PO02
TJMAX = 100°C, θJA = 130°C/W (N8)
LTC1154CS8
S8 PART MARKING
1154
TJMAX = 100°C, θJA = 150°C/W
ELECTRICAL CHARACTERISTICS VS = 4.5V to 18V, TA = 25°C, VEN = 0V, VSD = 0V unless otherwise noted.
CONDITIONS
MIN
LTC1154C
TYP
SYMBOL
PARAMETER
VS
Supply Voltage
IQ
Quiescent Current OFF
VS = 5V, VIN = 0V
IQ
Quiescent Current ON
VS = 5V, VIN = 5V
IQ
Quiescent Current ON
VS = 12V, VIN = 5V
180
VINH
Input High Voltage
●
VINL
Input Low Voltage
●
0.8
V
IIN
Input Current
●
±1
µA
CIN
Input Capacitance
VENH
ENABLE Input High Voltage
●
VENL
ENABLE Input Low Voltage
●
IEN
ENABLE Input Current
VSDH
Shutdown Input High Voltage
●
VSDL
Shutdown Input Low Voltage
●
ISD
Shutdown Input Current
VSEN
Drain Sense Threshold Voltage
●
0V < VIN < VS
0V < VIN < VS
0V < VIN < VS
2
Drain Sense Input Current
0V < VSEN < VS
UNITS
18.0
V
8
20
µA
85
120
µA
400
µA
4.5
2
3.5
V
5
pF
2.6
V
1.0
●
●
0.6
V
±1
µA
2
V
0.8
●
●
ISEN
MAX
80
75
100
100
V
±1
µA
120
125
mV
mV
±0.1
µA
LTC1154
ELECTRICAL CHARACTERISTICS VS = 4.5V to 18V, TA = 25°C, VEN = 0V, VSD = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VGATE – VS Gate Voltage Above Supply
VS = 5V
VS = 6V
VS = 12V
●
●
●
MIN
LTC1154C
TYP
MAX
UNITS
6.0
7.5
15.0
7.0
8.3
18.0
9.0
15.0
25.0
V
V
V
0.05
0.4
V
1
µA
VSTAT
Status Output Low Voltage
ISTAT = 400µA
●
ISTAT
Status Output Leakage Current
VSTAT = 12V
●
tON
Turn-ON Time
VS = 5V, CGATE = 1000pF
Time for VGATE > VS + 2V
Time for VGATE > VS + 5V
30
100
110
450
300
1000
µs
µs
VS = 12V, CGATE = 1000pF
Time for VGATE > VS + 5V
Time for VGATE > VS + 10V
20
50
80
160
200
500
µs
µs
VS = 5V, CGATE = 1000pF
Time for VGATE < 1V
10
36
60
µs
VS = 12V, CGATE = 1000pF
Time for VGATE < 1V
10
28
60
µs
VS = 5V, CGATE = 1000pF
Time for VGATE < 1V
5
25
40
µs
VS = 12V, CGATE = 1000pF
Time for VGATE < 1V
5
23
40
µs
VS = 5V, CGATE = 1000pF
Time for VGATE < 1V
17
40
µs
VS = 12V, CGATE = 1000pF
Time for VGATE < 1V
13
35
µs
tOFF
Turn-OFF Time
tSC
Short-Circuit Turn-OFF Time
tSD
Shutdown Turn-OFF Time
The ● denotes specifications which apply over the operating temperature range.
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TYPICAL PERFOR A CE CHARACTERISTICS
Standby Supply Current
VIN = 0V
TA = 25°C
24
TA = 25°C
900
SUPPLY CURRENT (µA)
40
35
30
25
20
15
22
800
20
700
18
VGATE – VS (V)
45
SUPPLY CURRENT (µA)
High-Side Gate Voltage
Supply Current ON
1000
50
600
500
400
16
14
12
300
10
10
200
8
5
100
6
0
0
0
0
5
10
15
SUPPLY VOLTAGE (V)
20
LTC1154 • TPC01
0
5
10
15
SUPPLY VOLTAGE (V)
20
LTC1154 • TPC02
0
5
10
15
SUPPLY VOLTAGE (V)
20
LTC1154 • TPC03
3
LTC1154
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TYPICAL PERFOR A CE CHARACTERISTICS
Input Threshold Voltage
2.0
VON
1.6
VOFF
1.4
1.2
1.0
0.8
0.6
0.4
5
0
30
140
27
130
24
120
21
110
18
100
90
9
6
60
3
5
0
Turn-ON Time
Turn-OFF Time
CGATE = 1000pF
CGATE = 1000pF
TIME FOR VGATE < 1V
400
VGS = 5V
200
VGS = 2V
100
40
35
30
25
20
15
5
0
0
5
0
900
Input ON Threshold Voltage
25
20
0
–50 –25
VIN = 5V
VEN = 0V
2.2
800
30
VS = 18V
600
500
400
VS = 12V
200
100
VS = 5V
50
25
0
75
TEMPERATURE (°C)
700
300
100
125
LTC1154 • TPC10
20
10
15
SUPPLY VOLTAGE (V)
2.4
INPUT THRESHOLD VOLTAGE (V)
VIN = 0V
VEN = 0V
35
5
LTC1154 • TPC09
Supply Current ON
SUPPLY CURRENT (µA)
SUPPLY CURRENT (µA)
0
LTC1154 • TPC08
40
4
20
10
15
SUPPLY VOLTAGE (V)
1000
5
15
5
Standby Supply Current
50
10
20
10
LTC1153 • TPC07
15
25
5
20
10
15
SUPPLY VOLTAGE (V)
35
30
10
0
0
CGATE = 1000pF
TIME FOR VGATE < 1V
VSEN = VS – 1V
NO EXTERNAL DELAY
45
TURN-OFF TIME (µs)
TURN-OFF TIME (µs)
TURN-ON TIME (µs)
500
10
Short-Circuit Turn-OFF Delay Time
40
700
6
8
4
SUPPLY VOLTAGE (V)
50
45
600
2
0
LTC1154 • TPC06
50
800
45
0
20
10
15
SUPPLY VOLTAGE (V)
LTC1154 • TPC05
1000
300
12
70
LTC1154 • TPC04
900
15
80
50
20
10
15
SUPPLY VOLTAGE (V)
150
VGATE (V)
DRAIN SENSE THRESHOLD VOLTAGE (V)
INPUT THRESHOLD VOLTAGE (V)
2.2
1.8
Low-Side Gate Voltage
Drain Sense Threshold Voltage
2.4
VS = 5V
0
–50 –25
50
25
0
75
TEMPERATURE (°C)
2.0
1.8
1.6
1.4
1.2
1.O
VS = 5V
VS = 18V
0.8
0.6
100
125
LTC1154 • TPC11
0.4
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
LTC1154 • TPC12
LTC1154
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TYPICAL PERFOR A CE CHARACTERISTICS
ENABLE Threshold Voltage
2.4
5.0
2.2
4.5
2.0
1.8
1.6
1.4
VS = 5V
1.2
VS = 18V
1.O
0.8
0.6
0.4
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
Gate Drive Current
1000
VS = 12V
TA = 25°C
4.0
GATE DRIVE CURRENT (µA)
ENABLE THRESHOLD VOLTAGE (V)
SHUTDOWN THRESHOLD VOLTAGE (V)
Shutdown Threshold Voltage
3.5
DISABLE
3.0
2.5
2.0
1.5
1.0
0.5
0
–50 –25
100
VS = 18V
VS = 12V
10
VS = 5V
1
ENABLE
50
25
0
75
TEMPERATURE (°C)
LTC1154 • TPC13
100
125
LTC1154 • TPC14
0.1
0
4
8
12
16
GATE VOLTAGE ABOVE SUPPLY (V)
20
LTC1154 • TPC15
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PI FU CTIO S
Input and Shutdown Pins
The LTC1154 input pin is active high and activates all of the
protection and charge pump circuitry when switched ON.
The shutdown pin is designed to immediately disable the
switch if a secondary fault condition (over temperature,
etc.) is detected. The LTC1154 logic and shutdown inputs
are high impedance CMOS gates with ESD protection
diodes to ground and supply and therefore should not be
forced beyond the power supply rails. The shutdown pin
should be connected to ground when not in use.
ENABLE Input Pin
The ENABLE input can be used to enable a number of
LTC1154 high-side switches in banks or to provide a
secondary means of control. It can also act as an inverting
input. The ENABLE input is a high impedance CMOS gate
with ESD clamp diodes to ground and supply and therefore should not be forced beyond the power supply rails.
This pin should be grounded when not in use.
Gate Drive Pin
The gate drive pin is either driven to ground when the
switch is turned OFF or driven above the supply rail when
the switch is turned ON. This pin is a relatively high
impedance when driven above the rail (the equivalent of a
few hundred kΩ). Care should be taken to minimize any
loading of this pin by parasitic resistance to ground or
supply.
Supply Pin
The supply pin of the LTC1154 serves two vital purposes.
The first is obvious: it powers the input, gate drive, regulation and protection circuitry. The second purpose is less
obvious: it provides a Kelvin connection to the top of the
drain sense resistor for the internal 100mV reference.
The LTC1154 is designed to be continuously powered so
that the gate of the MOSFET is actively driven at all times.
If it is necessary to remove power from the supply pin and
then re-apply it, the input pin (or enable pin) should be
cycled a few milliseconds after the power is re-applied to
reset the input latch and protection circuitry. Also, the
input and enable pins should be isolated with 10k resistors
to limit the current flowing through the ESD protection
diodes to the supply pin.
The supply pin of the LTC1154 should never be forced
below ground as this may result in permanent damage to
the device. A 300Ω resistor should be inserted in series
with the ground pin if negative supply voltage transients
are anticipated.
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LTC1154
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PI FU CTIO S
Drain Sense Pin
The drain sense pin is compared against the supply pin
voltage. If the voltage at this pin is more than 100mV below
the supply pin, the input latch will be reset and the MOSFET
gate will be quickly discharged. Cycle the input, or ENABLE
input, to reset the short-circuit latch and turn the MOSFET
back on.
This pin is also a high impedance CMOS gate with ESD
protection and therefore should not be forced beyond the
power supply rails. To defeat the over current protection,
short the drain sense to supply.
Some loads, such as large supply capacitors, lamps, or
motors require high in-rush currents. An RC time delay
can be added between the sense resistor and the drain
sense pin to ensure that the drain sense circuitry does not
false-trigger during start-up. This time constant can be set
from a few microseconds to many seconds. However, very
long delays may put the MOSFET in risk of being destroyed
by a short-circuit condition. (see Applications Information
Section).
Status Pin
The status pin is an open-drain output which is driven low
whenever a fault condition is detected. A 51k pull-up
resistor should be connected between this output and a
logic supply. The status pins of multiple LTC1154s can be
OR’d together if independent fault sensing is not required.
No connection is required to this pin when not in use.
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BLOCK DIAGRA
DRAIN
SENSE
ANALOG SECTION
VS
LOW STANDBY
CURRENT
REGULATOR
SHUTDOWN
TTL-TO-CMOS
CONVERTER
10µs
DELAY
COMP
100mV
REFERENCE
SHUTDOWN
GATE CHARGE
AND DISCHARGE
CONTROL LOGIC
ANALOG
GATE
DIGITAL
R
INPUT
ENABLE
STATUS
TTL-TO-CMOS
CONVERTER
VOLTAGE
REGULATORS
INPUT
LATCH
ONE
SHOT
S
OSCILLATOR
AND CHARGE
PUMP
FAST/SLOW
GATE CHARGE
LOGIC
GND
FAULT DETECTION
AND STATUS
OUTPUT DRIVER
LTC1154 • BD01
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LTC1154
TRUTH TABLE
INPUTS
OUTPUTS
SWITCH
CONDITION
IN
EN
SD
X
H
X
L
H
SWITCH OFF
L
X
X
L
H
SWITCH OFF
H
L
L
H
H
SWITCH ON
H
L
L
L
L
SWITCH LATCHED OFF
(OVER CURRENT)
H
L
L
L
SWITCH LATCHED OFF
(SHUTDOWN)
L = LOGIC LOW
H = LOGIC HIGH
X = IRRELEVANT
GATE STATUS
= EDGE TRIGGERED
LTC1154 OPERATIO
The Truth Table demonstrates how the LTC1154 receives
inputs and returns status information to the µP. The
ENABLE and input signal from the µP controls the switch
in its normal operating mode, where the rise and fall time
of the gate drive are controlled to limit EMI and RFI
emissions. The shutdown and over-current detection circuitry however, switch the gate off at a much higher rate
to limit the exposure of the MOSFET switch and the load to
dangerous conditions. The status pin remains high as long
as the switch is operating normally, and is driven low only
when a fault condition is detected. Note that the shutdown
pin is edge-sensitive and latches the output off even if the
shutdown pin returns to a low state.
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The LTC1154 is a single micropower MOSFET driver with
built-in protection, status feedback and gate charge pump.
The LTC1154 consists of the following functional blocks:
pump logic is not coupled into the 100mV reference or the
analog comparator.
Gate Charge Pump
TTL and CMOS Compatible Inputs
The LTC1154 input and shutdown input have been designed to accommodate a wide range of logic families.
Both input thresholds are set at about 1.3V with approximately 100mV of hysteresis.
A low standby current voltage regulator provides continuous bias for the TTL-to-CMOS converter. The TTL-toCMOS converter output enables the rest of the circuitry. In
this way the power consumption is kept to a minimum in
the standby mode.
ENABLE Input
The ENABLE input is CMOS compatible and inhibits the
input signal whenever it is held logic high. This input
should be grounded when not in use.
Internal Voltage Regulation
The output of the TTL-to-CMOS converter drives two
regulated supplies which power the low voltage CMOS
logic and analog blocks. The regulator outputs are isolated
from each other so that the noise generated by the charge
Gate drive for the MOSFET switch is produced by an
adaptive charge pump circuit which generates a gate
voltage substantially higher than the power supply voltage. The charge pump capacitors are included on chip and
therefore no external components are required to generate
the gate drive.
Drain Current Sense
The LTC1154 is configured to sense the current flowing
into the drain of the power MOSFET in a high-side application. An internal 100mV reference is compared to the drop
across a sense resistor (typically 0.002Ω to 0.10Ω) in
series with the drain lead. If the drop across this resistor
exceeds the internal 100mV threshold, the input latch is
reset and the gate is quickly discharged via a large
N-channel transistor.
Controlled Gate Rise and Fall Times
When the input is switched ON and OFF, the gate is
charged by the internal charge pump and discharged in a
controlled manner. The charge and discharge rates have
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LTC1154
LTC1154 OPERATIO
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been set to minimize RFI and EMI emissions in normal
operation. If a short-circuit or current overload condition
is encountered, the gate is discharged very quickly (typically a few microseconds) by a large N-channel transistor.
gate of the MOSFET is driven low by the protection
circuitry. The status circuitry is reset along with the input
latch when the input, or ENABLE input, is cycled.
Status Output Driver
The status circuitry continuously monitors the fault detection logic. This open-drain output is driven low when the
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APPLICATI
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MOSFET and Load Protection
The LTC1154 protects the power MOSFET switch by
removing drive from the gate as soon as an over-current
condition is detected. Resistive and inductive loads can be
protected with no external time delay in series with the
drain sense pin. Lamp loads, however, require that the
over-current protection by delayed long enough to start
the lamp but short enough to ensure the safety of the
MOSFET.
stored energy to ground. Many inductive loads have these
diodes included. If not, a diode of the proper current rating
should be connected across the load, as shown in Figure
2, to safely divert the stored energy.
12V
+
100µF
IN
VS
EN
0.036Ω
DS
LTC1154
STATUS
Resistive Loads
G
IRFZ24
15V
Loads that are primarily resistive should be protected with
as short a delay as possible to minimize the amount of time
that the MOSFET is subjected to an overload condition.
The drain sense circuitry has a built-in delay of approximately 10µs to eliminate false triggering by power supply
or load transient conditions. This delay is sufficient to
“mask” short load current transients and the starting of a
small capacitor (<1µF) in parallel with the load. The drain
sense pin can therefore be connected directly to the drain
current sense resistor as shown in Figure 1.
GND
SD
CLOAD ≤ 1µF
RLOAD
12Ω
LTC1154 • F01
Figure 1. Protecting Resistive Loads
12V
+
100µF
Inductive Loads
Loads that are primarily inductive, such as relays, solenoids and stepper motor windings should be protected
with as short a delay as possible to minimize the amount
of time that the MOSFET is subjected to an overload
condition. The built-in 10µs delay will ensure that the overcurrent protection is not false-triggered by a supply or
load transient. No external delay components are required
as shown in Figure 2.
Large inductive loads (>0.1mH) may require diodes connected directly across the inductor to safely divert the
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IN
VS
EN
0.036Ω
DS
LTC1154
STATUS
G
IRFZ24
15V
GND
SD
1N5400
12V, 1A
SOLENOID
LTC1154 • F02
Figure 2. Protecting Inductive Loads
LTC1154
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APPLICATI
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Capacitive Loads
Lamp Loads
Large capacitive loads, such as complex electrical systems with large bypass capacitors, should be powered
using the circuit shown in Figure 3. The gate drive to the
power MOSFET is passed through an RC delay network,
R1 and C1, which greatly reduces the turn-on ramp rate of
the switch. And since the MOSFET source voltage follows
the gate voltage, the load is powered smoothly and slowly
from ground. This dramatically reduces the start-up current flowing into the supply capacitor(s) which, in turn,
reduces supply transients and allows for slower activation
of sensitive electrical loads. (Diode, D1, provides a direct
path for the LTC1154 protection circuitry to quickly discharge the gate in the event of an over-current condition).
The in-rush current created by a lamp during turn-on can
be 10 to 20 times greater than the rated operating current.
The circuit shown in Figure 4 shifts the current limit
threshold up by a factor of 11:1 (to 30A) for 100ms when
the bulb is first turned on. The current limit then drops
down to 2.7A after the in-rush current has subsided.
12V
+
470µF
IN
VS
EN
10k
0.036Ω
100k
DS
VN2222LL
LTC1154
STATUS
G
0.1µF
1M
GND
12V
SD
+
9.1V
470µF
VS
0.036Ω
CD
0.01µF
EN
DS
D1
1N4148
LTC1154
STATUS
GND
G
12V/1A
BULB
RD
100k
R1
100k
LTC1154 • F04
Figure 4. Lamp Driver with Delayed Protection
R2
100k
MTP3055E
SD
C1
0.33µF
OUT
15V
+
CLOAD
100µF
LTC1154 • F03
Figure 3. Powering Large Capacitive Loads
The RC network, RD and CD, in series with the drain sense
input should be set to trip based on the expected characteristics of the load after start-up. With this circuit, it is
possible to power a large capacitive load and still react
quickly to an over-current condition. The ramp rate at the
output of the switch as it lifts off ground is approximately:
dV/dt = (VGATE – VTH)/(R1 × C1)
And therefore the current flowing into the capacitor during
start-up is approximately:
ISTART-UP = CLOAD × dV/dt
Using the values shown in Figure 3, the start-up current is
less than 100mA and does not false-trigger the drain
sense circuitry which is set at 2.7A with a 1ms delay.
Selecting RD and CD
Figure 5 is a graph of normalized over-current shutdown
time versus normalized MOSFET current. This graph is
used to select the two delay components, RD and CD,
which make up a simple RC delay between the drain sense
resistor and the drain sense input.
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OVER-CURRENT SHUTDOWN TIME (1 = RC)
IN
MTP3055EL
1
0.1
0.01
1
10
100
MOSFET CURRENT (1 = SET CURRENT)
LTC1154 • F05
Figure 5. Over-Current Shutdown Time vs MOSFET Current
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LTC1154
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APPLICATI
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The Y axis of the graph is normalized to one RC time
constant. The X axis is normalized to the current. (The set
current is defined as the current required to develop
100mV across the drain sense resistor).
Note that the shutdown time is shorter for increasing
levels of MOSFET current. This ensures that the total
energy dissipated by the MOSFET is always within the
bounds established by the manufacturer for safe operation. (See MOSFET data sheet for further information).
12V
5V
+
120k 10k
10µF
IN
5V
µP OR
CONTROL
LOGIC
VS
0.05Ω
10k
EN
DS
LTC1154
10k
STATUS
MTP12N06
G
15V
GND
SD
10k LOAD
300Ω
Using a Speed-Up Diode
LTC1154 • F07
To reduce the amount of time that the power MOSFET is in
a short-circuit condition, “bypass” the delay resistor with
a small signal diode as shown in Figure 6. The diode will
engage when the drop across the drain sense resistor
exceeds about 0.7V, providing a direct path to the sense
pin and dramatically reducing the amount of time the
12V
VS
EN
DS
0.01µF
1N4148
0.036Ω
100k
LTC1154
STATUS
IRF530
G
15V
GND
Since the LTC1154 draws very little current while in
normal operation, the drop across the ground resistor is
minimal. The 5V µP (or control logic) is protected by the
10k resistors in series with the input and status pins.
Current Limited Power Supplies
+
100µF
IN
Figure 7. Reverse Battery Protection
SD
LOAD
The LTC1154 requires at least 3.5V at the supply pin to
ensure proper operation. It is therefore necessary that the
supply to the LTC1154 be held higher than 3.5V at all
times, even when the output of the switch is short circuited
to ground. The output voltage of a current limited regulator
may drop very quickly during short circuit and pull the
supply pin of the LTC1154 below 3.5V before the shutdown circuitry has had time to respond and remove drive
from the gate of the power MOSFET. A supply filter should
LTC1154 • F06
Figure 6. Using a Speed-Up Diode
>7V
5V/2A
REGULATOR
+
MOSFET is in an overload condition. The drain sense
resistor value is selected to limit the maximum DC current
to 2.8A. The diode conducts when the drain current
exceeds 20A and reduces the turn-off time to 15µs.
VS
EN
DS
The LTC1154 can be protected against reverse battery
conditions by connecting a resistor in series with the
ground lead as shown in Figure 7. The resistor limits the
supply current to less than 50mA with – 12V applied.
10
47µF*
0.1µF
0.1Ω
10µF
+
IN
1N4148
100k
LTC1154
STATUS
Reverse Battery Protection
+
*20Ω
100µF
GND
IRLR024
G
SHORT
CIRCUIT
SD
*SUPPLY FILTER COMPONENTS
LTC1154 • F08
Figure 8. Supply Filter for Current Limited Supplies
LTC1154
W
U
U
UO
APPLICATI
S I FOR ATIO
be added as shown in Figure 8 which holds the supply pin
of the LTC1154 high long enough for the over-current
shutdown circuitry to respond and fully discharge the
gate.
Five volt linear regulators with small output capacitors are
the most difficult to protect as they can “switch” from a
voltage mode to a current limited mode very quickly. The
large output capacitors on many switching regulators may
be able to hold the supply pin of the LTC1154 above 3.5V
sufficiently long that this extra filtering is not required.
Because the LTC1154 is micropower in both the standby
and ON state, the voltage drop across the supply filter is
less than 2mV, and does not significantly alter the accuracy of the 100mV drain sense threshold voltage.
UO
TYPICAL APPLICATI
S
High-Side Driver with Over-Voltage Shutdown
High-Side Driver with Thermal Shutdown
6V
5V
4.75V TO 5.25V
5V
+
+
100µF
µP OR
CONTROL
LOGIC
IN
VS
EN
DS
10µF
EN
DS
5.6V
LTC1154
STATUS†
IRLZ24
G
VS
100Ω
µP OR
CONTROL
LOGIC
LTC1154
STATUS†
IN
IRLD024
G
30k
GND
SD
*RL3006-50-100-25-PT0 KEYSTONE
GND
PTC
THERMISTOR
(100°C)*
SD
6V
LOAD
5V
LOAD
SWITCH IS SHUTDOWN WHEN VS > 5.7V
LTC1154 • TA03
†A
LTC1154 • TA05
51k pullup resistor should be connected between Status Output and 5V Logic Supply.
High-Side Driver with Under-Voltage Shutdown
5V
24V to 28V High-Side Switch with Thermal Shutdown
24V TO 28V
+
100µF
1N4148*
+
10k
100µF
3k
+
1µF**
5V
µP OR
CONTROL
LOGIC
IN
VS
EN
DS
2N2907
µP OR
CONTROL
LOGIC
IRLZ24
G
18V
10µF
VS
IN
LTC1154
STATUS†
+
5V
EN
DS
LTC1154
STATUS†
MTP12N06
G
200k
GND
SD
*OPTIONAL IF SUPPLY VOLTAGE LESS THAN 6V.
**CAPACITOR CHARGED TO SUPPLY VOLTAGE.
SHUTDOWN OCCURS WHEN SUPPLY VOLTAGE
DROPS BY 0.6V.
GND
10k
SD
6V
LOAD
*KEYSTONE RL2006-100-100-30-PT.
MOUNT ON MOSFET OR LOAD HEAT SINK
PTC
THERMISTOR
(100°C)*
24V TO 28V
LOAD
LTC1154 • TA06
LTC1154 • TA04
11
LTC1154
UO
TYPICAL APPLICATI
S
High-Side Relay Driver with Over-Current
Protection and Status Feedback
24V to 28V Switch with Bootstrapped Supply
24V TO 28V
12V
+
100µF
2Ω
+
5V
µP OR
CONTROL
LOGIC
18V
IN
VS
EN
DS
STATUS
6.2k
µP OR
CONTROL
LOGIC
1N4148
VS
EN
DS
10k
0.01µF
STATUS
G
15V
SD
*KEYSTONE RL2006-100-100-30-PT.
MOUNT ON MOSFET OR LOAD HEAT SINK.
I Q(OFF) = 60µA, IQ(ON) = 1mA.
†A
1N4148
MTD3055E
LTC1154
†
MTP15N06E
G
IN
200k
GND
GND
PTC
THERMISTOR
(100°C)*
1N4001
24V TO 28V
LOAD
COIL CURRENT LIMITED TO 350mA.
CONTACT CURRENT LIMITED TO 5A.
LTC1154 • TA07
LTC1154 • TA08
“4-Cell-to-5V” Extremely Low Voltage Drop Regulator with
Over-Current Shutdown, Status Feedback, Ramped Turn-ON
and 8µA Standby Current
4-CELL
BATTERY
PACK
+
100µF
0.036Ω
5V
IN
VS
EN
DS
LTC1154
STATUS†
200pF
100k
100k
G
SD
IRLR024
1N4148
0.22µF
GND
10k
8
7
1
3
LT1431
6
5
4
5V/2A
+
470µF
ESR < 0.5Ω
LTC1154 • TA09
12
TO 12V
LOAD
SD
51k pullup resistor should be connected between Status Output and 5V Logic Supply.
µP OR
CONTROL
LOGIC
0.02Ω
5V
10µF
LTC1154
†
+
100k
100µF
LTC1154
UO
TYPICAL APPLICATI
S
Bank Controlled High-Side Switches with “Global” Thermal
and Over-Voltage Shutdown
12V
IN
VS
100Ω
EN
+
470µF
DS
LTC1154
STATUS
G
IRLR024
15V
GND
SD
IN
VS
OUTPUT 1
5V
EN
DS
LTC1154
51k
STATUS
G
IRLR024
15V
µP OR
CONTROL
LOGIC
GND
SD
IN
VS
EN
OUTPUT 2
DS
LTC1154
STATUS
G
IRLR024
15V
GND
SD
IN
VS
EN
DS
OUTPUT 3
120k
LTC1154
STATUS
G
IRLR024
15V
GND
SD
OUTPUT 4
15V
*KEYSTONE RL2006-100-100-30-PT.
MOUNT ON COMMON HEAT SINK.
PTC
THERMISTOR
(100°C)*
LTC1154 • TA10
13
LTC1154
UO
TYPICAL APPLICATI
S
12V Step-Up Regulator with Ultra-Low Standby Current,
Over-Current Protection and Status Feedback
0.02Ω
5V
+
330µF
+
47µF
IN
VS
EN
DS
10k
5
+
1N4148
VIN
150µF
1N4148
3
LTC1154
STATUS
STATUS
100k
1
1.24k
1%
100k
G
GND
10.72k
1%
4
VSW
LT1070
2
FB
VC
GND
0.22µF
51k
12V/1A
+
20Ω
470µF
ON/OFF
1N5820
50µH
IRLZ24
1k
0.1µF
SD
1µF
LTC1154 • TA11
12V Step-Up Regulator with 1A Over-Current Protection,
Switch Status Feedback and Ramped Output
50µH
1N5820
5V
+
+
150µF
330µF
0.1Ω
5
1N4148
VIN
4
VSW
LT1070
2
FB
VC
GND
3
1
1k
10.72k
1%
ON/OFF
IN
VS
10k
0.1µF
51k
1.24k
1%
EN
DS
LTC1154
STATUS
STATUS
1N4148
100k
100k
G
IRF530
12V
1µF
GND
SD
+
0.22µF
12V/1A
47µF
LTC1154 • TA12
14
LTC1154
UO
TYPICAL APPLICATI
S
Auto-Reset High-Side Switch with Over-Current
and Over-Current Temperature Shutdown
12V
+
RT
1M**
100µF
1M
0.036Ω
ON/OFF
IN
VS
EN
+
DS
LTC1154
CT
100µF**
STATUS
MTP12N06
G
VN2222LL
18V
200k
GND
SD
PTC
THERMISTOR
(100°C)*
*KEYSTONE RL2006-100-100-30-PT.
**AUTO-RESET PERIOD ≈ 800ms WITH COMPONENTS SHOWN
12V
LOAD
LTC1154 • TA13
SCSI Termination Power Switch with 1A Over-Current Shutdown,
Auto-Reset and Load Soft-Start
0.1Ω
MTD3055EL
1N5817
4.25V/1A
5V
+
1M
100µF
1M
ON/OFF
+
IN
0.1µF
DS
LTC1154
+
STATUS
1µF
1N4148
47µF
1N4148
100k
100k
G
VN2222LL
GND
10k
+
VS
EN
10µF
20Ω
SD
0.22µF
LTC1154 • TA14
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of circuits as described herein will not infringe on existing patent rights.
15
LTC1154
U
PACKAGE DESCRIPTIO
N8 Package
8-Lead Plastic Lead
0.300 – 0.320
(7.620 – 8.128)
0.045 – 0.065
(1.143 – 1.651)
0.400
(10.160)
MAX
0.130 ± 0.005
(3.302 ± 0.127)
8
+0.025
0.325 –0.015
8.255
+0.635
–0.381
6
5
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
(
7
0.045 ± 0.015
(1.143 ± 0.381)
)
0.100 ± 0.010
(2.540 ± 0.254)
0.125
(3.175)
MIN
0.250 ± 0.010
(6.350 ± 0.254)
0.020
(0.508)
MIN
1
2
4
3
0.018 ± 0.003
(0.457 ± 0.076)
S8 Package
8-Lead Plastic SOIC
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.016 – 0.050
0.406 – 1.270
8
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0°– 8°
TYP
0.189 – 0.197
(4.801 – 5.004)
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
0.050
(1.270)
BSC
16
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977
6
5
0.228 – 0.244
(5.791 – 6.197)
0.150 – 0.157
(3.810 – 3.988)
1
Linear Technology Corporation
7
2
3
4
LT/GP 1192 10K REV 0
 LINEAR TECHNOLOGY CORPORATION 1992