FAIRCHILD MM74HC157SJ

Revised February 1999
MM74HC157
Quad 2-Input Multiplexer
General Description
The MM74HC157 high speed Quad 2-to-1 Line data selector/Multiplexers utilizes advanced silicon-gate CMOS technology. It possesses the high noise immunity and low
power consumption of standard CMOS integrated circuits,
as well as the ability to drive 10 LS-TTL loads.
This device consists of four 2-input digital multiplexers with
common select and STROBE inputs. When the STROBE
input is at logical “0” the four outputs assume the values as
selected from the inputs. When the STROBE input is at a
logical “1” the outputs assume logical “0”.
The 74HC logic family is functionally as well as pin-out
compatible with the standard 74LS logic family. All inputs
are protected from damage due to static discharge by internal diode clamps to VCC and ground.
Features
■ Typical propagation delay: 14 ns data to any output
■ Wide power supply range: 2–6V
■ Low power supply quiescent current: 80 µA maximum
(74HC Series)
■ Fan-out of 10 LS-TTL loads
■ Low input current: 1 µA maximum
Ordering Code:
Order Number
MM74HC157M
MM74HC157SJ
MM74HC157MTC
MM74HC157N
Package Number
Package Description
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MTC16
N16E
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Inputs
Pin Assignments for DIP, SOIC, SOP and TSSOP
Output
Strobe
Select
A
B
Y
H
X
X
X
L
L
L
L
X
L
L
L
H
X
H
L
H
X
L
L
L
H
X
H
H
H = HIGH Level,
L = LOW Level
X = Irrelevant
Top View
© 1999 Fairchild Semiconductor Corporation
DS005314.prf
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MM74HC157 Quad 2-Input Multiplexer
September 1983
MM74HC157
Logic Diagram
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2
Recommended Operating
Conditions
−0.5 to +7.0V
Supply Voltage (VCC)
DC Input Voltage (VIN)
−1.5 to VCC +1.5V
DC Output Voltage (VOUT)
−0.5 to VCC +0.5V
Clamp Diode Current (IIK, IOK)
±20 mA
DC Output Current, per pin (IOUT)
±25 mA
DC VCC or GND Current, per pin (ICC)
±50 mA
Storage Temperature Range (TSTG)
Min
Max
Supply Voltage (VCC)
2
6
V
DC Input or Output Voltage
0
VCC
V
−40
+85
°C
(VIN, VOUT )
Operating Temperature Range (TA)
Input Rise or Fall Times
−65°C to +150°C
(tr, tf) VCC = 2.0V
1000
ns
VCC = 4.5V
500
ns
VCC = 6.0V
400
ns
Power Dissipation (PD)
(Note 3)
600 mW
S.O. Package only
500 mW
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Lead Temperature (TL)
(Soldering 10 seconds)
Symbol
VIH
VIL
Parameter
Conditions
Note 3: Power Dissipation temperature derating — plastic “N” package: −
12 mW/°C from 65°C to 85°C.
(Note 4)
VCC
TA = 25°C
Typ
TA = −40 to 85°C TA = −55 to 125°C
Guaranteed Limits
Units
Minimum HIGH Level
2.0V
1.5
1.5
1.5
V
Input Voltage
4.5V
3.15
3.15
3.15
V
6.0V
4.2
4.2
4.2
V
Maximum LOW Level
2.0V
0.5
0.5
0.5
V
4.5V
1.35
1.35
1.35
V
6.0V
1.8
1.8
1.8
V
Input Voltage
VOH
Note 2: Unless otherwise specified all voltages are referenced to ground.
260°C
DC Electrical Characteristics
Units
Minimum HIGH Level
VIN = VIH or VIL
Output Voltage
|IOUT| ≤ 20 µA
2.0V
2.0
1.9
1.9
1.9
V
4.5V
4.5
4.4
4.4
4.4
V
6.0V
6.0
5.9
5.9
5.9
V
|IOUT| ≤ 4.0 mA
4.5V
4.2
3.98
3.84
3.7
V
|IOUT| ≤ 5.2 mA
6.0V
5.7
5.48
5.34
5.2
V
VIN = VIH or VIL
VOL
Maximum LOW Level
VIN = VIH or VIL
Output Voltage
|IOUT| ≤ 20 µA
2.0V
0
0.1
0.1
0.1
V
4.5V
0
0.1
0.1
0.1
V
6.0V
0
0.1
0.1
0.1
V
V
VIN = VIH or VIL
IIN
|IOUT| ≤ 4.0 mA
4.5V
0.2
0.26
0.33
0.4
|IOUT| ≤ 5.2 mA
6.0V
0.2
0.26
0.33
0.4
V
VIN = VCC or GND
6.0V
±0.1
±1.0
±1.0
µA
Maximum Quiescent
VIN = VCC or GND
6.0V
8.0
80
160
µA
Supply Current
IOUT = 0 µA
Maximum Input
Current
ICC
Note 4: For a power supply of 5V ±10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when
designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
3
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MM74HC157
Absolute Maximum Ratings(Note 1)
(Note 2)
MM74HC157
AC Electrical Characteristics
VCC = 5V, TA = 25°C, CL = 15 pF, tr = tf = 6 ns
Symbol
tPHL, tPLH
Parameter
Conditions
Guaranteed
Typ
Maximum Propagation
Units
Limit
14
20
ns
14
20
ns
12
18
ns
Delay, Data to Output
tPHL, tPLH
Maximum Propagation
Delay, Select to Output
tPHL, tPLH
Maximum Propagation
Delay, Strobe to Output
AC Electrical Characteristics
CL = 50 pF, tr = tf = 6 ns (unless otherwise specified)
Symbol
Parameter
Conditions
tPHL, tPLH Maximum Propagation
Delay, Data to Output
VCC
TA = 25°C
Typ
TA = −40 to 85°C TA = −55 to 125°C
Guaranteed Limits
Units
2.0V
63
125
158
186
ns
4.5V
13
25
32
37
ns
ns
6.0V
11
21
27
32
tPHL, tPLH Maximum Propagation
2.0V
63
125
158
186
ns
Delay, Select to Output
4.5V
13
25
32
37
ns
6.0V
11
21
27
32
ns
tPHL, tPLH Maximum Propagation
2.0V
58
115
145
171
ns
Delay, Strobe to Output
tTLH, tTHL Maximum Output Rise
and Fall Time
CIN
4.5V
12
23
29
34
ns
6.0V
10
20
25
29
ns
2.0V
30
75
95
110
ns
4.5V
8
15
19
22
ns
6.0V
7
13
16
19
ns
5
10
10
10
pF
Maximum Input
Capacitance
CPD
Power Dissipation
(per
Capacitance (Note 5)
Multiplexer)
57
Note 5: CPD determines the no load dynamic power consumption, PD = CPD VCC2f + ICC VCC, and the no load dynamic current consumption,
IS = CPD V CC f + ICC.
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4
pF
MM74HC157
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
Package Number M16A
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
5
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MM74HC157
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC16
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6
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N16E
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
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1. Life support devices or systems are devices or systems
device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the
sonably expected to cause the failure of the life support
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device or system, or to affect its safety or effectiveness.
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
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user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
MM74HC157 Quad 2-Input Multiplexer
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)