Preliminary Datasheet TLE 6215 G Smart Two Channel Low-Side Switch Features • Power limitation • Overtemperature protection • Overload protection • Short circuit protection • Diagnostic feedback • Overvoltage protection • µC compatible input • Electrostatic discharge (ESD) protection Product Summary Supply voltage Drain source voltage On resistance Output current Nom. output current VS VDS(AZ)max RON (typ) ID ID(ISO) 6.5 - 40 60 0.21 2x4 2 x 1.3 V V Ω A A Application • All kinds of resistive and inductive loads (relays,electromagnetic valves) • µC compatible power switch • Solenoid control switch in automotive and industrial control systems P-DSO-24-3 General description Double channel Low-Side-Switch in Smart Power Technology (SPT) with two seperate inputs and two open drain DMOS output stages. The TLE 6215 G is fully protected by embedded protection functions and designed for automotive and industrial applications. Block Diagram VS Vbb TLE6215 5224 G G2 TLE Thermal overload IN1 Load 1 Open Load ENA Overload OU T1 LOGIC Vbb ST1 R PD Load 2 Open Load Overload IN2 LOGIC OU T2 ST2 R PD GND V5 Page 1 28.04.2002 Preliminary Datasheet TLE 6215 G Block Diagram of Open Load Detection V5 Page 2 28.04.2002 Preliminary Datasheet TLE 6215 G Maximum Ratings for Tj = – 40°C to 150°C Parameter Supply voltage Symbol VS Values - 0.3 ... + 40 Unit V Supply voltage operational range VS + 4.8 ... + 40 V Continuous drain source voltage (OUT1, OUT2) VDS 45 V Input voltage IN1, IN2, ENA VIN - 0.3 ... + 6 V Status output voltage VST - 0.3 ... + 32 V Operating temperature range Storage temperature range Tj Tstg - 40 ... + 150 - 55 ... + 150 °C Output current per channel ID(lim) Overload shutdown A Output current at reversal supply ID 1,2 -4 A Status output current IST - 5 ... + 5 mA Inductive load single switch off dissipation energy Tj = 25°C C EAS 50 mJ Electrostatic Discharge Voltage (HBM) according to MIL STD 883D, method 3015.7 and EOS/ESD assn. Standard S5.1 – 1993 Output 1,2 Pins All other Pins Thermal resistance VESD VESD 4000 2000 junction - case1 RthJC junction - ambient RthJA Maximum operating lifetime (according to "Ambient thermal conditions") tb V V 12 75 K/W 10000 h Ambient thermal conditions Pos TAmbient temperature range operating periods 11 -40 °C 2% 12 -20 °C 10 % 13 25 °C 24 % 14 60 °C 34 % 15 80 °C 24 % 16 100 °C 5% 17 > 120 °C 1% 1 Case = Pin 5 to 8 and 17 to 20. Additionally the pins not connected (N.C.) have to be connected to the ground plane used as thermal heatsink to achieve the best thermal resistance. V5 Page 3 28.04.2002 Preliminary Datasheet TLE 6215 G Pin Definitions and Functions Pin 1 2 3 4 5,6,7,8 9,10 11 12 13,14,15,16 17,18,19,20 21 22 23 24 V5 Symbol IN1 ST2 OUT2 N.C. GND N.C. ENA VS N.C. GND N.C. OUT1 ST1 IN2 Pin Configuration(top view) Function Control input channel 1 Status output channel 2 Power output channel 2 Not connected, cooling Ground, cooling Not connected, cooling Enable input for both channels Supply voltage Not connected, cooling Ground, cooling Not connected, cooling Power output channel 1 Status output channel 1 Control input channel 2 Page 4 28.04.2002 Preliminary Datasheet TLE 6215 G Electrical Characteristics Parameter and Conditions VS = 6.5 to 40 V ; Tj = - 40 °C to + 150 °C (unless otherwise specified) Symbol Values min Unit typ max 1. Power Supply (VS) Supply current (Outputs ON) Supply current (Output OFF) VS = 40 V VS ≤ 18 V IS VS ≤ 18 V IS Operating voltage VS mA 2,5 5 4 1,5 3 mA 40 V 4.8 2. Power Outputs Tj = 25 ° C Tj = 150°C ON state resistance; ID = 4A; VS ≥ 9.5 V RDS(ON) Ω 0.21 0.42 Z-Diode clamping voltage (OUT1, OUT2) VDS(AZ) 45 60 V Pull down resistor Tj = 25 ° C RPD Tj ≤ 125 ° C 14 10 20 26 40 kΩ Output on delay time 2 Output off delay time 2 Output on fall time 2 Output off rise time 2 Output off status delay time 2 Output on status delay time 2 3 4 Overload switch-off delay time 3 ID = 0.2 A ID = 2 A ID = 0.2 A ID = 2 A ID = 2 A ton toff tfall trise t4 t5 tDSO 10 25 40 20 25 40 40 µs 50 60 50 150 Input low voltage VINL - 0.3 1.0 V Input high voltage VINH 2.0 6.0 V Input voltage hysteresis VINHys 0.2 0.6 V 20 3. Digital Inputs (IN1, IN2, ENA) Input pull down current Enable pull down current VIN =5 V; VS ≥ 9 V IIN 50 100 140 µA VENA =5 V; VS ≥ 9 V IENA 15 30 45 µA VSTL 0.5 V ISTH 10 µA 4. Digital Status Outputs (ST1, ST2), open Drain Output voltage low IST = 2 mA Leakage current high See timing diagram, resitive load condition; VS ≥ 9 V This parameter will not be tested but assured by design 4 Time till status valid after switching on or error detection 2 3 V5 Page 5 28.04.2002 Preliminary Datasheet TLE 6215 G Electrical Characteristics Parameter and Conditions VS = 6.5 to 40 V ; Tj = - 40 °C to + 150 °C (unless otherwise specified) Symbol Values min Unit typ max 5. Diagnostic Functions VS ≤ 18 V VS = 12 V Open load detection voltage (Output OFF) Open load compare voltage 5 VDS(OL) 18V > VDSC > 0.65*VS VDS(OL)C Open load detection current (Output ON) Overload threshold current VS ≥ 9.5 V Overtemperature shutoff threshold 6 Hysteresis 0.515*VS 0.585*VS 6.2 7.0 VDSC-1.6 VDSC-0.9 ID(OL) 100 ID(lim) 5 Tth Thys 500 V V mA A 170 200 10 °C K Application Description This IC is specially designed to drive inductive loads (relays, electromagnetic valves). Integrated clamp-diodes limit the output voltage peak when switching off an inductive load. For the detection of errors there are two status outputs, which monitor the following errors by logic levels: − thermal overload, − open and short load to ground in active an inactive mode, − overloading of output (also shorted load to supply) in active mode. Circuit Description Input Circuits The control and enable inputs, all active high, consist of Schmitt triggers with hysteresis. All inputs are connected with pull-down current sources. Not connected inputs are interpreted as "low“. Switching Stages The power outputs consist of a DMOS power transistor with open drain. The output stages are shortload-protected throughout the operating range. Integrated clamp-diodes limit voltage spikes produced when inductive loads are discharged. Protective Circuit The outputs are protected against current overload. There is no protection against reverse polarity of the supply voltage. 5 6 VDSC is the output voltage of the other channel used for open load compare detection This parameter will not be tested but assured by design V5 Page 6 28.04.2002 Preliminary Datasheet TLE 6215 G Error Detection The status output signal of the switching stages at normal operation is LOW = OFF; HIGH = ON. In case of any error the status outputs are set according to the table below. If current overload or thermal overload occurs, the error condition is stored in an internal register and the output is shutdown. To reset this register the control input of the affected channel has to be switched off and then on again. The state of the error detection circuit is directly dependent on the input status. Open load is detected for both on- and off-modus. In the on-modus the load current is monitored. If it drops below the specified threshold open load is detected. In the off mode, the ouput voltage is monitored. An open load condition is detected when the output voltage of a given channel is below 55 % of the supply voltage VS. Also the output voltages of two outputs are compaired against each other in off condition with a fixed offset of typ. 1.25 V to recognize GND bypasses. To suppress fault diagnosis during the flyback phase of the compared output, the diagnostic circuit includes a latch function. Reset of this latch is done at end of the flyback phase, additionally it can be reseted by a low signal on the enable input and by a high signal of the input signal. See also the block diagramm of open load detection. Diagnostic Table Operating Condition Normal Function Thermal Overload Open Load Channel 1 Open Load Channel 2 Overload Channel 1 Overload Channel 2 Power Outputs Inputs Status Outputs ENA IN1 IN2 OUT1 OUT2 ST1 ST2 L H H H H X L H X L H X L H L H H L H H X L H L H L X H L H H X L L H H L X H OFF OFF ON OFF ON OFF OFF OFF OFF OFF ON OFF OFF OFF ON ON OFF OFF OFF L L H L H L L L H H L L L L H H L L L 1) L H H 1) X L H 1) 1) X L H 1) 1) 1) OFF OFF ON 1) H H L OFF OFF OFF 1) L L L 1) 1) OFF OFF OFF 1) L L L 1) see normal function V5 Page 7 28.04.2002 Preliminary Datasheet TLE 6215 G Test Circuit Application Circuit The blocking capacitor C is recommended to avoid critical negative voltage spikes on VS in case of battery interruption during OFF-commutation. V5 Page 8 28.04.2002 Preliminary Datasheet TLE 6215 G Timing Diagram VIN VI NH VINL t VDS t on t off VS 90% 10% t t fall t rise V ST t4 t5 V5 Page t 9 28.04.2002 Preliminary Datasheet TLE 6215 G Package and ordering code all dimensions in mm P - DSO - 24 - L16 Ordering code (Dual-in-line package, small-outline) 24 B 24 DIN 41870 T17 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 0.36 +0 .13 0.76 ma x 1.27 15.4-0.2 2.45 -0.2 0.1 min 7.6 -0.2 2.65 max 0.25 +0 .07 10.3 V5 Page ±0.3 10 28.04.2002 Preliminary Datasheet TLE 6215 G Published by Infineon Technologies AG, Bereichs Kommunikation St.-Martin-Strasse 76, D-81541 München © Infineon Technologies AG 1999 All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that lifesupport device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. V5 Page 11 28.04.2002 Preliminary Datasheet TLE 6215 G Revision List: 19.06.2001 30.11.2001 01.03.2002 28.04.2002 V5 Target Datasheet First revision Second revision Preliminary Datasheet V1 V3 V4 V5 Page 12 28.04.2002