STV2145 I2C BUS CONTROLLED EAST-WEST AND VERTICAL INTERFACE . . . . . . . INTEGRATED VERTICAL SAWTOOTH GENERATOR WITH AMPLITUDE CONTROL LOOP (50Hz - 60Hz) INTERLACE MODE INTRINSICALLY CONTROLLED BY STV2118A VERTICAL SIZE CORRECTION (BREATHING) TO ADAPT DEFLECTION SENSITIVITY TO THE CURRENT BEAM (HIGH VOLTAGE VARIATION) BUS ADJUSTED VERTICAL PARAMETERS : VERTICAL AMPLITUDE, VERTICAL POSITION AND S-CORRECTION EAST-WEST FUNCTION GENERATOR WITH INTEGRATED ERROR AMPLIFIER (THUS, ONLY 1 EXTERNAL POWER DARLINGTON IS NECESSARY FOR EW-FUNCTION) BUS CONTROLLED EAST-WEST FUNCTIONS : EW-AMPLITUDE, HORIZONTAL WIDTH, EW-TILT AND EW-SHAPE (CORNER CORRECTION) OVERSIZE BLANKING (VERTICAL AND HORIZONTAL) WHICH PERMIT ZOOM AND SUBTITLE FACILITIES FOR 4/3 AND 16/9 CRTs DESCRIPTION The STV2145 is an I2C bus processor containing the vertical deflection East-West functions and oversize blanking. This circuit is foreseen as ADDON for the Video Chroma Processor STV2118A to permit 110° CRT applications covering standard 4/3 screen format and new 16/9 format with zoom and subtitle facilities. STV2145 has been designed to drive a standard TDA8172/8177 vertical booster and an external transistor for East-West. DIP16 (Plastic Package) ORDER CODE : STV2145 PIN CONNECTIONS I2C BUS SERIAL CLOCK SCL 1 16 SENSM I C BUS SERIAL DATA VERTICAL RETRACE PULSE (FROM STV2118A) REGULATOR OUTPUT FOR SERIES TRANSISTOR REGULATED VOLTAGE SUPPLY SDA 2 15 SENSP VRET 3 14 FROUT FRAME OUTPUT ERROR SIGNAL REG 4 13 EWOUT EAST-WEST ERROR AMPLIFIER OUTPUT V CC 5 12 EWIN EAST-WEST ERROR AMPLIFIER INPUT LPF 6 11 OBLK VERTICAL AGC CAPACITOR CVERT 7 10 HFLY OPEN COLLECTOR BLANKING SIGNAL HORIZONTAL FLYBACK INPUT (CURRENT INPUT) 8 9 BREATH VERTICAL SIZE MODULATION 2 LOOP FILTER FOR 2H-PLL GND 2145-01.EPS GROUND RESISTOR BRIDGE DIFFERENTIAL INPUT April 1996 1/17 STV2145 PIN DESCRIPTION 1 Name SCL Function 2 Serial Clock for I C Bus 2 Data input (no pull down - capability) Data input and output (pull down - capability for acknowledge and data reply) 2 SDA 3 VRET Vertical Reset Input Vertical Synchronization Signal from STV2118A 4 REG Control Pin for Regulator Output for controlling the ext. series regulator transistor 5 VCC Supply Voltage Scanning Supply voltage of scanning part, connected with external series regulator transistor 6 LPF 7 CVERT Serial Data for I C Bus Description Loop Filter for PLL Loop filter for horizontal 2 x FLINE VCO Vertical AGC Capacitor Regulation of vertical saw tooth amplitude Ground Ground Breathing Input Input voltage = 1 to 7.8V = vertical size compensation 8 GND 9 BREATH 10 HFLY Horizontal Flyback Input Voltage input for horizontal flyback, polarity positive 11 OBLK Oversize Blanking Signal Oversize blanking output : - open collector output : high ohmic = blanking - low (transistor saturated) = no blanking 12 EWIN East-West Input Input of the error amplifier for the East-West modulator 13 EWOUT East-West Output Output of the error amplifier for the East-West modulator (current output, biasing directly the darlington output transistor) 14 FROUT Output for Frame Amplifier Output of transconductance amplifier, pin has to be connected to the inverting input of the vertical power amplifier 15 SENSP Sense Input, Positive Input of internal resistor bridge for sensing the vertical deflection YOKE current 16 SENSM Sense Input, Negative Input of internal resistor bridge for sensing the vertical deflection YOKE current 2/17 2145-01.TBL Pin N° V_RETR 2145-02.EPS 4.7nF LPF 3 6 10 HFLY_INR 22k Ω VERTICAL PULSE (FROM STV2112/16/18) 220nF 4.7k Ω HEATER WINDING (POS. FLYBACK) 26V 10k Ω VOLTAGE REGULATOR VCC SCL TO I2C BUS 1 2 I2 C BUS INTERFACE PLL FOR DOUBLE LINE-FREQUENCY 4 REG BC547 or SMD typ SDA 5 VCC1 7 C_VERT 33nF AGC Capacitor VERTICAL SAWTOOTHGENERATOR AGC Pulse SIMPLIFIED VERTICALCOUNTDOW 50-60Hz HORIZONTAL OVERSIZEBVLANKING 220nF VERTICAL AMPLITUDE ADJUSTMENT 8 11 GND 10nF 15 VERTICAL RESISTOR BRIDGE 16 R1 R3 R4 STV2145 EW FUNCTION V_DC 12 13 9 14 R2 EW_IN BREATH 1kΩ 1nF 1.5nF 3.3k Ω VERTICAL YOKE 26V FR_OUT 10nF 100kΩ SENSP RSENS (1Ω) 100kΩ AMPLITUDE MODULATOR SENSM 1000 µF 1kΩ VERTICAL S-CORRECTION AND V-OVERSIZE Vertical Oversize O_BLK TO CRT BOARD 13V 3.3nF 270k Ω 680kΩ 9V TO EW MODULATOR BCL 13V 10k Ω STV2145 BLOCK DIAGRAM 3/17 STV2145 I2C BUS INFORMATION Slave Address hex 8C/8D MSB LSB 1 0 0 0 1 1 0 R/W Address Mapping (write mode) x = don’t care bits, not used for the decoding of the subaddress. Subaddress Binary Hex xxxxx000 x0 or x8 xxxxx001 xxxxx010 x1 or x9 x2 or xA xxxxx011 x3 or xB Data Bits MSB LSB TEST_MODE VERTICAL OVERSIZE BLANKING 2 VERTICAL OVERSIZE BLANKING 1 V_AMPLITUDE TEST_MODE SUB_TITLE HORIZONTAL HORIZONTAL OVERSIZE OVERSIZE BLANKING 2 BLANKING 1 xxxxx100 x4 or xC xxxxx101 x5 or xD xxxxx110 x6 or xE S_CORRECTION V_DC EW_AMPLITUDE EW_SHAPE EW_TILT H_WIDTH EW_LOW TEST_MODE Subaddress 0 (hex 00) : Vertical Oversize Blanking & S_CORRECTION MSB TEST _MODE TEST_MODE LSB OV_BLK_VERT2 : 0 1 OV_BLK_VERT1 S3 S2 S1 S0 : Normal operations : Reserved for SGS-THOMSON test OV_BLK_VERT1, : Vertical oversize blanking (register SUB_TITLE in subadress X2 or XA) OV_BLK_VERT2 (see Table 1) Table 1 Sent OV_BLK_VERT OV_BLK_VERT Frequency SUB_TITLE 2 1 (via VRET) 50Hz STANDARD 4 :3 0 0 0 60Hz 50Hz SUBTITLE Don’t Care Don’t Care 1 60Hz 50Hz ZOOM1 0 1 0 60Hz 50Hz ZOOM2 1 1 0 60Hz 50Hz BLANK 1 0 0 60Hz TV Mode Start of Blanking (middle of line) No Blanking 302 259 285 239 278 234 67 59 49 43 59 49 Full Blanking S1, S2, S3, S4 : S-CORRECTION 0000 (hex 00) : Maximal S-CORRECTION 1111 (hex 0F) : Minimal S-CORRECTION (vertical sawtooth flat) 4/17 End of Blanking (middle of line) STV2145 I2C BUS INFORMATION (continued) Subaddress 1 (hex 01) : Vertical Sawtooth Amplitude MSB LSB V6 V5 V6, V5, V4, V3, V2, V1, V0 V4 V3 V2 V1 V0 : V_AMPLITUDE 0000000 (hex 00) : Minimal V_AMPLITUDE (0.46VPP on SENSP/SENSM) 1111111 (hex 7F) : Maximal V_AMPLITUDE (1.16VPP on SENSP/SENSM) Subaddress 2 (hex 02) : Vertical Shift & Vertical Position MSB TEST_MODE LSB SUB_TITLE TEST_MODE SUB_TITLE V4 V3 V2 V1 V0 : 0 : Normal operations 1 : Reserved for SGS-THOMSON test : DC shift of vertical sawtooth 0 : Normal operations 1 : Vertical Sawtooth shifted by 90mV upwards and unsymmetrical vertical oversize blanking (if nominal amplitude = V_AMPLITUDE = hex40) V4, V3, V2, V1, V0 : Vertical position (V_DC) 00000 (hex 00) : Minimal position (picture shifted down by -65mV on SENSP/SENSM) 11111 (hex 1F) : Maximal position (picture shifted up by +65mV on SENSP/SENSM) Subaddress 3 (hex 03) : Horizontal Oversize Blanking & EW-Amplitude MSB LSB OV_BLK_HOR2 OV_BLK_HOR1 OV_BLK_HOR1, OV_BLK_HOR2 E4 E3 E2 E1 E0 : Horizontal oversize blanking (see Table 2) Table 2 TV Mode OV_BLK_HOR2 OV_BLK_HOR1 Reference is Rising Edge of Positive HFLY-Back (µs) Start of Blanking End of Blanking STANDARD 4 :3 0 Don’t Care 0 11.5 ZOOM1 (14:9) 1 0 -1.7 13.7 ZOOM2 (16:9) 1 1 -3.2 15.2 E4, E3, E2, E1, E0 : EW-AMPLITUDE 00000 (hex 00) : Maximal parabola amplitude = 0.74V for EW_LOW = 0 ; 0.48V for EW_LOW = 1 11111 (hex 1F) : Minimal parabola amplitude = 0.26V for EW_LOW = 0 ; 0.0V for EW_LOW = 1 Subaddress 4 (hex 04) : EW_SHAPE EW_SHAPE : 0000 (hex 00) : Maximal parabola flattening (flattened corners of parabola) 1111 (hex 0F) : Minimal parabola flattening (ideal parabola) 5/17 STV2145 I2C BUS INFORMATION (continued) Subaddress 5 (hex 05) : EW_Parabola Range Switch & East-West - Tilt Adjustment MSB LSB EW_LOW EW_LOW T4 T3 T2 T1 T0 : Switch for parabola amplitude range 0 : Parabola amplitude from 0.26 to 0.74V 1 : Parabola amplitude from 0 to 0.48V T4, T3, T2, T1, T0 : East-west tilt (unsymmetry) 00000 (hex 00) : Minimal position : parabola unsymmetrical, (higher on the top of the picture) 10000 (hex 10) : Parabola symmetrical 11111 (hex 1F) : Maximal position : parabola unsymmetrical, (lower on the top of the picture) Subaddress 6 (hex 06) : Picture Width (H_WIDTH) MSB TEST_MODE LSB W5 W4 W3 W2 W1 W0 TEST_MODE : 0 : Normal operations 1 : Reserved for SGS-THOMSON test W5, W4, W3, W2, : H_WIDTH (picture width) W1, W0 000000 (hex 00) : Minimal position : DC_Value of parabola minimal 111111 (hex 3F) : Maximal position : DC_Value of parabola maximal Output Signals (Read Mode) MSB PON_RESET LSB S60/50 VCO_LOCK VERS_NBR VERS_EXT PON_RESET : 1 : If Voltage drop has been detected (risk of data loss in latch memory) S60/50 : 0 1 : If VRET frequency = 50Hz : If VRET frequency = 60Hz VCO_LOCK : 0 1 : If PLL FH2 is out of frequency or phase : If PLL FH2 has locked VERS_NBR VERS_EXT : Number of actual cut (for SGS-THOMSON use) : Number of metal version (for SGS-THOMSON use) 6/17 STV2145 Symbol Parameter VCC VSCL, VSDA VSENSP, VSENSM Value Unit Supply Voltage (pin 5) 9 V Separated Protection Structures to these Pins 1 and 2 6 V No Protection Diodes to VCC in Order to Allow Half Bridge Operation (Pins 15 and 16) 20 V 0, +70 °C -55, +150 °C Toper Operating Ambient Temperature Tstg Storage Temperature 2145-02.TBL ABSOLUTE MAXIMUM RATINGS Symbol Rth (j-a) Parameter Value Junction-ambient Thermal Resistance Max. Unit o 70 C/W 2145-03.TBL THERMAL DATA ELECTRICAL CHARACTERISTICS (VCC = 7.8V, T amb = 25°C, unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Unit 15 mA SUPPLY (Pin 5) (see Note 1) Pmax Total Power Consumption Typical power consumption Imax Current Capability (Pin 4) Maximum current pulled down by Pin 4 Line Ripple Rejection (see Note 2) External transistor, Pin 4 connected with 3.3kΩ against Power Supply (e.g. 12V ; recommended current into REG = 1mA), ∆VCC / ∆Vpower Load Regulation (see Note 2) External transistor, Pin 4 connected with 3.3kΩ against Power Supply (12V), ∆VCC / ∆IE(regulation transistor) Regulation Voltage External regulation transistor, Pin 4 connected via 3.3kΩ resistor against 12V VNOM 0.15 W -35 dB 1 mV/mA V 7.5 7.8 8.2 1.5 2.1 2 I C BUS (Pins 1 and 2) VTH Input Threshold Voltage 2.7 V IBUS Input Current V1 and V2 = 5V 40 µA Data Saturation Voltage Open collector of pull-down transistor at 5mA 0.5 V Pull-down Current No pull-down capability. Pin 1 can’t be pulled down to slow down clock SCL of microprocessor Maximum Toggle Frequency fMax. 200 kHz TIME BASE GENERATION INTERFACES HFLY INTERFACE (Pin 10) Preferable heater-winding of EHTtransformer (flyback voltage positive during horizontal flyback) VTH Threshold Voltage VBE voltage comparator VCLP Positive Clamp Voltage Clamping voltage = VTH + VBE ICLPP Maximum Positive Clamping Current Input voltage exceeds positive clamping voltage VCLP Negative Clamping Voltage Clamping voltage = VTH - VBE ICLPP Minimum Negative Clamping Current Input voltage smaller than negative clamping voltage Notes : 1. 2. Positive 0.5 0.7 1.0 1.6 V V 4 0 -2 mA V mA Supply voltage is regulated via external series regulator transistor. Parameter is not tested during production, but it is guaranteed by the design and qualified by means of corner lots. 7/17 2145-04.TBL Polarity of Horizontal Flyback STV2145 ELECTRICAL CHARACTERISTICS (continued) (VCC = 7.8V, Tamb = 25°C, unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Unit 10 mA TIME-BASE GENERATION INTERFACES (continued) OVERSIZE BLANKING OUTPUT (Pin 11) (see Note 3) IO Output Current VO Output Voltage IOBLK = 5mA Rise Time / Fall Time Output Load = 2.2kΩ against VCC tR, tF VOBLK (Saturation Voltage) < 0.5V 0 0.4 V 100 ns -0.3 0.3 µs µs HORIZONTAL OVERSIZE BLANKING (Pin 11) (see Figure 1) OBR OBL Horizontal Oversize Bus register OV_BLK_HOR1,2 = (00) OBR OBL Horizontal Oversize Bus register OV_BLK_HOR1,2 = (01) 1.45 1.5 1.9 1.7 2.35 1.9 µs µs OBR OBL Horizontal Oversize Bus register OV_BLK_HOR1,2 = (11) 2.95 2.9 3.4 3.2 3.85 3.6 µs µs OBR OBL Horizontal Oversize Blanking Unsymmetry Bus register OV_BLK_HOR1,2 = (11) -0.4 0.2 0.8 µs FH2 PHASE COMPARATOR (Pin 6) IOUT Output Current ∆I Current Ratio µA 100 Ratio of charging / discharging current (unsymmetry) 1 VRET INTERFACE (Pin 3) Polarity of VRET Negative pulse, starts the vertical retrace VTH Threshold Voltage VCC = 7.8V (threshold value derived from VCC) 2.7 Negative IIN Input Current Input Voltage : 0V < VVRET < 7.8V -5 3.0 3.3 V +5 µA VERTICAL DEFLECTION VERTICAL LOGIC (countdown circuit for vertical deflection, 50/60Hz recognition and vertical oversize blanking) Free Running Period No V_Sync pulses (VRET) present Search Window 60Hz 377 240 lines 277 lines VERTICAL OVERSIZE BLANKING (countdown circuit used also for vertical oversize blanking) (Pin 11) OV_BLK_VERT1,2 = (0,0) SUB_TITLE = 0 ; there is no influence of 50 or 60Hz Mode (OBLK always low-level) Vertical Oversize Blanking Subtitle Mode SUB_TITLE = 1; values are the blanked lines Input Frequency fVRET = 50Hz Input Frequency fVRET = 60Hz Vertical Oversize Blanking Zoom 1 Mode Vertical Oversize Blanking Zoom 2 Mode Vertical Oversize Blanking Blank Mode Notes : 8/17 3. OV_BLK_VERT1,2 = (1,0) SUB_TITLE = 0 ; values are the blanked lines Input Frequency fVRET = 50Hz Input Frequency fVRET = 60Hz OV_BLK_VERT1,2 = (1,1) SUB_TITLE = 0 ; values are the blanked lines Input Frequency fVRET = 50Hz Input Frequency fVRET = 60Hz OV_BLK_VERT1,2 = (0,1) SUB_TITLE = 0 ; there is no influence of 50 or 60Hz Mode (OBLK always high-level) Open collector output, polarity positive : High (high impedance) : oversize blanking Low (transistor pulled to Ground) : no blanking No Blanking middle of line 302 259 67 59 middle of line 285 239 49 43 middle of line 278 234 59 49 Full Blanking 2145-05.TBL Oversize Blanking Disable STV2145 ELECTRICAL CHARACTERISTICS (continued) (VCC = 7.8V, Tamb = 25°C, unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Unit 0.38 0.46 0.55 V 1.11 1.16 1.21 V 55 -75 0 65 -65 75 -55 mV mV 70 90 110 mV 157 167 177 line VERTICAL DEFLECTION (continued) Notes : 2. 4. 5. 6. 7. 0 20 40 60 mV -60 -40 -20 mV 0 5.3 % % 10 15 V V kΩ ±100 µA 1 5 0.5 V V mA/V 20 Parameter is not tested during production, but it is guaranteed by the design and qualified by means of corner lots. Parameter is measured in EWS, with limits enlarged due to tester accuracy Vertical output signals like vertical sawtooth, breathing and S-correction can only be measured via external test circuit (see Figure 10). Voltage VSAW only indirectly measurable via application circuit in closed loop condition (voltage-drop across RSENS) for all vertical functions : see Note 5. DC-shift of internal sawtooth-voltage; thus maintenance of fix-points for EW-Parabola and S-CORRECTION 9/17 2145-06.TBL VERTICAL RAMP GENERATOR (see Figure 2) (see Note 6) Sawtooth Amplitude S_CORRECTION = 1111 VSAW Register V_AMPLITUDE Min. Value = minimum (0000000) value VPP for 190 lines difference Max. Value = maximum (1111111) value VPP for 190 lines difference Sawtooth DC-Level VMID SUB_TITLE = 0 Nom. Value Register V_DC = (10000) ; (no V-shift) Min. Value Register V_DC = (00000) ; (UP-shift) Max. Value Register V_DC = (11111) ; (DOWN-shift) V_SUBTITLE (see Note 7) SUB_TITLE Vertical DC-Shift Register SUB_TITLE = 1 (this value affects a for Subtitle Mode vertical UP-shift of about 20 lines) VERTICAL S-CORRECTION (see Figure 3) (See Notes 4 and 5) Middle Fix Point 50Hz Mode ; measurement method : difference TF MID SCOMAX - SCOMIN is measured at line 160 and 174 ; the middle line TF MID is calculated by linear interpolation (for 60Hz , the middle line shifts to line 140 ; not measured) Fix-Point 50Hz Mode Upper at line 72 Difference ∆VFUP = SCOMAX - SCOMIN measured ∆VFUP at line 72 if V_AMPLITUDE = (1111111) ∆VFLOW Lower at line 262 Difference ∆VFLOW = SCOMAX - SCOMIN measured at line 262 if V_AMPLITUDE = (1111111) ∆VSAWMAX Maximum Correction 50Hz Mode Voltage at line 127 Difference ∆VFUP = SCOMAX - SCOMIN measured at line 127 if V_AMPLITUDE = (1111111) at line 207 Difference ∆VFLOW = SCOMAX - SCOMIN measured at line 207 if V_AMPLITUDE = (1111111) VERTICAL BREATHING (Pin 9) (Breathing effect BR = 100% * (VSAW - VSAWB) / VSAW ) (see Notes 4 and 5) (see Figure 4) Breathing Effect Min. Value V9 = 7.8V BR Min BRMax V9 = 1.5V measurement at line 72 and 262 Max. Value VERTICAL BRIDGE AND OUTPUT STAGE (see Figure 5) Sense Input Voltage Input Pins 16 and 15 - Differential input (see Note 2) Min. Value V14 ≤ 3V Max. Value V14 ≤ 5V Input Impedance Resistor value of the internal resistor-bridge (Pins 15-16) Output Current V14 = 3V, V16 and V15 > 10V IOUT (Pin 14) Output Voltage VOUT V16 > 10V (Pin 14) Min. Value Max. Value ∆IOUT /∆VIN Transconductance Input voltage ∆VIN = difference voltage between (Pin 14) Pin 16 and Pin 15 STV2145 ELECTRICAL CHARACTERISTICS (continued) (VCC = 7.8V, Tamb = 25°C, unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Unit VERTICAL DEFLECTION (continued) EAST-WEST CORRECTION (Pins 13-12) (See Figure 6) Output-Current VDC-MIN VDC-MAX TILT Parabola Amplitude See Figure 7 H_WIDTH = (000000), EW_TILT = (10000), EW_SHAPE = (1111) EW_AMPLITUDE = (00000) EW_AMPLITUDE = (11111), (Parabola = 1/3) 0.63 0.21 0.75 0.27 0.87 0.33 VPP VPP EW_LOW = 1 Max. Value Min. Value EW_AMPLITUDE = (00000) EW_AMPLITUDE = (11111) 0.41 0.48 0 0.56 VPP VPP 2.4 3 3.5 2.4 3.65 2.65 3.8 2.9 3.95 Parabola Amplitude Ratio (EW_LOW = 0) ∆VPAR = VPAR (EW_AMPLITUDE)= (00000) / VPAR (EW_AMPLITUDE)= (11111) Parabola DC EW_TILT = (10000), EW_SHAPE = (1111), EW_LOW = 0, EW_AMPLITUDE = (10000) Register H_WIDTH = (000000) (min. picture width) Register H_WIDTH = (111111) (max. picture width) Min. Value Max. Value Parabola Unsymmetry (see Figure 8) Parabola Shape Deformation (see Figure 9) Value is ratio between upper and lower parabola value. TILT= VPARUP / VPARLOW H_WIDTH = (000000), EW_SHAPE = (1111),EW_LOW = 0, EW_AMPLITUDE = (10000) Register EW_TILT = (11111) Register EW_TILT = (00000) R = VDEF / VPAR H_WIDTH = (000000), EW_TILT = (10000), EW_LOW = 0, EW_AMPLITUDE = (00000) Register EW_SHAPE = (0000) Register EW_SHAPE = (1111) (no parabola deformation), V_AMPLITUDE = (1111111) Max. Value Min. Value Figure 1 V V 1.83 0.55 0.07 0 Figure 2 190 lines Slicing level for H-flyback (~0.75V) Horizontal flyback pulse OBR Test condition : THFLY = 12µs VSAW Vertical Sawtooth OBL THFLY TF 2145-03.EPS Horizontal oversize blanking 10/17 V EW_LOW = 0 Max. Value Min. Value Max. Value Min. Value RMAX R MIN -0.5 to +2 2145-07.TBL ∆VPAR Application : Output Darlington-Transistor mA TR All values valid without breathing function (Pin BREATH connected to VCC) 2145-04.EPS VPAR Output Voltage Range -2.5 to +3 STV2145 Figure 3 S-Correction Sawtooth S_CORRECTION = 1111 Original Sawtooth (SCOMIN) ∆VSAW VFUP VDC VFLOW ∆VSAW S_CORRECTION = 0000 Max. Corrected Sawtooth (SCOMAX) TFMID Fix Points Points of Max. Deviation 2145-05.EPS Approximative Line Number 72 127 167 207 262 Figure 4 Figure 5 VMID SENSM 2145-06.EPS VSAW Vertical Sawtooth VSAWB Vertival YOKE RSENS VBRIDGE (~13V) R0 16 15 R0 SENSP Transconductance Amplifier VREF (2 - 3V) 14 FROUT Figure 6 CSTAB VCC V MID VSAW 1kΩ EWIN 5kΩ 100nF Figure 7 Parabola Outside of Fix Points EWOUT V SENS = VFUP Error Amplifier STV2145 Test circuit : all measurement values are related to this test circuit, measured at Pin EWIN. All East-West values below are depending on the following settings : V_AMPLITUDE = (1111111) and no breathing (Pin BREATH at VCC). VSENS = 0 (see Note 5) VPAR VSENS = VFLOW VDC (Line 167 for 50Hz) Amplitude defined for the Fix points VF UP and VFLOW (definition see : vertical ramp generator). Note : valid for all following definitions of parabola amplitude : between EW_AMPLITUDE = mon. and max. there is a linear progression in the amplitude VPAR. 11/17 2145-09.EPS 13 STV2145 CSTAB = 1 to 10nF to guarantee stability (oscillation) 2145-08.EPS 12 2 x R0 2145-07.EPS 2 x R0 Vertical Power Amplifier STV2145 Figure 8 Figure 9 Parabola Outside of Fix Points Ideal parabola (EW_SHAPE = min) Deformed parabola (EW_SHAPE = max) VDEF VPARLOW 70 167 264 VDC Approximative Line Number : 2145-10.EPS Approximative Line Number : VPAR 70 167 264 2145-11.EPS VPARUP Figure 10 VSENS RSENS = 100Ω VBRIDGE (~10V) SENSM R0 16 15 R0 RLOAD = 1kΩ SENSP Transconductance Amplifier VREF (2 - 3V) 14 FROUT Standard Operational Amplifier CSTAB = 5nF VMID VSAW 12/17 2 x R0 STV2145 2145-12.EPS 2 x R0 STV2145 INPUTS/OUTPUTS PIN CONFIGURATION Figure 11 10kΩ SCL/SDA Pins 1/2 VZ ≈ 6V Pull-down and Protection Transistor VZ ≈ 6V Figure 12 2145-13.EPS Acknowledge and/or Data (only for SDA) Figure 13 VCC VCC 20pF VREF = 3V 300Ω 2145-14.EPS VRET 3 REG 4 Figure 14 2145-15.EPS 20pF VZ ≈ 11V VCC Figure 15 VCC 5 VCC Figure 16 2145-17.EPS 2145-16.EPS LPF 6 Figure 17 VCC VCC DAC_TEST : 0V = Normal VCC = Test 13/17 2145-19.EPS BREATH 9 2145-18.EPS CVERT 7 STV2145 INPUTS/OUTPUTS PIN CONFIGURATION (continued) Figure 18 VCC VCC 50kΩ VCC Internal H_FLYBACK 10kΩ 2145-20.EPS HFLY 10 Figure 19 Figure 20 VCC VCC 2kΩ OBLK 11 Figure 21 2145-22.EPS 2145-21.EPS EWIN 12 Figure 22 VCC VCC 200Ω 1.6kΩ FROUT 14 14/17 2145-24.EPS 2145-23.EPS EWOUT 13 STV2145 INPUTS/OUTPUTS PIN CONFIGURATION (continued) Figure 23 20pF VZ ≈ 11V VCC VCC 5kΩ Resistor Bridge 2145-25.EPS SENSP 15 Figure 24 Differential Stage for the Transconductance Amplifier VCC Resistor Bridge 2145-26.EPS 5kΩ SENSM 16 15/17 16/17 C20 47µF 2145-27.EPS +9V +24V C56 220nF R52 4.7kΩ T5 + BC547 C34 100pF R40 10kΩ VOUT SDA SCL C51 33nF C48 4.7nF C44 220nF VCC R30 470Ω R17 330Ω R18 330Ω 8 GROUND BREATH C54 1nF 9 HFLY 10 OBLK 11 EWIN 12 EWOUT 13 FROUT 14 SENSP 15 SENSM 16 STV2145 CVERT LPF 6 7 VCC REG VRET SDA SCL 5 4 3 2 1 R1 330Ω R2 10Ω 3W R54 680kΩ R55 ???Ω VCC R57 22kΩ C39 10nF R31 100Ω R56 270kΩ LFB C37 1nF C36 10nF R28 100Ω C5 R20 2.2Ω 1000µF R19 1Ω V.YOKE +12V + R43 1kΩ R46 ???Ω D8 1N4148 R50 1.5kΩ R45 8.2kΩ VCC C10 220nF R12 1.5Ω BCL OBLK VCC T6 TIP122 C46 3.3nF + C4 1000µF 25V +24V R36 3.3kΩ R41 3.3kΩ R47 39kΩ E/W MODULATOR C31 1.5nF C23 100µF + + +12V D1 1N4004 D4 1N4148 R26 10kΩ D2 1N4148 C57 22pF C9 1000µF 35V +24V 7 TDA8172 IN+ OUT.VCC OUT 5 6 GND FLYBACK VCC IN- 4 3 2 1 STV2145 TYPICAL APPLICATION STV2145 PM-DIP16.EPS PACKAGE MECHANICAL DATA 16 PINS - PLASTIC PACKAGE a1 B b b1 D E e e3 F I L Z Min. 0.51 0.77 Millimeters Typ. Max. 1.65 Min. 0.020 0.030 0.5 0.25 Inches Typ. Max. 0.065 0.020 0.010 20 8.5 2.54 17.78 0.787 0.335 0.100 0.700 7.1 5.1 3.3 0.280 0.201 DIP16.TBL Dimensions 0.130 1.27 0.050 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without noti ce. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. 1996 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system confo rms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 17/17