RH118 Precision, High Speed Operational Amplifier U W W W U DESCRIPTION ABSOLUTE MAXIMUM RATINGS The RH118 is a precision, high speed operational amplifier which offers wide bandwidth and high slew rate. Unlike many wideband amplifiers, the RH118 is unity-gain stable and has a slew rate of 50V/µs. Supply Voltage ...................................................... ± 20V Differential Input Current (Note 1) ...................... ± 10mA Input Voltage (Note 2) .......................................... ± 20V Output Short-Circuit Duration ......................... Indefinite Operating Temperature Range .............. – 55°C to 125°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C The wafer lots are processed to Linear Technology’s inhouse Class S flow to yield circuits usable in stringent military applications. , LTC and LT are registered trademarks of Linear Technology Corporation. U U BUR -I CIRCUIT (Each Amplifier) 10k 20V 2 20V 7 – 2 OR – 7 6 200Ω 3 6 249k + 3V 4 3 + 4 301Ω 10k –20V –20V RH118 BI W U U PACKAGE/ORDER INFORMATION TOP VIEW COMP2 TOP VIEW 8 COMP1 1 7 V+ – –IN 2 + 6 OUT 5 COMP3 +IN 3 4 V – (CASE) H PACKAGE 8-LEAD TO-5 METAL CAN TOP VIEW COMP1 1 8 COMP2 NC 1 10 –IN 2 7 V+ COMP1 2 9 COMP3 +IN 3 6 OUT –INPUT 3 8 V+ V– 4 5 COMP3 +INPUT 4 7 OUTPUT V– 5 6 COMP2 J8 PACKAGE 8-LEAD CERDIP NC W PACKAGE 10-LEAD CERPAC 1 RH118 TABLE 1: ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS NOTES (Preirradiation) (Note 3) MIN SUB- – 55°C T A 125°C GROUP MIN TYP MAX TA = 25°C TYP MAX SUBGROUP UNITS VOS Input Offset Voltage 4 1 6 2,3 mV IOS Input Offset Current 50 1 100 2,3 nA IB Input Bias Current 250 1 500 2,3 nA RIN Input Resistance AV Large-Signal Voltage Gain VS = ± 15V, VOUT = ± 10V RL 2k SR Slew Rate VS = ± 15V, AV = 1 GBW Gain Bandwidth Product VS = ± 15V Output Voltage Swing VS = ± 15V, RL = 2k Input Voltage Range VS = ± 20V IS 4 1 M 50 5 1 25 2,3 V/mV 50 V/µs 15 MHz ± 12 4 ± 12 5,6 V ± 16.5 1 ± 16.5 2,3 V Supply Current 8 1 mA TA = 125°C 7 2 mA CMRR Common Mode Rejection Ratio 80 1 80 2,3 dB PSRR Power Supply Rejection Ratio 70 1 70 2,3 dB TABLE 1A: ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS (Postirradiation) (Note 6) 10Krad(Si) 20Krad(Si) NOTES MIN MAX MIN MAX 50Krad(Si) 100Krad(Si) 200Krad(Si) MIN MAX MIN MAX MIN MAX UNITS VOS Input Offset Voltage 4 4 4 4 10 mV IOS Input Offset Current 50 50 50 50 100 nA IB Input Bias Current 250 250 250 300 400 nA RIN Input Resistance AV Large-Signal Voltage Gain VS = ± 15V, VOUT = ± 10V RL 2k SR Slew Rate VS = ± 15V, AV = 1 GBW Gain Bandwidth Product VS = ± 15V Output Voltage Swing VS = ± 15V, RL = 2k Input Voltage Range 4 5 1 1 1 0.5 0.5 M 50 50 50 50 25 V/mV 50 50 50 50 50 V/µs 15(Typ) 15(Typ) 15(Typ) 15(Typ) 15(Typ) MHz ±12 ±12 ±12 ±12 ±12 V ±16.5 ±16.5 ±16.5 ±15 ±12 V IS Supply Current CMRR Common Mode Rejection Ratio 80 80 80 80 70 dB PSRR Power Supply Rejection Ratio 70 70 70 70 60 dB 2 8 8 8 8 8 mA RH118 ELECTRICAL CHARACTERISTICS (Continued) Note 1: The inputs are shunted with back-to-back Zeners for overvoltage protection. Excessive current will flow if a differential voltage greater than 5V is applied to the inputs. Note 2: For supply voltages less than ± 15V, the maximum input voltage is equal to the supply voltage. Note 3: These specifications apply for ± 5V V S ± 20V. The power supplies must be bypassed with a 0.1µF or greater disc capacitor within four inches of the device. Note 4: Guaranteed by design, characterization or correlation to other tested parameters. Note 5: Slew rate is 100% tested at wafer probe testing. It is QA sample tested in finished package form. Note 6: TA = 25°C, VS = ± 20V, VCM = 0V, unless otherwise specified. Supply bypassed per Note 3. TOTAL DOSE BIAS CIRCUIT 10k 15V 2 – 7 6 10k 3 8V + 0.1µF 4 0.1µF RH118 TDBC –15V U W TABLE 2: ELECTRICAL TEST REQUIRE E TS MIL-STD-883 TEST REQUIREMENTS SUBGROUP Final Electrical Test Requirements (Method 5004) 1*,2,3,4,5,6 Group A Test Requirements (Method 5005) 1,2,3,4,5,6 Group C and D End Point Electrical Parameters (Method 5005) * PDA Applies to subgroup 1. See PDA Test Notes. 1 PDA Test Notes The PDA is specified as 5% based on failures from group A, subgroup 1, tests after cooldown as the final electrical test in accordance with method 5004 of MIL-STD-883 Class B. The verified failures (including Delta parameters) of group A, subgroup 1, after burn-in divided by the total number of devices submitted for burn-in in that lot shall be used to determine the percent for the lot. Linear Technology Corporation reserves the right to test to tighter limits than those given. Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 3 RH118 U W TYPICAL PERFORMANCE CHARACTERISTICS Input Offset Voltage 60 V S = ±20V VCM = 0V 2 0 –2 INPUT OFFSET CURRENT (nA) 500 INPUT BIAS CURRENT (nA) 400 300 200 100 –4 1 10 100 TOTAL DOSE Krad (Si) 0 1000 1 10 100 TOTAL DOSE Krad (Si) OPEN-LOOP GAIN (V/mV) V S = ±15V VO = ±10V RL = 2k 300 200 100 COMMON MODE REJECTION RATIO (dB) 110 –20 –40 10 100 TOTAL DOSE Krad (Si) 1 10 100 TOTAL DOSE Krad (Si) V S = ±20V VCM = ±16.5V 100 90 80 70 60 50 1000 RH118 G02 1000 RH118 G05 Power Supply Rejection Ratio 40 1 0 Common Mode Rejection Ratio Open-Loop Gain 0 20 RH118 G03 RH118 G01 400 V S = ±20V VCM = 0V 40 –60 1000 110 POWER SUPPLY REJECTION RATIO (dB) INPUT OFFSET VOLTAGE (mV) V S = ±20V VCM = 0V 4 –6 Input Offset Current Input Bias Current 600 6 100 90 80 70 60 50 V S = ±5V TO ±20V 40 1 10 100 TOTAL DOSE Krad (Si) 1000 RH118 G04 1 10 100 TOTAL DOSE Krad (Si) 1000 RH118 G06 I.D. No. 66-11-0118 Rev. A 0796 4 Linear Technology Corporation LT/HP 0796 REV A 500 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977 LINEAR TECHNOLOGY CORPORATION 1989