RH1011 - Voltage Comparator

RH1011
Voltage Comparator
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DESCRIPTION
ABSOLUTE MAXIMUM RATINGS
The RH1011 is a general purpose comparator with significantly better input characteristics than the LM111. Although pin compatible with the LM111, it offers four times
lower bias current, six times lower offset voltage and five
times higher voltage gain.
Supply Voltage (Pin 8 to Pin 4) ............................... 36V
Output to Negative Supply (Pin 7 to Pin 4) ............. 35V
Ground to Negative Supply (Pin 1 to Pin 4) ............ 30V
Differential Input Voltage ....................................... ±35V
Voltage at STROBE Pin (Pin 6 to Pin 8) .................... 5V
Input Voltage (Note 1) ....................... Equal to Supplies
Output Short-Circuit Duration ............................. 10 sec
Operating Temperature Range
(Note 2) ........................................... – 55°C to 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
The wafer lots are processed to Linear Technology’s inhouse Class S flow to yield circuits usable in stringent
military applications.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
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BUR -I CIRCUIT
15V
15V
1.3k
50k
2
8
+
7
200Ω
50k
3
–
100k
50k
5
2V
3
8
–
7
OR
2
1
1
+
4
4
–15V
–15V
604Ω
RH1011 BI
W
PACKAGE I FOR ATIO
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TOP VIEW
V+
8
7 OUTPUT
GND 1
+
+INPUT 2
–INPUT 3
6
–
TOP VIEW
TOP VIEW
BALANCE/
STROBE
5 BALANCE
GND 1
8
V+
+INPUT 2
7
OUTPUT
BALANCE/
STROBE
BALANCE
–INPUT 3
6
V– 4
5
4
V–
H PACKAGE
8-LEAD TO-5 METAL CAN
J8 PACKAGE
8-LEAD CERDIP
10 V +
GND 1
+INPUT 2
+
–INPUT 3
–
NC 4
V– 5
9 OUTPUT
8 NC
BALANCE/
7 STROBE
6 BALANCE
W PACKAGE
10-LEAD CERPAC
1
RH1011
TABLE 1: ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
CONDITIONS
NOTES
(Preirradiation) (Note 10)
MIN
TA = 25°C
TYP MAX
SUB- – 55°C ≤ TA ≤ 125°C SUBGROUP MIN TYP MAX
GROUP
UNITS
VOS
Input Offset Voltage
IOS
Input Offset Current
IB
Input Bias Current
ΔVOS
ΔT
Input Offset Voltage Drift
TMIN ≤ T ≤ TMAX
AVOL
Large Signal Voltage Gain
VS = ±15V, RL = 1kΩ,
– 10V ≤ VOUT ≤ 14.5V
200
4
V/mV
VS = 5V, RL = 500Ω,
0.5V ≤ VOUT ≤ 4.5V
50
4
V/mV
90
1
dB
CMRR
RS ≤ 50kΩ
3
4
1.5
2.0
1
1
3.0
3.0
2,3
2,3
mV
mV
3,4
4
1
20
2,3
nA
3
4
50
65
1
1
80
80
2,3
2,3
nA
nA
5,9
Common Mode Rejection
Ratio
Input Voltage Range
VS = ±15V
VS = Single 5V
td
Response Time
VOL
Output Saturation Voltage
VIN = –5mV, ISINK = 8mA
ISINK = 50mA
Output Leakage Current
VIN = 5mV, VGND = – 15V,
VOUT = 20V
μV/°C
25
8,9
8,9
– 14.5
0.5
13
3.0
– 14.5
0.5
13
3.0
V
V
6,9
250
ns
11
0.4
1.5
1
1
0.5
1.5
2,3
2,3
V
V
10
1
500
2,3
nA
Positive Supply Current
11
4.0
1
mA
Negative Supply Current
11
2.5
1
mA
Strobe Current
Minimum to Ensure Output
Transistor is Turned Off
7,9,11
μA
500
Input Capacitance
6
TABLE 1A: ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
CONDITIONS
pF
(Postirradiation) (Note 10)
10Krad(Si)
20Krad(Si)
NOTES MIN MAX MIN MAX
50Krad(Si) 100Krad(Si) 200Krad(Si)
MIN MAX MIN MAX MIN MAX UNITS
VOS
Input Offset Voltage
1.5
1.5
1.5
2.5
4
mV
IOS
Input Offset Current
4
4
4
20
50
nA
IB
Input Bias Current
50
100
150
200
300
nA
AVOL
Large-Signal Voltage
Gain
CMRR
Common Mode
Rejection Ratio
VOL
2
RL = 1kΩ,
– 10V ≤ VOUT ≤ 14.5V
Input Voltage Range
VS = ±15V
VS = Single 5V
8,9
Output Saturation
Voltage
VIN = –5mV, ISINK = 8mA
ISINK = 50mA
11
Output Leakage
Current
VIN = 5mV, VGND = – 15V
VOUT = 20V
200
200
150
100
50
V/mV
90
90
90
90
86
dB
– 14.5
0.5
13 – 14.5
3.0 0.5
13
3.0
– 14.5 13 – 14.5 13 – 14.5
0.5 3.0 0.5 3.0 0.5
0.4
1.5
0.4
1.5
0.4
1.5
10
10
100
13
3.0
V
V
0.4
1.5
0.4
1.5
V
V
100
100
nA
RH1011
TABLE 1A: ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
CONDITIONS
(Postirradiation) (Note 10)
10Krad(Si)
20Krad(Si)
NOTES MIN MAX MIN MAX
50Krad(Si) 100Krad(Si) 200Krad(Si)
MIN MAX MIN MAX MIN MAX UNITS
Positive Supply Current
11
4.0
4.0
4.0
4.0
4.0
mA
Negative Supply Current
11
2.5
2.5
2.5
2.5
2.5
mA
Strobe Current
Minimum to Ensure Output 7,9,11
Transistor is Turned Off
500
Input Capacitance
500
6 (Typ)
500
6 (Typ)
6 (Typ)
500
6 (Typ)
μA
500
6 (Typ)
pF
Note 7: Do not short the STROBE pin to ground. It should be current
driven at 3mA to 5mA for the shortest strobe time. Currents as low as
500μA will strobe the RH1011 if speed is not important. External leakage
on the STROBE pin in excess of 0.2μA when the strobe is “off ” can cause
offset voltage shifts.
Note 8: See graph, Input Offset Voltage vs Common Mode Voltage on the
LT1011 data sheet.
Note 9: Guaranteed by design, characterization or correlation to other
tested parameters.
Note 10: VS = ±15V, VCM = 0V, RS = 0Ω, TA = 25°C, VGND = V–, output at
Pin 7, unless otherwise noted.
Note 11: VGND = 0V.
Note 1: Inputs may be clamped to supplies with diodes so that maximum
input voltage actually exceeds supply voltage by one diode drop. See Input
Protection discussion in the LT®1011 data sheet.
Note 2: TJMAX = 150°C.
Note 3: Output is sinking 1.5mA with VOUT = 0V.
Note 4: These specifications apply for all supply voltages from a single 5V
to ±15V, the entire input voltage range and for both high and low output
states. The high state is ISINK = 100μA, VOUT = (V + – 1V) and the low state
is ISINK = 8mA, VOUT = 0.8V. Therefore, this specication defines a worstcase error band that includes effects due to common mode signals,
voltage gain and output load.
Note 5: Drift is calculated by dividing the offset difference measured at
minimum and maximum temperatures by the temperature difference.
Note 6: Response time is measured with a 100mV step and 5mV
overdrive. The output load is a 500Ω resistor tied to 5V. Time
measurement is taken when the output crosses 1.4V.
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TABLE 2: ELECTRICAL TEST REQUIRE E TS
MIL-STD-883 TEST REQUIREMENTS
PDA Test Notes
The PDA is specified as 5% based on failures from group A, subgroup 1,
tests after cooldown as the final electrical test in accordance with method
5004 of MIL-STD-883 Class B. The verified failures (including Delta
parameters) of group A, subgroup 1, after burn-in divided by the total
number of devices submitted for burn-in in that lot shall be used to
determine the percent for the lot.
Linear Technology Corporation reserves the right to test to tighter limits
than those given.
SUBGROUP
Final Electrical Test Requirements (Method 5004)
1*,2,3,4
Group A Test Requirements (Method 5005)
1,2,3,4
Group B and D End Point Electrical Parameters
(Method 5005)
1,2,3
* PDA Applies to subgroup 1. See PDA Test Notes.
TOTAL DOSE BIAS CIRCUIT
12V
5.1k
12Ω
2
5.1k
8
+
7
3
1
–
4
12Ω
–12V
RH1011 TDBC
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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RH1011
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TYPICAL PERFORMANCE CHARACTERISTICS
Input Offset Voltage
V S = ±15V
VCM = 0V
300
INPUT BIAS CURRENT (nA)
INPUT OFFSET VOLTAGE (mV)
30
V S = ±15V
RS = 0Ω
VCM = 0V
(3 TYPICAL UNITS)
6
Input Offset Current
Input Bias Current
4
2
0
–2
V S = ±15V
VCM = 0V
20
INPUT OFFSET CURRENT (nA)
8
200
100
–4
10
0
–10
–20
–30
–6
–40
0
1
10
100
TOTAL DOSE KRAD (Si)
1000
10
100
TOTAL DOSE KRAD (Si)
1
RH1011 G01
1000
1000
RH1011 G03
RH1011 G02
Common Mode Rejection Ratio
Voltage Gain
130
V S = ±15V
RL = 1k
VCM = 0V
600
500
400
300
200
100
COMMON MODE REJECTION RATIO (dB)
700
VOLTAGE GAIN (V/mV)
10
100
TOTAL DOSE KRAD (Si)
1
V S = ±15V
VCM = –14.5V TO 13V
120
110
100
90
80
70
60
0
1
10
100
TOTAL DOSE KRAD (Si)
1000
RH1011 G04
1
10
100
TOTAL DOSE KRAD (Si)
1000
RH1011 G05
I.D. No. 66-10-0159 Rev. D 0308
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Linear Technology Corporation
LT/LT 0308 REV D • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
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© LINEAR TECHNOLOGY CORPORATION 1989