IRF IRL2910S

PD - 91376C
IRL2910S/L
Logic-Level Gate Drive
Surface Mount
l Advanced Process Technology
l Ultra Low On-Resistance
l Dynamic dv/dt Rating
l Fast Switching
l Fully Avalanche Rated
Description
HEXFET® Power MOSFET
l
D
l
VDSS = 100V
RDS(on) = 0.026Ω
G
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible onresistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0W in a typical surface mount application.
The through-hole version (IRL2910L) is available for lowprofile applications.
ID = 55A
S
D 2 Pak
TO-262
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TA = 25°C
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ 10V…
Continuous Drain Current, VGS @ 10V…
Pulsed Drain Current …
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy‚…
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt ƒ…
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
55
39
190
3.8
200
1.3
± 16
520
29
20
5.0
-55 to + 175
Units
A
W
W
W/°C
V
mJ
A
mJ
V/ns
300 (1.6mm from case )
°C
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
Max.
Units
–––
–––
0.75
40
°C/W
10/09/03
IRL2910S/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
100
–––
–––
–––
–––
1.0
28
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
LS
Internal Source Inductance
–––
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
V(BR)DSS
IGSS
Typ.
–––
0.12
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
11
100
49
55
Max. Units
Conditions
–––
V
V GS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA…
0.026
V GS = 10V, ID = 29A „
0.030
Ω
V GS = 5.0V, ID = 29A „
0.040
V GS = 4.0V, ID = 24A „
2.0
V
V DS = V GS, ID = 250µA
–––
S
V DS = 50V, ID = 29A…
25
V DS = 100V, VGS = 0V
µA
250
V DS = 80V, VGS = 0V, TJ = 150°C
100
VGS = 16V
nA
-100
V GS = -16V
140
ID = 29A
20
nC V DS = 80V
81
V GS = 5.0V, See Fig. 6 and 13 „…
–––
V DD = 50V
–––
ID = 29A
ns
–––
RG = 1.4Ω, VGS = 5.0V
–––
RD = 1.7Ω, See Fig. 10 „…
Between lead,
7.5 –––
nH and center of die contact
3700 –––
V GS = 0V
630 –––
pF
V DS = 25V
330 –––
ƒ = 1.0MHz, See Fig. 5…
Source-Drain Ratings and Characteristics
IS
I SM
VSD
t rr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) …
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– –––
55
showing the
A
G
integral reverse
––– ––– 190
S
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 29A, VGS = 0V „
––– 240 350
ns
TJ = 25°C, IF = 29A
––– 1.8 2.7
µC di/dt = 100A/µs „ …
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
… Uses IRL2910 data and test conditions
‚ VDD = 25V, starting TJ = 25°C, L = 1.2mH
RG = 25Ω, IAS = 29A. (See Figure 12)
ƒ ISD ≤ 29A, di/dt ≤ 490A/µs, VDD ≤ V(BR)DSS,
T J ≤ 175°C
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
IRL2910S/L
1000
1000
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
TOP
ID , Drain-to-Source Current (A)
ID , Drain-to-Source Current (A)
TOP
100
10
2.5V
20µs PULSE WIDTH
T J = 25°C
1
0.1
1
10
100
10
2.5V
A
100
VDS , Drain-to-Source Voltage (V)
3.0
R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
TJ = 25°C
TJ = 175°C
10
V DS = 50V
20µs PULSE WIDTH
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
10
A
100
Fig 2. Typical Output Characteristics
1000
1
1
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
100
20µs PULSE WIDTH
T J = 175°C
1
0.1
6.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
A
I D = 48A
2.5
2.0
1.5
1.0
0.5
VGS = 10V
0.0
-60 -40 -20
0
20
40
60
A
80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
IRL2910S/L
6000
VGS , Gate-to-Source Voltage (V)
5000
C, Capacitance (pF)
15
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
Ciss C oss = C ds + C gd
4000
3000
Coss
2000
Crss
1000
0
1
10
100
I D = 29A
V DS = 80V
V DS = 50V
V DS = 20V
12
9
6
3
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
0
80
120
160
A
200
Q G , Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
1000
OPERATION IN THIS AREA LIMITED
BY R DS(on)
I D , Drain Current (A)
ISD , Reverse Drain Current (A)
40
100
TJ = 175°C
TJ = 25°C
VGS = 0V
10
0.4
0.8
1.2
1.6
VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
A
2.0
10µs
100
100µs
1ms
10
10ms
TC = 25°C
TJ = 175°C
Single Pulse
1
1
10
100
A
1000
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
IRL2910S/L
50
RD
V DS
VGS
ID, Drain Current (Amps)
40
D.U.T.
RG
30
+
-VDD
5.0V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
20
Fig 10a. Switching Time Test Circuit
10
VDS
90%
A
0
25
50
75
100
125
150
175
TC , Case Temperature (°C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (ZthJC )
10
1
D = 0.50
0.20
0.1
PDM
0.10
t
0.05
0.02
0.01
0.01
0.00001
Notes:
1. Duty factor D = t
SINGLE PULSE
(THERMAL RESPONSE)
1
/t
1
t2
2
2. Peak TJ = P DM x Z thJC + T C
0.0001
0.001
0.01
0.1
1
t 1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
A
10
15V
L
VDS
D.U.T
RG
IAS
20V
DRIVER
+
V
- DD
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
A
EAS , Single Pulse Avalanche Energy (mJ)
IRL2910S/L
1400
TOP
1200
BOTTOM
ID
12A
20A
29A
1000
800
600
400
200
0
VDD = 25V
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
tp
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
5.0 V
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
A
175
IRL2910S/L
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
ƒ
+
‚
-
-
„
+

RG
•
•
•
•
Driver Gate Drive
Period
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D=
-
VDD
P.W.
Period
VGS=10V
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
ISD
*
IRL2910S/L
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
T HIS IS AN IRF530S WIT H
LOT CODE 8024
ASS EMBLED ON WW 02, 2000
IN T HE ASS EMBLY LINE "L"
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMBER
F530S
DAT E CODE
YEAR 0 = 2000
WEEK 02
LINE L
AS SEMBLY
LOT CODE
For GB Production
T HIS IS AN IRF530S WIT H
LOT CODE 8024
ASS EMBLED ON WW 02, 2000
IN T HE ASS EMBLY LINE "L"
INT ERNAT IONAL
RECT IFIER
LOGO
LOT CODE
PART NUMBER
F530S
DAT E CODE
IRL2910S/L
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
IGBT
1- GATE
2- COLLECTOR
3- EMITTER
TO-262 Part Marking Information
EXAMPLE: T HIS IS AN IRL3103L
LOT CODE 1789
ASS EMBLED ON WW 19, 1997
IN THE ASS EMBLY LINE "C"
INT ERNATIONAL
RECTIFIER
LOGO
AS SEMBLY
LOT CODE
PART NUMBER
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
IRL2910S/L
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
1.65 (.065)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
3
4
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 10/03