PD - 95381
Logic-Level Gate Drive
Advanced Process Technology
l Surface Mount (IRL3705NS)
l Low-profile through-hole (IRL3705NL)
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
l Lead-Free
Description
IRL3705NSPbF
IRL3705NLPbF
l
l
HEXFET® Power MOSFET
D
VDSS = 55V
RDS(on) = 0.01Ω
G
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible onresistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
The through-hole version (IRL3705NL) is available for lowprofile applications.
ID = 89A
S
D 2 Pak
TO-262
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TA = 25°C
PD @TC = 25°C
V GS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
89
63
310
3.8
170
1.1
± 16
340
46
1.7
5.0
-55 to + 175
Units
A
W
W
W/°C
V
mJ
A
mJ
V/ns
300 (1.6mm from case )
°C
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
Max.
Units
0.90
40
°C/W
06/08/04
IRL3705NS/LPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
55
1.0
50
LS
Internal Source Inductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V(BR)DSS
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
IGSS
Typ.
0.056
12
140
37
78
Max. Units
Conditions
V
VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 1mA
0.010
VGS = 10V, ID = 46A
0.012
Ω
VGS = 5.0V, ID = 46A
0.018
VGS = 4.0V, ID = 39A
2.0
V
VDS = VGS , ID = 250µA
S
VDS = 25V, ID = 46A
25
VDS = 55V, VGS = 0V
µA
250
VDS = 44V, V GS = 0V, TJ = 150°C
100
VGS = 16V
nA
-100
VGS = -16V
98
ID = 46A
19
nC VDS = 44V
49
VGS = 5.0V, See Fig. 6 and 13
VDD = 28V
ID = 46A
ns
RG = 1.8Ω, VGS = 5.0V
RD = 0.59Ω, See Fig. 10
Between lead,
7.5
nH
and center of die contact
3600
VGS = 0V
870
pF
VDS = 25V
320
= 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
I SM
V SD
t rr
Q rr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
89
showing the
A
G
integral reverse
310
S
p-n junction diode.
1.3
V
TJ = 25°C, IS = 46A, VGS = 0V
94 140
ns
TJ = 25°C, IF = 46A
290 440
nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
VDD = 25V, starting TJ = 25°C, L = 320µH
Uses IRL3705N data and test conditions
max. junction temperature. ( See fig. 11 )
RG = 25Ω, IAS = 46A. (See Figure 12)
ISD ≤ 46A, di/dt ≤ 250A/µs, VDD ≤ V(BR)DSS,
Calculated continuous current based on maximum allowable
junction temperature; for recommended current-handling of the
package refer to Design Tip # 93-4
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
TJ ≤ 175°C
IRL3705NS/LPbF
1000
1000
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
ID , Drain-to-Source Current (A)
ID , Drain-to-Source Current (A)
100
10
2.5V
20µs PULSE WIDTH
T J = 25°C
1
0.1
1
10
100
A
100
R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
TJ = 25°C
TJ = 175°C
10
V DS= 25V
20µs PULSE WIDTH
4.0
5.0
6.0
7.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
10
A
100
Fig 2. Typical Output Characteristics
3.0
3.0
1
VDS , Drain-to-Source Voltage (V)
1000
1
20µs PULSE WIDTH
T J = 175°C
1
0.1
Fig 1. Typical Output Characteristics
100
2.5V
10
VDS , Drain-to-Source Voltage (V)
2.0
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
TOP
TOP
8.0
A
I D = 77A
2.5
2.0
1.5
1.0
0.5
VGS = 10V
0.0
-60 -40 -20
0
20
40
60
A
80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
IRL3705NS/LPbF
6000
V GS , Gate-to-Source Voltage (V)
5000
C, Capacitance (pF)
15
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
Ciss C oss = C ds + C gd
Coss
2000
Crss
1000
0
10
9
6
3
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
1
V DS = 44V
V DS = 28V
12
4000
3000
I D = 46A
0
100
VDS , Drain-to-Source Voltage (V)
40
60
80
100
120
A
140
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
OPERATION IN THIS AREA LIMITED
BY R DS(on)
I D , Drain Current (A)
ISD , Reverse Drain Current (A)
20
100
TJ = 175°C
TJ = 25°C
10µs
100
100µs
1ms
10
10ms
VGS = 0V
10
0.4
0.8
1.2
1.6
2.0
2.4
VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
A
2.8
TC = 25°C
TJ = 175°C
Single Pulse
1
1
A
10
100
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
IRL3705NS/LPbF
RD
100
V DS
LIMITED BY PACKAGE
V GS
80
D.U.T.
I D , Drain Current (A)
RG
60
+
V
- DD
5.0V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
40
Fig 10a. Switching Time Test Circuit
20
VDS
90%
0
25
50
75
100
125
150
175
TC , Case Temperature ( °C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
10%
VGS
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.01
0.00001
0.10
0.05
0.02
0.01
PDM
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1
15V
DRIVER
L
VDS
D.U.T
RG
IAS
10V
tp
+
V
- DD
A
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
E AS , Single Pulse Avalanche Energy (mJ)
IRL3705NS/LPbF
800
TOP
BOTTOM
600
400
200
0
VDD = 25V
25
50
A
75
100
125
150
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Current Regulator
Same Type as D.U.T.
Fig 12b. Unclamped Inductive Waveforms
50KΩ
QG
12V
.2µF
.3µF
5.0 V
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
175
Starting TJ , Junction Temperature (°C)
V(BR)DSS
tp
ID
19A
33A
46A
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
IRL3705NS/LPbF
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D.U.T
+
-
-
+
RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
Period
D=
+
-
V DD
P.W.
Period
VGS=10V
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
* VGS
= 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
ISD
*
IRL3705NS/LPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
T HIS IS AN IRF 530S WIT H
LOT CODE 8024
ASS E MBL ED ON WW 02, 2000
IN T HE AS S E MBLY L INE "L"
INT E RNAT IONAL
RECT IF IE R
LOGO
Note: "P" in as s embly line
pos ition indicates "Lead-F ree"
PART NUMBE R
F 530S
AS S EMB LY
LOT CODE
OR
INT ERNAT IONAL
RE CT IF IER
LOGO
AS S E MBLY
LOT CODE
PAR T NUMBER
F530S
DAT E CODE
P = DE S IGNAT ES LEAD-F REE
PRODU CT (OPT IONAL)
YEAR 0 = 2000
WEEK 02
A = AS S EMBLY S ITE CODE
DAT E CODE
YEAR 0 = 2000
WE EK 02
LINE L
IRL3705NS/LPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
E XAMPL E: T HIS IS AN IRL 3103L
LOT CODE 1789
AS S E MB L ED ON WW 19, 1997
IN T HE AS S E MBL Y LINE "C"
Note: "P" in ass embly line
pos ition indicates "Lead-F ree"
INT E RNAT IONAL
RE CT IF IER
LOGO
AS S EMBL Y
L OT CODE
PART NUMBE R
DAT E CODE
YE AR 7 = 1997
WE EK 19
L INE C
OR
INT ERNAT IONAL
RE CT IF IER
L OGO
AS S E MB LY
L OT CODE
PART NUMB ER
DAT E CODE
P = DES IGNAT ES L EAD-FREE
PRODUCT (OPT IONAL )
YE AR 7 = 1997
WEE K 19
A = AS S E MB LY S IT E CODE
IRL3705NS/LPbF
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
1.65 (.065)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
3
4
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 06/04