IRF IRF634NSTRR

PD - 94310
Advanced Process Technology
Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
l Ease of Paralleling
l Simple Drive Requirements
Description
IRF634N
IRF634NS
IRF634NL
l
HEXFET® Power MOSFET
l
D
RDS(on) = 0.435Ω
G
Fifth Generation HEXFET® Power MOSFETs from International
Rectifier utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized device
design that HEXFET Power MOSFETs are well known for,
provides the designer with an extremely efficient and reliable
device for use in a wide variety of applications.
The TO-220 package is universally preferred for all commercialindustrial applications at power dissipation levels to
approximately 50 watts. The low thermal resistance and low
package cost of the TO-220 contribute to its wide acceptance
throughout the industry.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the highest
power capability and the lowest possible on-resistance in any
existing surface mount package. The D2Pak is suitable for high
current applications because of its low internal connection
resistance and can dissipate up to 2.0W in a typical surface
mount application.
The through-hole version (IRF634NL) is available for lowprofile application.
VDSS = 250V
ID = 8.0A
S
TO-220AB
IRF634N
D2Pak
IRF634NS
TO-262
IRF634NL
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
PD @TA = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
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Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current 
Power Dissipation
Power Dissipation…
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy‚
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew„
Max.
8.0
5.6
32
88
3.8
0.59
± 20
110
4.8
8.8
7.3
-55 to +175
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
1
9/10/01
IRF634N/S/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
V(BR)DSS
∆V(BR)DSS/∆TJ
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
LD
Internal Drain Inductance
LS
Internal Source Inductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
IGSS
Min. Typ. Max. Units
Conditions
250 ––– –––
V
VGS = 0V, I D = 250µA
––– 0.33 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 0.435
Ω
VGS = 10V, I D = 4.8A ƒ
2.0
––– 4.0
V
VDS = VGS , ID = 250µA
5.4
––– –––
S
VDS = 50V, ID = 4.8A ƒ
––– ––– 25
VDS = 250V, VGS = 0V
µA
––– ––– 250
VDS = 200V, VGS = 0V, T J = 150°C
––– ––– 100
VGS = 20V
nA
––– ––– -100
VGS = -20V
––– ––– 34
ID = 4.8A
––– ––– 6.5
nC
VDS = 200V
––– ––– 16
VGS = 10V, See Fig. 6 and 13
–––
8.4 –––
VDD = 125V
–––
16 –––
ID = 4.8A
ns
–––
28 –––
RG = 1.3Ω
–––
15 –––
VGS = 10V, See Fig. 10 ƒ
D
Between lead,
4.5 –––
–––
6mm (0.25in.)
nH
G
from package
–––
7.5 –––
and center of die contact
S
––– 620 –––
VGS = 0V
–––
84 –––
VDS = 25V
–––
23 –––
pF
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 8.0
showing the
A
G
integral reverse
––– –––
32
S
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 4.8A, VGS = 0V ƒ
––– 130 200
ns
TJ = 25°C, I F = 4.8A
––– 650 980
nC
di/dt = 100A/µs ƒ
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Thermal Resistance
RθJC
RθCS
RθJA
RθJA
2
Parameter
Typ.
Max.
Junction-to-Case
Case-to-Sink, Flat, Greased Surface „
Junction-to-Ambient„
Junction-to-Ambient (PCB mount)…
–––
0.50
–––
–––
1.7
–––
62
40
Units
°C/W
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IRF634N/S/L
100
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
10
1
4.5V
0.1
20µs PULSE WIDTH
TJ = 25 °C
0.01
0.1
1
10
10
4.5V
1
3.5
R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
TJ = 175 ° C
1
TJ = 25 ° C
V DS = 50V
20µs PULSE WIDTH
5.0
6.0
7.0
8.0
Fig 3. Typical Transfer Characteristics
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10
100
Fig 2. Typical Output Characteristics
100
VGS , Gate-to-Source Voltage (V)
1
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
0.1
4.0
20µs PULSE WIDTH
TJ = 175 °C
0.1
0.1
100
VDS , Drain-to-Source Voltage (V)
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
9.0
ID = 7.9A
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRF634N/S/L
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
1000
C, Capacitance(pF)
Coss = Cds + Cgd
Ciss
800
600
Coss
400
Crss
200
VGS , Gate-to-Source Voltage (V)
20
1200
10
100
VDS = 200V
VDS = 125V
VDS = 50V
16
12
8
4
0
1
ID = 4.8A
FOR TEST CIRCUIT
SEE FIGURE 13
0
1000
0
10
VDS , Drain-to-Source Voltage (V)
100
10
TJ = 175 ° C
1
TJ = 25 ° C
V GS = 0 V
0.4
0.6
0.8
1.0
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
ID , Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
100
VSD ,Source-to-Drain Voltage (V)
30
40
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
0.1
0.2
20
QG , Total Gate Charge (nC)
OPERATION IN THIS AREA
LIMITED BY R DS (on)
10
100µsec
1
1msec
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
1.2
1
10msec
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRF634N/S/L
10.0
VDS
VGS
I D , Drain Current (A)
8.0
RD
D.U.T.
RG
+
-VDD
6.0
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
4.0
Fig 10a. Switching Time Test Circuit
2.0
VDS
90%
0.0
25
50
75
100
125
150
175
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
1
D = 0.50
0.20
0.10
P DM
0.05
0.1
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
0.01
0.00001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF634N/S/L
200
D R IV E R
L
VDS
D .U .T
RG
+
- VD D
IA S
2V0GS
V
A
0 .0 1 Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS
tp
EAS , Single Pulse Avalanche Energy (mJ)
1 5V
TOP
160
BOTTOM
ID
2.0A
3.4A
4.8A
120
80
40
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( °C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
QG
10 V
50KΩ
12V
.2µF
.3µF
QGS
QGD
D.U.T.
VG
+
V
- DS
VGS
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRF634N/S/L
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
ƒ
+
‚
-
-
„
+

•
•
•
•
RG
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
D=
Period
+
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRF634N/S/L
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
2 .8 7 (.1 1 3 )
2 .6 2 (.1 0 3 )
1 0 .5 4 (.4 1 5 )
1 0 .2 9 (.4 0 5 )
-B -
3 .7 8 (.1 4 9 )
3 .5 4 (.1 3 9 )
4 .6 9 (.1 8 5 )
4 .2 0 (.1 6 5 )
-A -
1 .3 2 (.05 2 )
1 .2 2 (.04 8 )
6 .4 7 (.2 5 5 )
6 .1 0 (.2 4 0 )
4
1 5 .2 4 (.6 0 0 )
1 4 .8 4 (.5 8 4 )
1 .1 5 (.0 4 5 )
M IN
1
2
L E A D A S S IG N M E N T S
1 - GATE
2 - D R A IN
3 - S OU R CE
4 - D R A IN
3
1 4 .0 9 (.5 5 5 )
1 3 .4 7 (.5 3 0 )
4 .0 6 (.1 6 0 )
3 .5 5 (.1 4 0 )
3X
1 .4 0 (.0 5 5 )
3X
1 .1 5 (.0 4 5 )
0 .93 (.0 3 7 )
0 .69 (.0 2 7 )
0 .3 6 (.0 1 4 )
3X
M
B
A M
0.5 5 (.0 2 2 )
0.4 6 (.0 1 8 )
2 .9 2 (.11 5 )
2 .6 4 (.10 4 )
2 .5 4 (.1 0 0 )
2X
N O TE S :
1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 .
2 C O N T R O L L IN G D IM E N S IO N : IN C H
3 O U T L IN E C O N F O R M S T O J E D E C O U T L IN E T O -2 2 0 A B .
4 H E A T S IN K & L E A D M E A S U R E M E N T S D O N O T IN C L U D E B U R R S .
TO-220AB Part Marking Information
EXAMPLE: T HIS IS AN IRF1010
LOT CODE 1789
ASS EMBLED ON WW 19, 1997
IN T HE ASSEMBLY LINE "C"
INT ERNATIONAL
RECT IFIER
LOGO
ASS EMBLY
LOT CODE
8
PART NUMBER
DAT E CODE
YEAR 7 = 1997
WEEK 19
LINE C
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IRF634N/S/L
D2Pak Package Outline
D2Pak Part Marking Information
THIS IS AN IRF530S WITH
LOT CODE 8024
AS S EMBLED ON WW 02, 2000
IN THE AS S EMBLY LINE "L"
INT ERNATIONAL
RECT IFIER
LOGO
AS S EMBLY
LOT CODE
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PART NUMBER
F530S
DAT E CODE
YEAR 0 = 2000
WEEK 02
LINE L
9
IRF634N/S/L
TO-262 Package Outline
TO-262 Part Marking Information
EXAMPLE: T HIS IS AN IRL3103L
LOT CODE 1789
AS SEMBLED ON WW 19, 1997
IN T HE ASS EMBLY LINE "C"
INT ERNAT IONAL
RECT IFIER
LOGO
AS SEMBLY
LOT CODE
10
PART NUMBER
DAT E CODE
YEAR 7 = 1997
WEEK 19
LINE C
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IRF634N/S/L
D2Pak Tape & Reel Information
TR R
1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
4 .1 0 ( .1 6 1 )
3 .9 0 ( .1 5 3 )
F E E D D IR E C TIO N 1 .8 5 ( .0 7 3 )
1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
1 1.6 0 (.4 57 )
1 1.4 0 (.4 49 )
1 .6 5 ( .0 6 5 )
0.3 6 8 (.01 4 5 )
0.3 4 2 (.01 3 5 )
1 5 .42 (.60 9 )
1 5 .22 (.60 1 )
2 4 .3 0 (.9 5 7 )
2 3 .9 0 (.9 4 1 )
TRL
1 0.9 0 (.4 2 9)
1 0.7 0 (.4 2 1)
1 .75 (.06 9 )
1 .25 (.04 9 )
4 .7 2 (.1 3 6)
4 .5 2 (.1 7 8)
16 .1 0 (.63 4 )
15 .9 0 (.62 6 )
F E E D D IR E C T IO N
13.50 (.532 )
12.80 (.504 )
2 7.4 0 (1.079 )
2 3.9 0 (.9 41)
4
3 30 .00
( 14.1 73 )
MAX.
Notes:
6 0.0 0 (2.36 2)
M IN .
N O TE S :
1 . CO M F OR M S TO E IA -418 .
2 . CO N TR O L LIN G D IM E N SIO N : M IL LIM E T ER .
3 . DIM E NS IO N M EA S UR E D @ H U B.
4 . IN C LU D ES FL AN G E DIST O R T IO N @ O UT E R E D G E.
 Repetitive rating; pulse width limited by
max. junction temperature.
26 .40 (1 .03 9)
24 .40 (.9 61 )
3
30.4 0 (1.19 7)
M A X.
4
ƒ Pulse width ≤ 400µs; duty cycle ≤ 2%.
„ This is only applied to TO-220A package
‚ Starting TJ = 25°C, L = 9.5mH
RG = 25Ω, IAS = 4.8A,VGS=10V
… This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] (IRF634N),
Industrial (IRF634NS and IRF634NL) market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 9/00
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