MOTOROLA MC13158FTB

Order this document by MC13158/D
The MC13158 is a wideband IF subsystem that is designed for high
performance data and analog applications. Excellent high frequency
performance is achieved, with low cost, through the use of Motorola’s
MOSAIC 1.5 RF bipolar process. The MC13158 has an on–board
grounded collector VCO transistor that may be used with a fundamental or
overtone crystal in single channel operation or with a PLL in multi–channel
operation. The mixer is useful to 500 MHz and may be used in a balanced
differential or single ended configuration. The IF amplifier is split to
accommodate two low cost cascaded filters. RSSI output is derived by
summing the output of both IF sections. A precision data shaper has an Off
function to shut the output off to save current. An enable control is provided
to power down the IC for power management in battery operated
applications.
Applications include DECT, wideband wireless data links for personal and
portable laptop computers and other battery operated radio systems which
utilize GFSK, FSK or FM modulation.
• Designed for DECT Applications
•
•
•
•
•
•
•
WIDEBAND FM IF
SUBSYSTEM FOR DECT
AND DIGITAL APPLICATIONS
SEMICONDUCTOR
TECHNICAL DATA
32
1
1.8 to 6.0 Vdc Operating Voltage
FTB SUFFIX
PLASTIC PACKAGE
CASE 873
(Thin QFP)
Low Power Consumption in Active and Standby Mode
Greater than 600 kHz Detector Bandwidth
Data Slicer with Special Off Function
Enable Function for Power Down of Battery Operated Systems
ORDERING INFORMATION
RSSI Dynamic Range of 80 dB Minimum
Device
Operating
Temperature Range
Package
MC13158FTB
TA = – 40 to +85°C
TQFP–32
Low External Component Count
Representative Block Diagram
Mix Out
Mix
In2
Mix
In1
N/C
32
31
30
Osc Osc
Emit Base N/C VEE1 Enable
29
28
27
26
25
1
24 RSSI
23 RSSI Buf
VCC1 2
IF Amp
IF In
IF Dec1
3
22 DS Gnd
MC13158
4
IF Dec2
5
IF Out
6
20 DS In2
19 DS “off”
LIM
Amp
VCC2 7
Lim In
21 DS Out
Data
Slicer
18 DS In1
17 Det Out
8
9
10
11
Lim Lim N/C
Dec1 Dec2
5.0 p
12
13
14
Bias
15
16
Lim Quad N/C Det VEE2
Gain
Out
This device contains 234 active transistors.
 Motorola, Inc. 1996
MOTOROLA ANALOG IC DEVICE DATA
Rev 1
1
MC13158
MAXIMUM RATINGS
Rating
Power Supply Voltage
Pin
Symbol
Value
Unit
16, 26
VS(max)
6.5
Vdc
TJMAX
+150
°C
Tstg
– 65 to +150
°C
Junction Temperature
Storage Temperature Range
NOTE:
1. Devices should not be operated at or outside these values. The “Recommended Operating
Conditions” provide for actual device operation.
RECOMMENDED OPERATING CONDITIONS (VCC = V2 = V7; VEE = V16 = V22 = V26; VS = VCC – VEE)
Rating
Pin
Symbol
Value
Unit
2, 7
VS
2.0 to 6.0
Vdc
Fin
10 to 500
MHz
TA
– 40 to + 85
°C
Vin
200
mVrms
Power Supply Voltage
TA = 25°C
– 40°C ≤ TA ≤ 85°C
16, 26
Input Frequency
31, 32
Ambient Temperature Range
Input Signal Level
31, 32
DC ELECTRICAL CHARACTERISTICS (TA = 25°C; VS = 3.0 Vdc; No Input Signal; See Figure 1.)
Characteristic
Total Drain Current
Condition
Pin
Symbol
Min
Typ
Max
Unit
VS = 2.0 Vdc
VS = 3.0 Vdc
VS = 6.0 Vdc
See Figure 2
16, 26
ITOTAL
2.5
3.5
3.5
5.5
5.7
6.0
8.5
8.5
9.5
mA
DATA SLICER (Input Voltage Referenced to VEE; VS = 3.0 Vdc; No Input Signal)
Output Current; V18 LO;
Data Slicer Enabled (DS “on”)
V19 = VEE
V18 < V20
V20 = VS/2
See Figure 3
21
I21
2.0
5.9
–
mA
Output Current; V18 HI;
Data Slicer Enabled (DS “on”)
V19 = VEE
V18 > V20
V20 = VS/2
See Figure 4
21
I21
–
0.1
1.0
µA
Output Current;
Data Slicer Disabled (DS “off”)
V19 = VCC
V20 = VS/2
21
I21
–
0.1
1.0
µA
AC ELECTRICAL CHARACTERISTICS (TA = 25°C; VS = 3.0 Vdc; fRF = 110.7 MHz; fLO = 100 MHz; See Figure 1.)
Characteristic
Condition
Pin
Symbol
Min
Typ
Max
Unit
Vin = 1.0 mVrms
See Figure 5
31, 32, 1
–
–
22
–
dB
Noise Figure
Input Matched
31, 32, 1
NF
–
14
–
dB
Mixer Input Impedance
Single–Ended
See Figure 15
31, 32
Rp
Cp
–
–
865
1.6
–
–
Ω
pF
1
–
–
330
–
Ω
MIXER
Mixer Conversion Gain
Mixer Output Impedance
2
MOTOROLA ANALOG IC DEVICE DATA
MC13158
AC ELECTRICAL CHARACTERISTICS (continued) (TA = 25°C; VS = 3.0 Vdc; fRF = 110.7 MHz; fLO = 100 MHz; See Figure 1.)
Characteristic
Condition
Pin
Symbol
Min
Typ
Max
Unit
IF RSSI Slope
See Figure 8
23
–
0.15
0.3
0.4
µA/dB
IF Gain
f = 10.7 MHz
See Figure 7
3, 6
–
–
36
–
dB
Input Impedance
3
–
–
330
–
Ω
Output Impedance
6
–
–
330
–
Ω
IF AMPLIFIER SECTION
LIMITING AMPLIFIER SECTION
Limiter RSSI Slope
See Figure 9
23
–
0.15
0.3
0.4
µA/dB
Limiter Gain
f = 10.7 MHz
8, 12
–
–
70
–
dB
8
–
–
330
–
Ω
Input Impedance
Figure 1. Test Circuit
LO Input
RF Input
110.7 MHz
100 MHz
200 mVrms
– 3.0 Vdc
1:4
50
– 2.3 Vdc
A
200
32
31
Mix
In1
Mix
In2
Mixer
Output
1
330
1.0 n
2
30
29
N/C
28
Osc
Emit
27
Osc
Base
N/C
Mix
Out
26
VEE1
Enable
RSSI
RSSI
Buf
VCC1
DS
Gnd
100 n
IF
Input
3
1.0 n
4
50
100 n
5
1.0 n
IF
Output
6
330
100 n
7
Limiter
Input
8
50
100 n
A
25
IF
In
DS
Out
MC13158 Data
Slicer
IF
Dec1
DS
In2
IF
Dec2
DS
“off”
IF
Out
DS
In1
Lim Amp
VCC2
Det
Out
5.0 p
Lim Lim
Lim
N/C
In Dec1 Dec2
10
11
9
Det
Lim
VEE2
N/C Gain Bias
Out Quad
13
15
16
12
14
0 to – 3.0 Vdc
24
100 µA
– 3.0 Vdc
23
22
21
A
20
–1.5 Vdc
19
– 3.0 Vdc
18
0 to – 3.0 Vdc
17
51 k
1.0 n
100 n
V
1.0 n
100 k
A
1.0 µH
200 pF
MOTOROLA ANALOG IC DEVICE DATA
6.8 k
– 3.0 Vdc
3
MC13158
Typical Performance Over Temperature
(per Figure 1)
Figure 3. Data Slicer On Output Current
versus Ambient Temperature
I TOTAL, TOTAL SUPPLY CURRENT (mA)
6.4
VS = 6.0 V
6.2
3.0 V
6.0
2.0 V
5.8
5.6
5.4
5.2
5.0
4.8
0
– 20
20
40
60
80
100
DATA SLICER OUTPUT CURRENT (mA)
Figure 2. Total Supply Current versus
Ambient Temperature, Supply Voltage
8.5
7.0
6.5
6.0
5.5
0
– 20
TA, AMBIENT TEMPERATURE (°C)
NORMALIZED MIXER GAIN (dB)
DATA SLICER OUTPUT CURRENT ( µ A)
0.08
0.06
0.04
– 20
0
20
40
60
80
100
100
120
0
– 0.1
– 0.2
– 0.3
Vin = 1.0 mVrms
VS = 3.0 Vdc
fc = 110.7 MHz
fLO = 100 MHz
– 0.4
– 0.5
– 20
0
20
40
60
80
100
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
Figure 6. Mixer RSSI Output Current versus
Ambient Temperature, Mixer Input Level
Figure 7. Normalized IF Amp Gain
versus Ambient Temperature
120
0.6
Vin = 10 mVrms
6.0
5.0
VS = 3.0 Vdc
fc = 110.7 MHz
fLO = 100 MHz
Vin = 1.0 mVrms
3.0
– 20
0
20
40
60
80
TA, AMBIENT TEMPERATURE (°C)
100
120
NORMALIZED IF AMP GAIN (dB)
MIXER RSSI OUTPUT CURRENT ( µ A)
80
0.1
– 0.6
– 40
120
7.0
4
60
0.2
V18 > V20
Data Slicer “On”
V19 = VCC
0.10 V20 = VS/2
2.0
– 40
40
Figure 5. Normalized Mixer Gain
versus Ambient Temperature
0.12
4.0
20
TA, AMBIENT TEMPERATURE (°C)
Figure 4. Data Slicer On Output Current
versus Ambient Temperature
0.02
– 40
V18 < V20
7.5
5.0
120
Data Slicer “On”
V19 = VEE
V20 = VS/2
8.0
0.4
VS = 3.0 Vdc
f = 10.7 MHz
Vin = 1.0 mVrms
0.2
0
– 0.2
– 0.4
– 0.6
– 0.8
– 40
– 20
0
20
40
60
80
100
120
TA, AMBIENT TEMPERATURE (°C)
MOTOROLA ANALOG IC DEVICE DATA
MC13158
tTypical Performance Over Temperature
(per Figure 1)
9.0
Vin = 10 mVrms
8.0
7.0
VS = 3.0 Vdc
f = 10.7 MHz
6.0
5.0
4.0
Vin = 1.0 mVrms
3.0
2.0
– 40
– 20
0
20
40
60
80
100
120
TOTAL RSSI OUTPUT CURRENT ( µ A)
Vin = 100 mVrms
6.0
4.0
2.0
Vin = 10 mVrms
VS = 3.0 Vdc
f = 10.7 MHz
Vin = 1.0 mVrms
0
– 2.0
– 40
Vin = 100 µVrms
– 20
0
20
40
60
80
100
TA, AMBIENT TEMPERATURE (°C)
Figure 10. Total RSSI Output Current versus
Ambient Temperature (No Signal)
Figure 11. Demodulator DC Voltage versus
Ambient Temperature
0.60
VS = 3.0 Vdc
No Input Signal
0.55
0.50
0.45
0.40
0.35
– 40
8.0
TA, AMBIENT TEMPERATURE (°C)
DEMODULATOR OUTPUT DC VOLTAGE (Vdc)
IF AMP RSSI OUTPUT CURRENT (µ A)
10
Figure 9. Limiter Amp RSSI Output Current
versus Ambient Temperature, Input Signal Level
LIMITER AMP RSSI OUTPUT CURRENT ( µ A)
Figure 8. IF Amp RSSI Output Current versus
Ambient Temperature, IF Input Level
– 20
0
20
40
60
80
100
120
120
1.20
VS = 3.0 Vdc
R17 = 51 k
R15 = 100 k
1.15
1.10
1.05
1.00
0.95
0.90
– 40
– 20
0
TA, AMBIENT TEMPERATURE (°C)
20
40
60
80
100
120
TA, AMBIENT TEMPERATURE (°C)
SYSTEM LEVEL AC ELECTRICAL CHARACTERISTICS (TA = 25°C; VS = 3.0 Vdc; fRF = 112 MHz; fLO = 122.7 MHz)
Characteristic
Condition
Notes
Symbol
fRF = 112 MHz
fmod = 1.0 kHz
fdev = ±125 kHz
SINAD Curve
Figure 25
Figure 26
1
–
fRF1 = 112 MHz
fRF2 = 112.1 MHz
VS = 3.5 Vdc
Figure 28
2
12 dB SINAD Sensitivity:
Narrowband Application
Without Preamp
With Preamp
Third Order Intercept Point
1.0 dB Comp. Point
Typ
Unit
dBm
–101
–113
IIP3
– 32
1.0 dB C.Pt.
– 39
dBm
NOTES: 1. Test Circuit & Test Set per Figure 24.
2. Test Circuit & Test Set per Figure 27.
MOTOROLA ANALOG IC DEVICE DATA
5
MC13158
CIRCUIT DESCRIPTION
General
The MC13158 is a low power single conversion wideband
FM receiver incorporating a split IF. This device is designated
for use as the backend in digital FM systems such as Digital
European Cordless Telephone (DECT) and wideband data
links with data rates up to 2.0 Mbps. It contains a mixer,
oscillator, Received Signal Strength Indicator (RSSI), IF
amplifier, limiting IF, quadrature detector, power down or
enable function, and a data slicer with output off function.
Further details are covered in the Pin Function Description
which shows the equivalent internal circuit and external
circuit requirements.
Current Regulation/Enable
Temperature compensating voltage independent current
regulators which are controlled by the enable pin (Pin 25)
where “low” powers up and “high” powers down the entire
circuit.
Mixer
The mixer is a double–balanced four quadrant multiplier
and is designed to work up to 500 MHz. It can be used in
differential or in single ended mode by connecting the other
input to the positive supply rail. The linear gain of the mixer is
approximately 22 dB at 100 mVrms LO drive level. The mixer
gain and noise figure have been emphasized at the expense
of intermodulation performance. RSSI measurements are
added in the mixer to extend the range to higher signal levels.
The single–ended parallel equivalent input impedance of the
mixer is Rp ~ 1.0 kΩ and Cp ~ 2.0 pF. The buffered output of
the mixer is internally loaded resulting in an output
impedance of 330 Ω.
Local Oscillator
The on–chip transistor operates with crystal and LC
resonant elements up to 220 MHz. Series resonant, overtone
crystals are used to achieve excellent local oscillator stability.
Third overtone crystals are used through about 65 to 70 MHz.
Operation from 70 MHz up to 180 MHz is feasible using the
on–chip transistor with a 5th or 7th overtone crystal. To
enhance operation using an overtone crystal, the internal
transistor bias is increased by adding an external resistor
from Pin 29 to VEE; however, with an external resistor the
oscillator stays on during power down. Typically, –10 dBm of
local oscillator drive is needed to adequately drive the mixer.
With an external oscillator source, the IC can be operated up
to 500 MHz.
RSSI
The received signal strength indicator (RSSI) output is a
current proportional to the log of the received signal
amplitude. The RSSI current output is derived by summing
the currents from the mixer, IF and limiting amplifier stages.
An increase in RSSI dynamic range, particularly at higher
input signal levels is achieved. The RSSI circuit is designed
to provide typically 85 dB of dynamic range with temperature
compensation.
Linearity of the RSSI is optimized by using external
ceramic bandpass filters which have an insertion loss of
4.0 dB and 330 Ω source and load impedance. For higher
data rates used in DECT and related applications, LC
bandpass filtering is necessary to acquire the desired
6
bandpass response; however, the RSSI linearity will require
the same insertion loss.
RSSI Buffer
The RSSI output current creates a voltage across an
external resistor. A unity voltage–gain amplifier is used to
buffer this voltage. The output of this buffer has an active
pull–up but no pull–down, so it can also be used as a peak
detector. The negative slew rate is determined by external
capacitance and resistance to the negative supply.
IF Amplifier
The first IF amplifier section is composed of three
differential stages with the second and third stages
contributing to the RSSI. This section has internal DC
feedback and external input decoupling for improved
symmetry and stability. The total gain of the IF amplifier block
is approximately 40 dB at 10.7 MHz.
The fixed internal input impedance is 330 Ω. When using
ceramic filters requiring source and loss impedances of
330 Ω, no external matching is necessary. Overall RSSI
linearity is dependent on having total midband attenuation of
10 dB (4.0 dB insertion loss plus 6.0 dB impedance matching
loss) for the filter. The output of the IF amplifier is buffered
and the impedance is 330 Ω.
Limiter
The limiter section is similar to the IF amplifier section
except that five differential stages are used. The fixed internal
input impedance is 330 Ω. The total gain of the limiting
amplifier section is approximately 70 dB. This IF limiting
amplifier section internally drives the quadrature detector
section and it is also brought out on Pin 12.
Quadrature Detector
The quadrature detector is a doubly balanced four
quadrant multiplier with an internal 5.0 pF quadrature
capacitor between Pins 12 and 13. An external capacitor may
be added between these pins to increase the IF signal to the
external parallel RLC resonant circuit that provides the
90 degree phase shift and drives the quadrature detector. A
single pin (Pin 13) provides for the external LC parallel
resonant network and the internal connection to the
quadrature detector.
Internal low pass filter capacitors have been selected to
control the bandwidth of the detector. The recovered signal is
brought out by the inverting amplifier buffer. An external
feedback resistor from the output (Pin 17) to the input of the
inverting amplifier (Pin 15) controls the output amplitude; it is
combined with another external resistor from the input to the
negative supply (Pin 16) to set the output dc level. For a
resistor ratio of 1, the DC level at the detector output is
2.0 VBE (see Figure 12). A small capacitor C17 across the
first resistor (from Pin 17 to 15) can be used to reduce the
bandwidth.
Data Slicer
The data slicer is a comparator that is designed to square
up the data signal. Across the data slicer inputs (Pins 18
and 20) are back to back diodes.
MOTOROLA ANALOG IC DEVICE DATA
MC13158
A unique feature of the data slicer is that the inverting
switching stages in the comparator are supplied through the
emitter pin of the output transistor (Pin 22 – DS Gnd) to VEE
rather than internally to VEE. This is provided in order to
reduce switching feedback to the front end. A control pin is
provided to shut the data slicer output off (DS “off” – Pin 19).
With DS “off” pin at VCC the data slicer output is shut off by
shutting down the base drive to the output transistor. When a
channel is being monitored to make an RSSI measurement,
but not to collect data, the data output may be shut off to save
current.
The recovered data signal from the quadrature detector
can be DC coupled to the data slicer DS IN1 (Pin 18). In the
application circuit shown in Figure 1 it will be centered at
2.0 VBE and allowed to swing ± VBE. A capacitor is placed
from DS IN2 (Pin 20) to VEE. The size of this capacitor and
the nature of the data signal determine how faithfully the data
slicer shapes up the recovered signal. The time constant is
short for large peak to peak voltage swings or when there is
a change in DC level at the detector output. For small signal
or for continuous bits of the same polarity which drift close to
the threshold voltage, the time constant is longer.
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
PIN FUNCTION DESCRIPTION
Pin
Symbol
1
Mix
Out
2
Internal Equivalent Circuit
Mixer Output
The mixer output impedance is 330 Ω; it
matches to 10.7 MHz ceramic filters with
330 Ω input impedance.
2
VCC1
VCC1
1
Mix
Out
26
VEE1
3
IF
In
2
VCC1
64 k
5
IF Dec2
4
IF
Dec1
5
IF
Dec2
6
IF
Out
26
VEE1
330
3
IF In
Description/External Circuit Requirements
64 k
4
IF Dec1
Supply Voltage (VCC1)
This pin is the VCC pin for the Mixer, Local
Oscillator, and IF Amplifer. The operating
supply voltage range is from 1.8 Vdc to
5.0 Vdc. In the PCB layout, the VCC trace
must be kept as wide as possible to minimize
inductive reactances along the trace; it is best
to have it completely fill around the surface
mount components and traces on the circuit
side of the PCB.
IF Input
The input impedance at Pin 3 is 330 Ω. It
matches the 330 Ω load impedance of a
10.7 MHz ceramic filter. Thus, no external
matching is required.
IF DEC1 & DEC2
IF decoupling pins. Decoupling capacitors
should be placed directly at the pins to enhance
stability. Two capacitors are decoupled to the
RF ground VCC1; one is placed between DEC1
& DEC2.
IF Output
The output impedance is 330 Ω; it matches
the 330 input resistance of a 10.7 MHz
ceramic filter.
2
VCC1
5
IF
Out
26
VEE1
MOTOROLA ANALOG IC DEVICE DATA
7
MC13158
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
PIN FUNCTION DESCRIPTION (continued)
Pin
Symbol
7
VCC2
Internal Equivalent Circuit
Description/External Circuit Requirements
7
VCC2
64 k
8
Lim
In
9
Lim
Dec1
10
Lim
Dec2
11,14,
27 & 28
N/C
12
Lim
Out
10
Li
Lim
Dec2
16
VEE2
330
64 k
Limiter Input
The limiter input impedance is 330 Ω.
9
Lim Dec1
8
Lim In
Limiter Output
The output impedance is low. The limiter
drives a quadrature detector circuit with in–
phase and quadrature phase signals.
Lim
Out Quad
12
13
Quad
Quadrature Detector Circuit
The quadrature detector is a doubly balanced
four–quadrant multiplier with an internal 5.0 pF
capacitor between Pins 12 and 13. An external
capacitor may be added to increase the IF
signal to Pin 13. The quadrature detector pin is
provided to connect the external RLC parallel
resonant network which provides the 90 degree
phase shift and drives the quadrature detector.
5.0 p
16
VEE2
15
17
16
Det
Gain
Det
Out
VEE2
7
VCC2
15
Det
Gain
16
VEE2
8
Limiter Decoupling
Decoupling capacitors are placed directly at
these pins and to VCC (RF ground). Use the
same procedure as in the IF decoupling.
No Connects
There is no internal connection to these pins;
however it is recommended that these pins be
connected externally to VCC (RF ground).
7
VCC2
13
Supply Voltage (VCC2)
This pin is VCC supply for the Limiter,
Quadrature Detector, data slicer and RSSI
buffer circuits. In the application PC board this
pin is tied to a common VCC trace with VCC1.
17
Det
Out
Detector Buffer Amplifier
This is an inverting amplifier. An external feedback resistor from Pin 17 to 15, (the inverting
input) controls the output amplitude; another
resistor from Pin 15 to the negative supply
(Pin 16) sets the DC output level. A 1:1 resistor
ratio sets the output DC level at two VBE with
respect to VEE. A small capacitor from Pin 17 to
15 can be used to set the bandwidth.
Supply Ground (VEE2)
In the PCB layout, the ground pins (also applies
to Pin 26) should be connected directly to
chassis ground. Decoupling capacitors to VCC
should be placed directly at the ground pins.
MOTOROLA ANALOG IC DEVICE DATA
MC13158
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
PIN FUNCTION DESCRIPTION (continued)
Pin
Symbol
19
DS
“off”
Internal Equivalent Circuit
Description/External Circuit Requirements
Data Slicer Off
The data output may be shut off to save current by placing DS “off” (Pin 19) at VCC.
DS Out
21
7
VCC2
21
DS
Out
22
DS Gnd
22
DS
Gnd
64 k
19
DS “off”
16
VEE2
18
DS
In1
20
DS
In2
7
VCC2
DS In1
18
DS In2
20
16
VEE2
23
RSSI
Buf
24
RSSI
VCC1
2
Data Slicer Output
In the application example a 10 kΩ pull–up
resistor is connected to the collector of the
output transistor at Pin 21.
Data Slicer Ground
All the inverting switching stages in the
comparator are supplied through the emitter
pin of the output transistor (Pin 22) to ground
rather than internally to VEE in order to reduce
switching feedback to the front end.
Data Slicer Inputs
The data slicer has differential inputs with
back to back diodes across them. The
recovered signal is DC coupled to DS IN1
(Pin 18) at nominally V18 with respect to VEE;
thus, it will maintain V18 ± VBE at Pin 18. DS
IN2 (Pin 20) is AC coupled to VEE. The choice
of coupling capacitor is dependent on the
nature of the data signal. For small signal or
continuous bits of the same polarity, the
response time is relatively large. On the other
hand, for large peak to peak voltage swings or
when the DC level at the detector output
changes, the response time is short. See the
discussion in the application section for
external circuit design details.
RSSI Buffer
A unity gain amplifier is used to buffer the
voltage at Pin 24 to 23.The output of the unity
gain buffer (Pin 23) has an active pull up but no
pull down. An external resistor is placed from
Pin 23 to VEE to provide the pull down.
VCC2
7
RSSI
The RSSI output current creates a voltage
drop across an external resistor from Pin 24 to
VEE. The maximum RSSI current is 26 µA;
thus, the maximum RSSI voltage using a
100 kΩ resistor is approximately 2.6 Vdc. Figure 22 shows the RSSI Output Voltage versus
Input Signal Level in the application circuit.
24
RSSI
16
VEE2
MOTOROLA ANALOG IC DEVICE DATA
23
RSSI
Buf
The negative slew rate is determined by an
external capacitor and resistor to VEE
(negative supply). The RSSI rise and fall times
for various RF input signal levels and R24
values without the capacitor, C24 are displayed
in Figure 24. This is the maximum response
time of the RSSI.
9
MC13158
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
PIN FUNCTION DESCRIPTION (continued)
Pin
Symbol
25
Enable
Internal Equivalent Circuit
Description/External Circuit Requirements
2
VCC1
Enable
The IC regulators are enabled by placing this
pin at VEE.
25
Enable
26
26
VEE1
VEE1
28
Osc
Base
29
Osc
Emitter
2
VCC1
7
VCC2
26
VEE1
16
VEE2
Oscillator Base
This pin is connected to the base lead of the
common collector transistor. Since there is no
internal bias resistor to the base, VCC is
applied through an external choke or coil.
2
VCC1
28
Osc
Base
Oscillator Emitter
This pin
p is connected to the emitter lead; the
i
iis connected
d iinternally
ll to a current
emitter
source of about 200 µA. Additional emitter
current may be obtained by connecting an
external resistor to VEE; IE = V29/R29.
29
Osc
Emitter
26
VEE1
31
32
Mix
In1
Details of circuits using overtone crystal and
LC varactor controlled oscillators are
discussed in the application section.
Mixer Inputs
The parallel equivalent differential input
impedance of the mixer is approximately 2.0
kΩ in parallel with 1.0 pF. This equates to a
single ended input impedance of 1.0 kΩ in
parallel with 2.0 pF.
2
VCC1
Mix
In2
31
RF
In2
RF
In1
26
VEE1
10
VCC and VEE ESD Protection
ESD protection diodes exist between the VCC
and VEE pins. It is important to note that
significant differences in potential (> 0.5 VBE)
between the two VCC pins or between the VEE
pins can cause these structures to start to
conduct, thus compromising isolation between
the supply busses. VCC1 & VCC2 should be
maintained at the same DC potential, as
should VEE1 & VEE2.
32
The application circuit utilizes a SAW filter
having a differential output that requires a
2.0 kΩ II 2.0 pF load. Therefore, little matching
is required between the SAW filter and the
mixer inputs. This and alternative circuits are
discussed in more detail in the application
section.
MOTOROLA ANALOG IC DEVICE DATA
MC13158
APPLICATIONS INFORMATION
Evaluation PC Board
The evaluation PCB is very versatile and is intended to be
used across the entire useful frequency range of this device.
The center section of the board provides an area for
attaching all SMT components to the circuit side and radial
leaded components to the component ground side (see
Figures 29 and 30). Additionally, the peripheral area
surrounding the RF core provides pads to add supporting
and interface circuitry as a particular application dictates.
This evaluation board will be discussed and referenced in
this section.
MOTOROLA ANALOG IC DEVICE DATA
Component Selection
The evaluation PC board is designed to accommodate
specific components, while also being versatile enough to
use components from various manufacturers and coil types.
Figures 13 and 14 show the placement for the components
specified in the application circuit (Figure 12). The application
circuit schematic specifies particular components that were
used to achieve the results shown in the typical curves and
tables but alternate components should give similar results.
11
MC13158
Figure 12. Application Circuit
(4) 122.7 MHz
5th OT Crystal
(6) 0.68 µH
SMA
33 p
27 p
1.0 µ
(5) 95 nH
(1)
10 n
RF Input
Saw
Filter
112 MHz
33
32
(2) LCR Filter
31
30
28
N/C
Mixer
100 n
29
4.7 k
27
N/C
26
(7)
Enable
25
RSSI
Out
VEE1 Enable
24
1
680 p
1.0 n
150
2
330 nH
VCC1
23
IF Amp
100 n
10 n
MC13158
1.0 n
1.0 n
4
21
5
20
1.0 k
100 n
C20
330 nH
6
7
(2)
19
Quad
Detector
100 n
150
Lim Amp
VCC2
DS In2
DS “off”
DS In1
5.0 p
8
N/C
9
10
11
N/C
12
13
14
VEE2
Bias
15
16
17
C17
82 k
R17
82 k
R15
100 n
1.0 n
DS Out
18
680 p
100 n
VCC =
2.0 to 5.0 Vdc
100 k
22
3
100 n
10 k
1.0 n
39 p
100 p
2.2 k
1.5 µH
(3) LCR Quad Tank
NOTES: 1. Saw Filter – Siemens part number Y6970M(5 pin SIP plastic package).
2. An LCR filter reduces the broadband noise in the IF; ceramic filters may be used for data rates under 500 kHz. 4.0 dB insertion loss filters
optimize the linearity of RSSI.
3. The quadrature tank components are chosen to optimize linearity of the recovered signal while maintaining adequate recovered
signal level. 1.5 µH 7.0 mm variable shielded inductor: Toko part # 292SNS–T1373Z. The shunt resistor is approximately equal to
Q(2πfL), where Q ∼ 18 (3.0 dB BW = 600 kHz).
4. The local oscillator circuit utilizes a 122.7 MHz, 5th overtone, series resonant crystal specified with a frequency tolerance of 25 PPM, ESR
of 120 Ω max. The oscillator configuration is an emitter coupled butler.
5. The 95 NH (Nominal) inductor is a 7.0 mm variable shielded inductor: Coilcraft part # 150–04J08S or equivalent.
6. 0.68 µH axial lead chokes (molded inductor ): Coilcraft part # 90–11.
7. To enable the IC, Pin 25 is taken to VEE. The external pull down resistor at Pin 29 could be linked to the enable function; otherwise if it is
taken to VEE as shown, it will keep the oscillator biased at about 500 µA depending on the VCC level.
8. The other resistors and capacitors are surface mount components.
12
MOTOROLA ANALOG IC DEVICE DATA
MC13158
Figure 13. Circuit Side Component Placement
MC13158
33p
680p
100n
10k
1n
100p
+
1µ
100n
39p
1n
2.2k
680p
150
330nH
100n
100n
82k
C20
MC13158FB
C17
1n
100n
82k
1n
100n
150
100n
1.0k
10n
47k
1n
330nH
100n
33
27p
100n
VCC
MOTOROLA ANALOG IC DEVICE DATA
13
MC13158
Figure 14. Ground Side Component Placement
VEE
VCC
DS OFF
QUAD
COIL
DS OPEN/
IN2
1.5 µH
10.7 P
CERAMIC
FILTER
10.7 S
CERAMIC
FILTER
10.7 P
CERAMIC
FILTER
10.7 S
CERAMIC
FILTER
DS OUT
XTAL
122.7 MHz
SAW
FILTER
0.68 µH
LO
95 pH
RF
INPUT
SMA
14
RSSI
OUT
MC13158
MOTOROLA ANALOG IC DEVICE DATA
MC13158
Input Matching/Components
It is desirable to use a SAW filter before the mixer to
provide additional selectivity and adjacent channel rejection.
In a wideband system the primary sensitivity of the receiver
backend may be achieved before the last mixer. Bandpass
filtering in the limiting IF is costly and difficult to achieve for
bandwidths greater than 280 kHz.
The SAW filter should be selected to easily interface with
the mixer differential input impedance of approximately
2.0 kΩ in parallel with 1.0 pF. The PC board is dedicated to
the Siemens SAW filter (part number Y6970M); the part is
designed for DECT at 112 MHz 1st IF frequency. It is
designed for a load impedance of 2.0 kΩ in parallel with
2.0 pF; thus, no or little input matching is required between
the SAW filter and the mixer.
The Siemens SAW filter has an insertion loss of typically
10 dB and a 3.0 dB bandwidth of 1.0 MHz. The relatively high
insertion loss significantly contributes to the system noise
and a filter having lower insertion loss would be desirable. In
existing low loss SAW filters, the required load impedance is
50 Ω; thus, interface matching between the filter and the
mixer will be required. Figure 15 is a table of the
single–ended mixer input impedance. A careful noise
analysis is necessary to determine the secondary
contribution to system noise.
ÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
Figure 15. Mixer Input Impedance
(Single–ended)
f
(MHz)
Rs
(Ω)
Xs
(Ω)
Rp
(Ω)
Xp
(Ω)
Cp
(pF)
50
930
– 350
1060
– 2820
1.1
100
480
– 430
865
– 966
1.6
150
270
– 400
860
– 580
1.8
200
170
– 320
770
– 410
1.9
250
130
– 270
690
– 330
1.85
300
110
– 250
680
– 300
1.8
400
71
–190
580
– 220
1.8
500
63
–140
370
–170
1.9
600
49
–110
300
–130
2.0
System Noise Considerations
The system block diagram in Figure 16 shows the
cascaded noise stages contributing to the system noise; it
represents the application circuit in Figure 12 and a low noise
preamp using a MRF941 transistor (see Figure 17). The
preamp is designed for a conjugately matched input and
output at 2.0 Vdc VCE and 3.0 mAdc Ic. S–parameters at
2.0 V, 3.0 mA and 100 MHz are:
S11 = 0.86, –20
S21 = 9.0, 164
S12 = 0.02, 79
S22 = 0.96, –12
The bias network sets VCE at 2.0 V and Ic at 3.0 mA for
VCC = 3.0 to 3.5 Vdc. The preamp operates with 18 dB gain
and 2.7 dB noise figure.
In the cascaded noise analysis the system noise equation
is:
Fsystem
+ F1 ) [(F2–1)ńG1] ) [(F3–1)]ń[(G1)(G2)]
Note: the proceeding terms are defined as linear
relationships and are related to the log form for gain and
noise figure by the following:
+ log–1[(NF in dB)ń10] and similarly
G + log –1[(Gain in dB)ń10]
F
The noise figure and gain measured in dB are shown in the
system block diagram. The mixer noise figure is typically
14 dB and the SAW filter adds typically 10 dB insertion loss.
Addition of a low noise preamp having a 18 dB gain and
2.7 dB noise figure not only improves the system noise figure
but it increases the reverse isolation from the local oscillator
to the antenna input at the receiver. Calculating in terms of
gain and noise factor yields the following:
F1
F2
F3
+ 1.86; G1 + 63.1
+ 10; G2 + 0.1
+ 25.12
Thus, substituting in the equation for system noise factor:
where:
F1 = the Noise Factor of the Preamp
G1 = the Gain of the Preamp
F2 = the Noise factor of the SAW Filter
G2 = the Gain of the SAW Filter
F3 = the Noise factor of the Mixer
MOTOROLA ANALOG IC DEVICE DATA
Fsystem
+ 5.82;
NFsystem
+ 7.7 dB
15
MC13158
Figure 16. System Block Diagram for Noise Analysis
fRF = 112 MHz
Mixer f = 10.7 MHz
IF
270
LNA
Noise
Source
SAWF
G1 = 18 dB
NF1 = 2.7 dB
G2 = 10 dB
NF2 = 10 dB
330 nH
NF
Meter
150 p
47
G3 = 18 dB
NF3 = 14 dB
Local Oscillator
fLO = 122.7 MHz
Figure 17. 112 MHz LNA
3.5 Vdc
100 n
510
15 k
100 p
680 nH
MPS3906
1.0 k
FB
8.2 k
1.0 k
RF
Input
100 p
100 nH
100 p
RF
Output
MRF941
100 p 100 nH
LOCAL OSCILLATORS
VHF Applications
The on–chip grounded collector transistor may be used for
HF and VHF local oscillator with higher order overtone
crystals. The local oscillator in the application circuit
(Figure 12) shows a 5th overtone oscillator at 122.7 MHz.
This circuit uses a Butler overtone oscillator configuration.
The amplifier is an emitter follower. The crystal is driven from
the emitter and is coupled to the high impedance base
through a capacitive tap network. Operation at the desired
overtone frequency is ensured by the parallel resonant circuit
formed by the variable inductor and the tap capacitors and
parasitic capacitances of the on–chip transistor and PC
board. The variable inductor specified in the schematic could
be replaced with a high tolerance, high Q ceramic or air
wound surface mount component if the other components
have tight enough tolerances. A variable inductor provides an
adjustment for gain and frequency of the resonant tank
ensuring lock up and start–up of the crystal oscillator. The
overtone crystal is chosen with ESR of typically 80 Ω and
120 Ω maximum; if the resistive loss in the crystal is too high
the performance of oscillator may be impacted by lower gain
margins.
A series LC network to ground (which is VCC) is comprised
of the inductance of the base lead of the on–chip transistor
and PC board traces and tap capacitors. Parasitic
oscillations often occur in the 200 to 800 MHz range. A small
resistor is placed in series with the base (Pin 28) to cancel the
16
negative resistance associated with this undesired mode of
oscillation. Since the base input impedance is so large a
small resistor in the range of 27 to 68 Ω has very little effect
on the desired Butler mode of oscillation.
The crystal parallel capacitance, Co, provides a feedback
path that is low enough in reactance at frequencies of 5th
overtones or higher to cause trouble. Co has little effect near
resonance because of the low impedance of the crystal
motional arm (Rm–Lm–Cm). As the tunable inductor which
forms the resonant tank with the tap capacitors is tuned “off”
the crystal resonant frequency it may be difficult to tell if the
oscillation is under crystal control. Frequency jumps may
occur as the inductor is tuned. In order to eliminate this
behavior an inductor, Lo, is placed in parallel with the crystal.
Lo is chosen to be resonant with the crystal parallel
capacitance, Co, at the desired operation frequency. The
inductor provides a feedback path at frequencies well below
resonance; however, the parallel tank network of the tap
capacitors and tunable inductor prevent oscillation at these
frequencies.
IF Filtering/Matching
In wideband data systems the IF bandpass needed is
greater than can be found in low cost ceramic filters operating
at 10.7 MHz. It is necessary to bandpass limit with LC
networks or series–parallel ceramic filter networks. Murata
offers a series–parallel resonator pair (part number
MOTOROLA ANALOG IC DEVICE DATA
MC13158
KMFC545) with a 3.0 dB bandwidth of ± 325 kHz and a
maximum insertion loss of 5.0 dB. The application PC board
is laid out to accommodate this filter pair (a filter pair is used
at both locations of the split IF). However, even using a series
parallel ceramic filter network yields only a maximum
bandpass of 650 kHz. In some applications a wider band IF
bandpass is necessary.
A simple LC network yields a bandpass wider than the
SAW filter but it does reduce an appreciable amount of
wideband IF noise. In the application circuit an LC network is
specified using surface mount components. The parallel LC
components are placed from the outputs of the mixer and IF
amplifier to the VCC trace; internal 330 loads are connected
from the mixer and IF amplifier outputs to DEC2 (Pin 5 and 10
respectively).This loads the outputs with the optimal load
impedance but creates a low insertion loss filter. An external
shunt resistor may be used to widen the bandpass and to
acquire the 10 dB composite loss necessary to linearize the
RSSI output. The equivalent circuit is shown in Figure 18.
Figure 18. IF LCR Filter
1, 6
680 p
330 nH
2, 7
VCC
3, 8
DEC1
DEC2
4, 9
Rin
330
5, 10
VCC
The following equations satisfy the 12 dB loss
(1:4 resistive ratio):
ń
ń
)
(Rext)(330) (Rext 330)
Requivalent (Requivalent
+ Requivalent
) 330) + 1ń4
Solve for Requivalent:
+
+
4(Requivalent)
Requivalent
3(Requivalent)
330
Requivalent
110
+
) 330
Substitute for Requivalent and solve for Rext:
+
330(Rext)
110(Rext)
Rext
(330)(110) 220
Rext
165 W
+
+
ń
Q
) (330)(110)
The IF is 10.7 MHz although any IF between 10 to 20 MHz
could be used. The value of the coil is lowered from that used
in the quadrature circuit because the unloaded Q must be
maintained in a surface mount component. A standard value
component having an unloaded Q = 100 at 10.7 MHz is
330 nH; therefore the capacitor is 669 pF. Standard values
have been chosen for these components;
+ RequivalentńXL
where: XL = 2πfL and Requivalent is 103 Ω
Thus, Q
+ 4.65
The total system loss is
ń
20 log (103 433)
+ –12.5 dB
Quadrature Detector
The quadrature detector is coupled to the IF with an
internal 5.0 pF capacitor between Pins 12 and 13. For
wideband data applications, the drive to the detector can be
increased with an additional external capacitor between
these pins; thus, the recovered signal level output is
increased for a given bandwidth
The wideband performance of the detector is controlled by
the loaded Q of the LC tank circuit. The following equation
defines the components which set the detector circuit’s
bandwidth:
Q
Rout
330
150
Computation of the loaded Q of this LCR network is
+ RTńXL
[1]
where RT is the equivalent shunt resistance across the LC
Tank
XL is the reactance of the quadrature inductor at the IF
frequency (XL = 2πfL).
The inductor and capacitor are chosen to form a resonant
LC tank with the PCB and parasitic device capacitance at the
desired IF center frequency as predicted by
fc
+ [2p (LCp)1ń2]–1
[2]
where L is the parallel tank inductor Cp is the equivalent
parallel capacitance of the parallel resonant tank circuit.
The following is a design example for a wideband detector
at 10.7 MHz and a loaded Q of 18. The loaded Q of the
quadrature detector is chosen somewhat less than the Q of
the IF bandpass. For an IF frequency of 10.7 MHz and an IF
bandpass of 600 kHz, the IF bandpass Q is approximately
6.4.
Example:
Let the external Cext = 139 pF. (The minimum value here
should be much greater than the internal device and PCB
parasitic capacitance, Cint ≈ 3.0 pF). Thus, Cp = Cint +
Cext = 142 pF.
Rewrite equation (2) and solve for L:
L = (0.159)2/(Cpfc2)
L = 1.56 µH; Thus, a standard value is
choosen:
L = 1.56 µH (tunable shielded inductor)
The value of the total damping resistor to obtain the
required loaded Q of 18 can be calculated by rearranging
equation (1):
R
T
R
T
+ Q(2pfL)
+ 18(2p)(10.7)(1.5) + 1815 W
+
Rext
150 W
C
680 pF
L
330 nH
+
+
MOTOROLA ANALOG IC DEVICE DATA
17
MC13158
The internal resistance, Rint at the quadrature tank Pin 13
is approximately 13 kΩ and is considered in determining the
external resistance, Rext which is calculated from
Rext
Rext
Rext
+ ((RT)(Rint))ń(Rint – RT)
Thus, choose the standard value:
+ 2110;
+ 2.2 kW
It is important to set the DC level of the detector output at
Pin 17 to center the peak to peak swing of the recovered
signal. In the equivalent internal circuit shown in the Pin
Function Description, the reference voltage at the positive
terminal of the inverting op amp buffer amplifier is set at
1.0 VBE. The detector DC level, V17 is determined by the
following equation:
V 17
+ [((R15ńR17) ) 1)ń(R15ńR17)] VBE
Thus, for a 1:1 ratio of R15/R17, V17 = 2.0 VBE = 1.4 Vdc.
Similarly for a 2:1, V17 = 1.5 VBE = 1.05 Vdc; and for 3:1,
V17 = 1.33 VBE = 0.93 Vdc.
Figure 19 shows the detector “S–Curves”, in which the
resistor ratio is varied while maintaining a constant gain (R17
is held at 62 k). R15 is 62 k for a 1:1 ratio; while R15 = 120 k
and 180 k to produce the 2:1 and 3:1 ratios. The IF signal into
the detector is swept ± 500 kHz about the 10.7 MHz IF center
frequency. The resulting curve show how the resistor ratio
and the supply voltage effects the symmetry of the “S–curve”
(Figure 21 Test Setup). For the 3:1 and 2:1 ratio, symmetry is
maintained with VS from 2.0 to 5.0 Vdc; however, for the 1:1
ratio, symmetry is lost at 2.0 Vdc.
DETECTOR OUTPUT VOLTAGE, V17 (Vdc)
R15:R17 = 1:1
VS = 2.0 Vdc
t
+ 2p (R18)(C20)
Solve for C20:
C 20
+ tń2p (R18)
where the effective resistance R18 is a complex function of
the demodulator feedback resistance and the data slicer
input circuit. In the data input network the back to back diodes
form a charge and discharge path for the capacitor at Pin 20;
however, the diodes create a non–linear response. This
resistance is loaded by the ß, beta of the detector output
transistor; beta =100 is a typical value (see Figure 21). Thus,
the apparent value of the resistance at Pin 18 (DS IN1) is
approximately equal to:
R 18
Y R17ń100
where R17 is 82 kΩ, the feedback resistor from Pin 17 to 15.
Therefore, substituting for R18 and solving for C20:
C 20
+ 15.9 (t)ńR17 + 5.04 nF
The closest standard value is 4.7 nF.
Figure 19. Detector Output Voltage versus
Frequency Deviation
2.5
Data Slicer Circuit
C20 at the input of the data slicer is chosen to maintain a
time constant long enough to hold the charge on the
capacitor for the longest strings of bits at the same polarity.
For a data rate at 576 kHz a bit stream of 15 bits at the same
polarity would equate to an apparent data rate of
approximately 77 kbps or 38 kHz. The time constant would
be approximately 26 µs. The following expression equates
the time constant, t, to the external components:
Figure 21. Data Slicer Equivalent Input Circuit
R15:R17 = 1:1
VS = 3.5 to 5.0 Vdc
2.0
R18
fc = 10.7 MHz
R17 = 62 k
Test Setup – Figure 20
1.5
1.0
0.5
R15:R17 = 2:1
VS = 2.0 to 5.0 Vdc
R17/β
C20
R15:R17 = 3:1
VS = 2.0 to 5.0 Vdc
0
– 600
– 400
– 200
0
200
400
600
18
20
VCC
FREQUENCY DEVIATION (kHz)
Figure 20. Demodulator “S–Curve” Test Setup
EXT
MOD In
Wavetek Signal
Generator
Model 134
50 Ω
Output
RF Out
Sweep Out
Lim In
X Input
Oscilloscope
TEK 475
18
Signal Generator
Fluke 6082A
fc = 10.7 MHz
∆f = ± 500 kHz
Y
Input
DET
Out
MC13158
MOTOROLA ANALOG IC DEVICE DATA
MC13158
SYSTEM PERFORMANCE DATA
Figure 23. RSSI Output Rise and Fall Times
versus RF Input Signal Level
RSSI RISE AND FALL TIMES, t r & t f ( µ s)
RSSI
In Figure 22, the RSSI versus RF Input Level shows the
linear response of RSSI over a 65 dB range but it has
extended capability over 80 dB from – 80 dBm to +10 dBm.
The RSSI is measured in the application circuit (Figure 12) in
which a SAW filter is used before the mixer; thus, the overall
sensitivity is compromised for the sake of selectivity. The
curves are shown for three filters having different
bandwidths:
1) LCR Filter with 2.3 MHz 3.0 dB BW (Circuit and
Component Placement is shown in Figure 12)
2) Series–Parallel Ceramic Filter with 650 kHz 3.0 dB BW
(Murata Part # KMFC–545)
3) Ceramic Filter with 280 kHz 3.0 dB BW.
35
30
25
20
15
10
5.0
0
Figure 22. RSSI Output Voltage versus
Signal Input Level
Ç
Ç
Ç
Ç
Ç
ÉÉ
Ç
ÉÉ
Ç
ÉÉ
Ç
0
Ç
Ç
Ç
Ç
Ç
Ç
ÉÉ
Ç
ÉÉ
Ç
ÉÉ
Ç
– 20
Ç
Ç
Ç
Ç
Ç
ÉÉ
Ç
ÉÉ
Ç
ÉÉ
Ç
– 40
tr
tf
tr
tf
@
@
@
@
2
2
4
4
tr
tf
@
1
0
0
@
1
0
0
ÉÉ
ÇÇ
Ç
ÇÇ
ÇÇ ÇÇ
ÉÉ
É
ÉÉ
É
ÇÇ
Ç
ÉÉ
É
Ç ÇÇ
– 60
– 80
RF INPUT SIGNAL LEVEL (dBm)
RSSI OUTPUT VOLTAGE (Vdc)
3.0
VCC = 4.0 Vdc
2.7 fRF = 112 MHz
2.4 fLO = 122.7 MHz
fIF = 10.7 MHz
2.1 See Figure 12 for LCR filter
1.8
1.5 Series–Parallel
Ceramic Filter
1.2
0.9
0.6
0.3
SINAD Performance
Figure 24 shows a test setup for a narrowband
demodulator output response in which a C–message filter
and an active de–emphasis filter is used following the
demodulator. The input is matched using a 1:4 impedance
transformer. The SINAD performance is shown in Figure 25
with no preamp and in Figure 26 with a preamp (Preamp –
Figure 16). The 12 dB SINAD sensitivity is –101 dBm with no
preamp and –113 dBm with the preamp.
Ceramic Filter
LCR; Rext = 150 Ω
0
– 90 – 80 –70 – 60 – 50 – 40 – 30 – 20 –10
0
10
20
SIGNAL INPUT LEVEL (dBm)
Figure 24. Test Setup for Narrowband SINAD
Input
Match
HP8657B
fc = 112 MHz
fmod = 1.0 kHz
∆f = ±125 kHz
MC13158
LO
In
HP8657B
fc = 122.7 MHz
PLO = – 6.0 dBm
LO
Output
MOTOROLA ANALOG IC DEVICE DATA
IF 3.0 dB BW = 280 kHz
Detector Out
C–Message
Filter
Active
De–emphasis
HP334
Distortion
Analyzer
RF
Voltmeter
N+D
N
19
2
2
7
7
k
k
k
k
MC13158
Figure 25. S+N+D, N+D, N
versus Input Signal Level (without preamp)
Figure 26. S+N+D, N+D, N versus
Input Signal Level (with preamp)
10
10
S+N+D
S+N+D
0
– 20
N+D
– 30
S+N+D, N+D, N (dB)
VS = 3.0 Vdc
fdev = ±125 kHz
fmod = 1.0 kHz
fRF = 112 MHz
IF 3.0 dB BW = 280 kHz
–10
– 40
– 50
VS = 3.0 Vdc
fdev = ±125 kHz
fmod = 1.0 kHz
fRF = 112 MHz
IF 3.0 dB BW = 280 kHz
–10
– 20
N +D
– 30
– 40
– 50
– 60
– 60
N
–70
–120
–100
– 80
– 60
– 40
– 20
N
–70
–120
0
–100
– 80
RF INPUT SIGNAL (dBm)
– 60
– 40
– 20
0
RF INPUT SIGNAL (dBm)
Figure 27. Input IP3, 1.0 dB Compression Pt. Test Setup
112 MHz
FET Probe
TEK P6201
MIXER
270
100 p
0.8–10 p
Mini–Circuits ZSFC–4
4 Way Zero Degree
Combiner
50
47
100 p
To
Spectrum
Analyzer
G3 = 18 dB
NF3 = 14 dB
50
Local
Oscillator
HP8657B
112.1 MHz
fLO – 122.7 MHz @ –6.0 dBm
Figure 28. –1.0 dB Compression Pt. and Input
Third Order Intercept
–10
1.0 dB Comp. Pt. = – 39 dBm
– 20
IP3 = – 32 dBm
S+N+D, N+D, N (dB)
S+N+D, N+D, N (dB)
0
– 30
– 40
– 50
VS = 3.5 Vdc
fRF1 = 112 kHz
fRF2 = 112.1 kHz
fLO = 122.7 MHz
PLO = – 6.0 dBm
See Figure 27
– 60
–70
– 80
– 60
– 50
– 40
– 30
– 20
RF INPUT SIGNAL LEVEL (dBm)
20
MOTOROLA ANALOG IC DEVICE DATA
MC13158
Figure 29. Circuit Side View
MC13158
VCC
3.8″
MOTOROLA ANALOG IC DEVICE DATA
21
MC13158
Figure 30. Ground Side View
VEE
VCC
DS OFF
QUAD
COIL
10.7 P
CERAMIC
FILTER
10.7 S
CERAMIC
FILTER
10.7 P
CERAMIC
FILTER
10.7 S
CERAMIC
FILTER
DS OPEN/
IN2
DS OUT
XTAL
SAW
FILTER
LO
RSSI
OUT
RF
INPUT
22
MC13158
MOTOROLA ANALOG IC DEVICE DATA
MC13158
OUTLINE DIMENSIONS
FTB SUFFIX
PLASTIC PACKAGE
CASE 873–01
(Thin QFP)
L
24
17
B
DETAIL A
32
D
S
H A–B
V
M
L
0.20 (0.008)
–B–
–A–
0.20 (0.008) M C A–B
0.05 (0.002) A–B
S
D
S
16
S
25
B
1
P
B
9
8
–D–
–A–,–B–,–D–
A
0.20 (0.008) M C A–B
0.05 (0.002) A–B
S
D
S
S
D
S
DETAIL A
S
0.20 (0.008)
H A–B
M
F
BASE METAL
M
DETAIL C
J
C E
–H–
–C–
SEATING
PLANE
H
M
G
N
DATUM
PLANE
0.01 (0.004)
D
0.20 (0.008)
M
C A–B
S
D
S
SECTION B–B
VIEW ROTATED 90° CLOCKWISE
U
T
R
–H–
DATUM
PLANE
K
X
DETAIL C
MOTOROLA ANALOG IC DEVICE DATA
Q
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DATUM PLANE –H– IS LOCATED AT BOTTOM OF
LEAD AND IS COINCIDENT WITH THE LEAD WHERE
THE LEAD EXITS THE PLASTIC BODY AT THE
BOTTOM OF THE PARTING LINE.
4. DATUMS –A–, –B– AND –D– TO BE DETERMINED AT
DATUM PLANE –H–.
5. DIMENSIONS S AND V TO BE DETERMINED AT
SEATING PLANE –C–.
6. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE PROTRUSION IS 0.25
(0.010) PER SIDE. DIMENSIONS A AND B DO
INCLUDE MOLD MISMATCH AND ARE DETERMINED
AT DATUM PLANE –H–.
7. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION
SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT.
DIM
A
B
C
D
E
F
G
H
J
K
L
M
N
P
Q
R
S
T
U
V
X
MILLIMETERS
MIN
MAX
7.10
6.95
7.10
6.95
1.60
1.40
0.273 0.373
1.50
1.30
–
0.273
0.80 BSC
0.20
–
0.119 0.197
0.57
0.33
5.6 REF
8°
6°
0.119 0.135
0.40 BSC
5°
10°
0.15
0.25
8.85
9.15
0.15
0.25
5°
11°
8.85
9.15
1.0 REF
INCHES
MIN
MAX
0.274 0.280
0.274 0.280
0.055 0.063
0.010 0.015
0.051 0.059
–
0.010
0.031 BSC
0.008
–
0.005 0.008
0.013 0.022
0.220 REF
8°
6°
0.005 0.005
0.016 BSC
5°
10°
0.006 0.010
0.348 0.360
0.006 0.010
5°
11°
0.348 0.360
0.039 REF
23
MC13158
NOTES
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
How to reach us:
USA / EUROPE / Locations Not Listed: Motorola Literature Distribution;
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,
3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315
MFAX: [email protected] – TOUCHTONE 602–244–6609
INTERNET: http://Design–NET.com
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
24
◊
*MC13158/D*
MOTOROLA ANALOG IC DEVICE
DATA
MC13158/D