Fiber Optics iSFP™ - Intelligent Small Form-factor Pluggable 2.5 Gbit/s InfiniBand™ 1X-SX Multimode 850 nm Transceiver with LC™ Connector V23848-N305-C56 Preliminary Data Sheet Features • Small Form-factor Pluggable (SFP) MSA compatible transceiver1) • Fully SFF-8472 compatible • Incorporating Intelligent – Digital Diagnostic Monitoring Interface • Internal calibration implementation • Advanced release mechanism File: 1130 • Easy access, even in belly to belly applications • Wire handle release for simplicity • Color coded black tab (multimode) • PCI height compatible • Excellent EMI performance • Common ground concept • RJ-45 style LC™ connector system • Single power supply (3.3 V) • Extremely low power consumption of 530 mW typical • Small size for high channel density File: 1131 • UL-94 V-0 certified • ESD Class 1C per JESD22-A114-B (MIL-STD 883D Method 3015.7) • According to FCC (Class B) and EN 55022 • For distances of up to 500 m (50 µm fiber) • Laser safety according to Class 1 FDA and IEC • AC/AC Coupling according to MSA • Extended operating temperature range of –20°C to 85°C • SFP/iSFP™ evaluation kit V23848-S5-V4 available upon request • A press fit cage and cage plugs are available as accessory products from Infineon (see SFP Accessories) 1) MSA documentation can be found at www.infineon.com/fiberoptics under Transceivers, SFP Transceivers. iSFP™ is a trademark of Infineon Technologies. LC™ is a trademark of Lucent. InfiniBand™ is a trademark of the InfiniBand Trade Association. Preliminary Product Information 1 2004-06-28 V23848-N305-C56 Pin Configuration Pin Configuration 20 VEET 1 VEET 19 TD− 2 Tx Fault 18 TD+ 3 Tx Disable 17 VEET 4 MOD-DEF(2) 16 VCCT 5 MOD-DEF(1) 15 VCCR 6 MOD-DEF(0) 14 VEER 7 Rate Select 13 RD+ 8 LOS 12 RD− 9 VEER 11 VEER 10 VEER Bottom of transceiver (as viewed through top of transceiver) Top of transceiver Figure 1 File: 1306 iSFP™ Transceiver Electrical Pad Layout Preliminary Product Information 2 2004-06-28 V23848-N305-C56 Pin Configuration Pin Description Pin No. Name Logic Level Function 1 VEET N/A Transmitter Ground1) 2 Tx Fault LVTTL Transmitter Fault Indication2) 8) 3 Tx Disable LVTTL Transmitter Disable3) 4 MOD-DEF(2) LVTTL Module Definition 24) 8) 5 MOD-DEF(1) LVTTL Module Definition 15) 8) 6 MOD-DEF(0) N/A Module Definition 06) 8) 7 Rate Select N/A Not connected 8 LOS LVTTL Loss Of Signal7) 8) 9 N/A Receiver Ground1) N/A Receiver Ground1) 11 VEER VEER VEER N/A Receiver Ground1) 12 RD– LVPECL Inv. Received Data Out9) 13 RD+ LVPECL Received Data Out9) 14 N/A Receiver Ground1) N/A Receiver Power N/A Transmitter Power 17 VEER VCCR VCCT VEET N/A Transmitter Ground1) 18 TD+ LVPECL Transmit Data In10) 19 TD– LVPECL Inv. Transmit Data In10) 20 VEET N/A Transmitter Ground1) 10 15 16 1) 2) 3) 4) 5) 6) 7) 8) 9) 10) Common transmitter and receiver ground within the module. A high signal indicates a laser fault of some kind and that laser is switched off. A low signal switches the transmitter on. A high signal or when not connected switches the transmitter off. MOD-DEF(2) is the data line of two wire serial interface for serial ID. MOD-DEF(1) is the clock line of two wire serial interface for serial ID. MOD-DEF(0) is grounded by the module to indicate that the module is present. A low signal indicates normal operation, light is present at receiver input. A high signal indicates the received optical power is below the worst case receiver sensitivity. Should be pulled up on host board to VCC by 4.7 - 10 kΩ. AC coupled inside the transceiver. Must be terminated with 100 Ω differential at the user SERDES. AC coupled and 100 Ω differential termination inside the transceiver. Preliminary Product Information 3 2004-06-28 V23848-N305-C56 Description Description The Infineon pluggable multimode transceiver – part of Infineon iSFP™ family – is designed for applications with data rates up to 2.5 Gbit/s and compatible to InfiniBand™ 1X-SX (IB-1X-SX) Release 1.1. The appropriate fiber optic cable is 62.5 µm or 50 µm multimode fiber with LC™ connector. Link Length Fiber Type Reach min.1) max.2) 50 µm, 500 MHz*km 2 250 50 µm, 2000 MHz*km 2 500 62.5 µm, 200 MHz*km 2 125 Unit at 2.5 Gbit/s 1) 2) meters A 0 m link length (loop-back connector) is supported. Longer reach possible depending upon link implementation. The Infineon iSFP™ multimode transceiver is a single unit comprised of a transmitter, a receiver, and an LC™ receptacle. This transceiver supports the LC™ connectorization concept. It is compatible with RJ-45 style backpanels for high end datacom and telecom applications while providing the advantages of fiber optic technology. This module is designed for 2.5 Gbit/s and InfiniBand™ applications. It can be used as the network end device interface in mainframes, workstations, servers, and storage devices, and in a broad range of network devices such as bridges, routers, hubs, and local and wide area switches. This transceiver operates at 2.5 Gbit/s from a single power supply (+3.3 V). The 100 Ω differential data inputs and outputs are LVPECL and CML compatible. Preliminary Product Information 4 2004-06-28 V23848-N305-C56 Description Functional Description of iSFP™ Transceiver This transceiver is designed to transmit serial data via multimode cable. Tx Fault Automatic Shut-Down Tx Disable Tx Coupling Unit TD+ TD− Laser Driver e/o Laser Power Control o/e Multimode Fiber Monitor Rx Coupling Unit RD+ RD− Limiting Amp TIA o/e LOS MOD-DEF(2) MOD-DEF(1) Digital Diagnostic Monitoring Interface EEPROM Alarm and Warning Flags File: 1356 Figure 2 Functional Diagram Preliminary Product Information 5 2004-06-28 V23848-N305-C56 Description The receiver component converts the optical serial data into CML compatible electrical data (RD+ and RD–). The Loss Of Signal (LOS) shows whether an optical signal is present. The transmitter converts CML compatible electrical serial data (TD+ and TD–) into optical serial data. Data lines are differentially 100 Ω terminated. The transmitter contains a laser driver circuit that drives the modulation and bias current of the laser diode. The currents are controlled by a power control circuit to guarantee constant output power of the laser over temperature and aging. The power control uses the output of the monitor PIN diode (mechanically built into the laser coupling unit) as a controlling signal, to prevent the laser power from exceeding the operating limits. Single fault condition is ensured by means of an integrated automatic shutdown circuit that disables the laser when it detects laser fault to guarantee the laser Eye Safety. The transceiver contains a supervisory circuit to control the power supply. This circuit makes an internal reset signal whenever the supply voltage drops below the reset threshold. It keeps the reset signal active for at least 140 milliseconds after the voltage has risen above the reset threshold. During this time the laser is inactive. A low signal on TxDis enables transmitter. If TxDis is high or not connected the transmitter is disabled. An enhanced Digital Diagnostic Monitoring Interface (Intelligent) has been incorporated into the Infineon Small Form-factor Pluggable (SFP) transceiver. This allows real time access to transceiver operating parameters, based on the SFF-8472. This transceiver features Internal Calibration. Measurements are calibrated over operating temperature and voltage and must be interpreted as defined in SFF-8472. The transceiver generates this diagnostic data by digitization of internal analog signals monitored by a new diagnostic Integrated Circuit (IC). This diagnostic IC has inbuilt sensors to include alarm and warning thresholds. These threshold values are set during device manufacture and therefore allow the user to determine when a particular value is outside of its operating range. Alarm and Warning Flags are given. Alarm Flags indicate conditions likely to be associated with an inoperational link and cause for immediate action. Warning Flags indicate conditions outside the normally guaranteed bounds but not necessarily causes of immediate link failures. These enhanced features are in addition to the existing SFP features provided by the manufacturer i.e. serial number and other vendor specific data. The serial ID interface defines a 256 byte memory map in EEPROM, accessible over a 2 wire, serial interface at the 8 bit address 1010000X (A0h). The Digital Diagnostic Monitoring Interface makes use of the 8 bit address 1010001X (A2h), so the originally defined serial ID memory map remains unchanged and is therefore backward compatible. Preliminary Product Information 6 2004-06-28 V23848-N305-C56 Description Digital Diagnostic Monitoring Parameters Parameter Accuracy SFF-8472 Accuracy Actual Tx Optical Power ±3 dB ±1 dB Rx Optical Power ±3 dB ±3 dB Bias Current ±10% ±10% Power Supply Voltage ±3% ±3% Transceiver Temperature ±3°C ±3°C Preliminary Product Information 7 2004-06-28 V23848-N305-C56 Description Regulatory Compliance (EMI) Feature Standard Comments ESD: Electrostatic Discharge to the Electrical Pins EIA/JESD22-A114-B (MIL-STD 883D method 3015.7) Class 1C Immunity: Against Electrostatic Discharge (ESD) to the Duplex LC Receptacle EN 61000-4-2 IEC 61000-4-2 Discharges ranging from ±2 kV to ±15 kV on the receptacle cause no damage to transceiver (under recommended conditions). Immunity: Against Radio Frequency Electromagnetic Field EN 61000-4-3 IEC 61000-4-3 With a field strength of 10 V/m, noise frequency ranges from 10 MHz to 2 GHz. No effect on transceiver performance between the specification limits. Emission: FCC 47 CFR Part 15, Radiated Field Strength Class B CISPR 22 EN 55022 Class B Compliant with 89/336/EEC Noise frequency range: 30 MHz to 18 GHz EN 55022 EN 55024 File: 1400 iSFP™ This device complies with part 15 of the FCC Rules1). Operation is subject to the following two conditions: 1 This device may not cause harmful interference. 2 This device must accept any interference received, including interference that may cause undesired operation. V23848-N305-C56 Tested To Comply With FCC Standards FOR HOME OR OFFICE USE File: 1437 1) Any kind of modification not expressly approved by Infineon Technologies may affect the regulatory compliance of the concerned product. As a consequence thereof this could void the user’s authority to operate the equipment. Preliminary Product Information 8 2004-06-28 V23848-N305-C56 Technical Data Technical Data Absolute Maximum Ratings Parameter Symbol Limit Values min. Unit max. Operating Case Temperature1) VID max VIDpk-pk TS TC Storage Relative Humidity RHs 5 95 % Operating Relative Humidity RHo 5 85 % Supply Voltage 4 V Data Output Current VCC max Idata 50 mA Receiver Optical Input Power RxP max 3 dBm Data Input Voltage Differential Data Input Voltage Swing Storage Ambient Temperature 1) VCC+0.5 V 5 V –40 85 °C –20 85 °C Operating case temperature measured at transceiver reference point (in cage through 2nd centre hole from rear, see Figure 9). Exceeding any one of these values may permanently destroy the device. Preliminary Product Information 9 2004-06-28 V23848-N305-C56 Technical Data Electrical Characteristics (VCC = 2.97 V to 3.63 V, TC = –20°C to 85°C) Parameter Symbol Values Unit min. typ. max. 2.97 3.3 3.63 V In-rush Current VCC–VEE IIR max 30 mA Power Dissipation P 400 700 mW Differential Data Input Voltage Swing2) VIDpk-pk 500 3200 mV Tx Disable Voltage TxDis 2 VCC V Tx Enable Voltage TxEn VEE 0.8 V Tx Fault High Voltage TxFH 2.4 VCC V Tx Fault Low Voltage TxFL VEE 0.5 V Supply Current3) ITx 150 mA Differential Data Output Voltage VODpk-pk 500 Swing 4) 1000 mV LOS Active LOSA 2.4 VCC V LOS Normal LOSN VEE 0.5 V Rise Time5) tR-Rx tF-Rx 100 ps 100 ps Contributed Deterministic Jitter6) CDJRx 40 ps Contributed Total Jitter7) CTJRx 117 ps Jitter (pk-pk)8) JRx Common Supply Voltage 1) Transmitter 100 Receiver Fall Time5) ps Power Supply Noise Rejection9) PSNR Supply Current 3) 1) 2) 3) 4) 5) 6) 7) 10) 100 IRx 80 mVpp 90 mA Measured with MSA recommended supply filter network (Figure 7). Maximum value above that of the steady state value. Internally AC coupled. Typical 100 Ω differential input impedance. MSA defines maximum current at 300 mA. Internally AC coupled. Load 50 Ω to GND or 100 Ω differential. For dynamic measurement a tolerance of 50 mV should be added. Measured values are 20% - 80%. Deterministic Jitter is that jitter measured by a bathtub scan, using a 27–1 NRZ PRBS, and extrapolating to 1 BER. Total Jitter is that jitter measured by a bathtub scan, using a 27–1 NRZ PRBS, and extrapolating to 1x10–12 BER. Preliminary Product Information 10 2004-06-28 V23848-N305-C56 Technical Data 8) 9) 10) Jitter (pk-pk) is measured using a 223–1 NRZ PRBS and a Digital Communications Analyzer. Measured using a 20 Hz to 1 MHz sinusoidal modulation with the MSA recommended power supply filter network (Figure 7) in place. A change in sensitivity of less than 1 dB can be typically expected. Supply current excluding Rx output load. Preliminary Product Information 11 2004-06-28 V23848-N305-C56 Technical Data Optical Characteristics (VCC = 2.97 V to 3.63 V, TC = –20°C to 85°C) Parameter Symbol Values min. typ. Unit max. Transmitter Optical Modulation Amplitude OMAT 196 Launched Power (Average) PO –8.5 –6 Extinction Ratio (Dynamic) ER 9 14.5 Center Wavelength λC 830 850 860 nm Spectral Width (rms) σI 0.15 0.85 nm Relative Intensity Noise RIN –117 dB/Hz Tx Disable Laser Output Power PO-TxDis –50 dBm Contributed Deterministic Jitter2) CDJTx 52 ps Contributed Total Jitter3) CTJTx 122 ps Jitter (pk-pk)4) JTx Rise Time5) tR-Tx tF-Tx 1) Fall Time5) µW –4 dBm dB ps 150 ps 150 ps Receiver6) Optical Modulation Amplitude OMAR Sensitivity (Average Power)7) PIN PIN-R PLOSA PLOSD PLOSA –PLOSD Average Received Power LOS Assert Level 8) LOS Deassert Level 8) 8) LOS Hysteresis 50 –30 1 2 850 λC 770 Optical Return Loss ORL 12 2) 3) 4) 5) 6) 7) 8) –16 dBm –1.5 dBm –28 –25 Input Center Wavelength 1) µW dBm –20 dBm dB 860 nm dB Into multimode fiber, 62.5 µm or 50 µm diameter. Deterministic Jitter is that jitter measured by a bathtub scan, using a 27–1 NRZ PRBS, and extrapolating to 1 BER. Total Jitter is that jitter measured by a bathtub scan, using a 27–1 NRZ PRBS, and extrapolating to 1x10–12 BER. Jitter (pk-pk) is measured using a 223–1 NRZ PRBS and a Digital Communications Analyzer. Values are 20% - 80%. Measured at nominal data rate, unfiltered, using an O/E plug-in with a bandwidth of 2.85 GHz or higher. Receiver characteristics are measured with a worst case reference laser. Average optical power at which the BER is 1x10–12. Measured with a 223–1 NRZ PRBS and ER = 9 dB. See Figure 3. Preliminary Product Information 12 2004-06-28 V23848-N305-C56 Technical Data 1 LOS Level 0 LOS Deassert (Maximum) LOS deassertion range Hysteresis (Minimum) LOS assertion range LOS persistence LOS Assert (Minimum) Received Optical Power Level [dBm] LOS / Hysteresis (Typical) File: 1522 Figure 3 Preliminary Product Information 13 2004-06-28 V23848-N305-C56 Technical Data Timing of Control and Status I/O Parameter Symbol Values min. Unit Condition max. Tx Disable Assert Time t_off 10 µs Time from rising edge of Tx Disable to when the optical output falls below 10% of nominal Tx Disable Negate Time t_on 1 ms Time from falling edge of Tx Disable to when the modulated optical output rises above 90% of nominal Time to Initialize, t_init Including Reset of Tx Fault 300 ms From power on or negation of Tx Fault using Tx Disable Tx Fault Assert Time t_fault 100 µs Time from fault to Tx Fault on Tx Disable to Reset t_reset µs Time Tx Disable must be held high to reset Tx Fault 10 LOS Assert Time t_loss_on 100 µs Time from LOS state to Rx LOS assert LOS Deassert Time 100 µs Time from non-LOS state to Rx LOS deassert t_loss_off Preliminary Product Information 14 2004-06-28 V23848-N305-C56 Technical Data I/O Timing of Soft Control and Status Functions Parameter Symbol Max. Value Unit Condition Tx Disable assert time t_off 100 ms Time from Tx Disable bit set1) until optical output falls below 10% of nominal Tx Disable deassert t_on time 100 ms Time from Tx Disable bit cleared until optical output rises above 90% of nominal Time to initialize, including reset of Tx Fault 300 ms Time from power on or negation of Tx Fault using Tx Disable until transmitter output is stable2) Tx Fault assert time t_fault 100 ms Time from fault to Tx Fault bit set LOS assert time t_loss_on 100 ms Time from LOS state to Rx LOS bit set LOS deassert time t_loss_off 100 ms Time from non-LOS state to Rx LOS bit cleared Rate select change time3) t_rate_sel 100 ms Time from change of state of Rate Select bit1) until receiver bandwidth is in conformance with appropriate specification Serial ID clock rate4) f_serial_clock 400 kHz N/A Analog parameter data ready 1000 ms From power on to data ready, bit 0 of byte 110 set 300 ms Time from power on until module is ready for data transmission t_init t_data Serial bus hardware t_serial ready 1) 2) 3) 4) Measured from falling clock edge after stop bit of write transaction. See Gigabit Interface Converter (GBIC). SFF-0053, Rev. 5.5, September 27, 2000. Not implemented. The maximum clock rate of the serial interface is defined by the I2C bus interface standard. Preliminary Product Information 15 2004-06-28 V23848-N305-C56 Eye Safety Eye Safety This laser based multimode transceiver is a Class 1 product. It complies with IEC 60825-1/A2: 2001 and FDA performance standards for laser products (21 CFR 1040.10 and 1040.11) except for deviations pursuant to Laser Notice 50, dated July 26, 2001. CLASS 1 LASER PRODUCT To meet laser safety requirements the transceiver shall be operated within the Absolute Maximum Ratings. Note: All adjustments have been made at the factory prior to shipment of the devices. No maintenance or alteration to the device is required. Tampering with or modifying the performance of the device will result in voided product warranty. Failure to adhere to the above restrictions could result in a modification that is considered an act of “manufacturing”, and will require, under law, recertification of the modified product with the U.S. Food and Drug Administration (ref. 21 CFR 1040.10 (i)). Laser Emission Data Wavelength 850 nm Maximum total output power (as defined by IEC: 7 mm aperture at 14 mm distance) 709 µW / –1.5 dBm Beam divergence (full angle) / NA (half angle) 20° / 0.18 rad FDA IEC Complies with 21 CFR 1040.10 and 1040.11 Class 1 Laser Product File: 1401 Figure 4 Required Labels Laser Emission Tx Top view Rx File: 1333 Figure 5 Laser Emission Preliminary Product Information 16 2004-06-28 V23848-N305-C56 Application Notes Application Notes EMI Recommendations To avoid electromagnetic radiation exceeding the required limits set by the standards, please take note of the following recommendations. When Gigabit switching components are found on a PCB (e.g. multiplexer, serializer-deserializer, clock data recovery, etc.), any opening of the chassis may leak radiation; this may also occur at chassis slots other than that of the device itself. Thus every mechanical opening or aperture should be as small as feasible and its length carefully considered. On the board itself, every data connection should be an impedance matched line (e.g. strip line or coplanar strip line). Data (D) and Data-not (Dn) should be routed symmetrically. Vias should be avoided. Where internal termination inside an IC or a transceiver is not present, a line terminating resistor must be provided. The decision of how best to establish a ground depends on many boundary conditions. This decision may turn out to be critical for achieving lowest EMI performance. At RF frequencies the ground plane will always carry some amount of RF noise. Thus the ground and VCC planes are often major radiators inside an enclosure. As a general rule, for small systems such as PCI cards placed inside poorly shielded enclosures, the common ground scheme has often proven to be most effective in reducing RF emissions. In a common ground scheme, the PCI card becomes more equipotential with the chassis ground. As a result, the overall radiation will decrease. In a common ground scheme, it is strongly recommended to provide a proper contact between signal ground and chassis ground at every location where possible. This concept is designed to avoid hotspots which are places of highest radiation, caused when only a few connections between chassis and signal grounds exist. Compensation currents would concentrate at these connections, causing radiation. However, as signal ground may be the main cause for parasitic radiation, connecting chassis ground and signal ground at the wrong place may result in enhanced RF emissions. For example, connecting chassis ground and signal ground at a front panel/bezel/chassis by means of a fiber optic transceiver/cage may result in a large amount of radiation especially where combined with an inadequate number of grounding points between signal ground and chassis ground. Thus the transceiver becomes a single contact point increasing radiation emissions. Even a capacitive coupling between signal ground and chassis ground may be harmful if it is too close to an opening or an aperture. For a number of systems, enforcing a strict separation of signal ground from chassis ground may be advantageous, providing the housing does not present any slots or other discontinuities. This separate ground concept seems to be more suitable in large systems where appropriate shielding measures have also been implemented. The return path of RF current must also be considered. Thus a split ground plane between Tx and Rx paths may result in severe EMI problems. Preliminary Product Information 17 2004-06-28 V23848-N305-C56 Application Notes The bezel opening for a transceiver should be sized so that all contact springs of the transceiver cage make good electrical contact with the face plate. Please consider that the PCB may behave like a dielectric waveguide. With a dielectric constant of 4, the wavelength of the harmonics inside the PCB will be half of that in free space. Thus even the smallest PCBs may have unexpected resonances. Large systems can have many openings in the front panel for SFP transceivers. In typical applications, not all of these ports will hold transceivers; some may be intentionally left empty. These empty slots may emit significant amounts of radiation. Thus it is recommended that empty ports be plugged with an EMI plug as shown in Figure 6. Infineon offers an EMI/dust plug, P/N V23818-S5-B1. SFP Accessories Cage: Infineon Technologies Part Number: V23838-S5-N1/V23838-S5-N1-BB Host Board Connector: Tyco Electronics Part Number: 1367073-1 Cage EMI/Dust Plug: Infineon Technologies Part Number: V23818-S5-B1 Cage Dust Plug: Infineon Technologies Part Number: V23818-S5-B2 CAGE HOST BOARD CONNECTOR CAGE EMI/DUST PLUG iSFP™ HOST BOARD DUST PLUG File: 1521 Figure 6 Preliminary Product Information 18 2004-06-28 V23848-N305-C56 Application Notes EEPROM Serial ID Memory Contents (A0h) Addr. Hex ASCII Name/Description Addr. Hex ASCII Name/Description 0 1 03 04 Identifier Extended identifier 32 33 47 6D G m 2 07 Connector 34 62 b 3 4 08 00 Transceiver optical compatibility 35 36 48 00 H 5 00 37 00 6 7 8 9 10 11 00 00 00 00 00 01 Encoding 38 39 40 41 42 43 03 19 56 32 33 38 V 2 3 8 12 19 BR, nominal 44 34 4 13 00 Reserved 45 38 8 14 00 Length (9 µm) - km 46 2D - 15 00 Length (9 µm) 47 4E N 16 19 Length (50 µm) 48 33 3 17 0C Length (62.5 µm) 49 30 0 18 00 Length (copper) 50 35 5 19 00 Reserved 51 2D - 20 21 22 23 49 6E 66 69 I n f i Vendor name 52 53 54 55 43 35 36 20 C 5 6 24 25 6E 65 n e 56 57 41 34 A 4 26 27 6F 6E o n 58 59 41 39 A 9 28 29 30 20 46 4F 03 52 00 Wavelength F O 60 61 62 31 20 63 8B Check sum of bytes 0 - 62 Preliminary Product Information 19 Vendor name Reserved Vendor OUI Vendor part number Vendor revision, product status dependent Reserved 2004-06-28 V23848-N305-C56 Application Notes EEPROM Serial ID Memory Contents (A0h) (cont’d) Addr. Hex ASCII Name/Description Addr. Hex ASCII Name/Description 64 65 66 00 1A 00 BR, maximum 96 97 98 20 20 20 67 00 BR, minimum 99 20 Vendor serial number 100 101 102 103 20 20 20 20 20 20 20 20 20 68 69 70 71 Transceiver signal options 72 73 74 75 76 20 104 105 106 107 108 77 20 109 20 78 20 110 20 79 20 111 20 80 20 112 20 81 20 113 20 82 20 114 20 83 20 115 20 116 117 20 20 20 20 20 20 20 84 85 Vendor manufacturing date code 86 87 88 89 90 20 118 119 120 121 122 91 20 123 20 92 68 Diagnostic monitoring type 124 20 93 B0 Enhanced options 125 20 94 01 SFF-8472 compliance 126 20 Low order 8 bits of the sum of the contents of all the bytes from byte 64 to byte 94, inclusive 127 128 255 20 00 95 Preliminary Product Information 20 Vendor specific EEPROM Vendor specific. Reserved for future use 2004-06-28 V23848-N305-C56 Application Notes Digital Diagnostic Monitoring Interface – Intelligent Alarm and Warning Thresholds (2-Wire Address A2h) Address # Bytes Name Description Value 00 - 01 2 Temp High Alarm MSB at low address 95°C1) 02 - 03 2 Temp Low Alarm MSB at low address –20°C1) 04 - 05 2 Temp High Warning MSB at low address 90°C1) 06 - 07 2 Temp Low Warning MSB at low address –15°C1) 08 - 09 2 Voltage High Alarm MSB at low address 3.7 V2) 10 - 11 2 Voltage Low Alarm MSB at low address 2.85 V2) 12 - 13 2 Voltage High Warning MSB at low address 3.63 V2) 14 - 15 2 Voltage Low Warning MSB at low address 2.97 V2) 16 - 17 2 Bias High Alarm MSB at low address 20 mA 18 - 19 2 Bias Low Alarm MSB at low address 3.1 mA 20 - 21 2 Bias High Warning MSB at low address 14.8 mA 22 - 23 2 Bias Low Warning MSB at low address 4.6 mA 24 - 25 2 Tx Power High Alarm MSB at low address –3 dBm 26 - 27 2 Tx Power Low Alarm MSB at low address –9.5 dBm 28 - 29 2 Tx Power High Warning MSB at low address –4 dBm 30 - 31 2 Tx Power Low Warning MSB at low address –8.5 dBm 32 - 33 2 Rx Power High Alarm MSB at low address –3.5 dBm 34 - 35 2 Rx Power Low Alarm MSB at low address –17 dBm 36 - 37 2 Rx Power High Warning MSB at low address –4 dBm 38 - 39 2 Rx Power Low Warning MSB at low address –15 dBm 40 - 55 16 Reserved Reserved for future monitored quantities 1) 2) A delta exists between actual transceiver temperature and value shown as measurement is taken internal to an IC located on the underside of the iSFP™ PCB. Transceiver voltage measured after input filter with typical 0.1 V voltage drop. Preliminary Product Information 21 2004-06-28 V23848-N305-C56 Application Notes Calibration Constants for External Calibration Option (2-Wire Address A2h) Address # Bytes Name Description 56 - 59 4 Rx_PWR (4) 60 - 63 4 Rx_PWR (3) Single precision floating point 0 calibration data, Rx optical power. 0 64 - 67 4 Rx_PWR (2) 0 68 - 71 4 Rx_PWR (1) 1 72 - 75 4 Rx_PWR (0) 0 76 - 77 2 Tx_I(Slope) Fixed decimal (unsigned) 1 calibration data, laser bias current. 78 - 79 2 Tx_I (Offset) Fixed decimal (signed two’s complement) calibration data, laser bias current. 0 80 - 81 2 Tx_PWR (Slope) Fixed decimal (unsigned) calibration data, transmitter coupled output power. 1 82 - 83 2 Tx_PWR (Offset) Fixed decimal (signed two’s 0 complement) calibration data, transmitter coupled output power. 84 - 85 2 T (Slope) Fixed decimal (unsigned) calibration data, internal module temperature. 1 86 - 87 2 T (Offset) Fixed decimal (signed two’s complement) calibration data, internal module temperature. 0 88 - 89 2 V (Slope) Fixed decimal (unsigned) calibration data, internal module supply voltage. 1 90 - 91 2 V (Offset) Fixed decimal (signed two’s complement) calibration data, internal module supply voltage. 0 92 - 94 3 Reserved Reserved 95 1 Check sum Byte 95 contains the low order 8 bits of the sum of bytes 0 - 94. Preliminary Product Information 22 Value 2004-06-28 V23848-N305-C56 Application Notes A/D Values and Status Bits (2-Wire Address A2h) Byte Bit Name Description Converted Analog Values. Calibrated 16 Bit Data. 96 All Temperature MSB Internally measured module temperature1) 97 All Temperature LSB 98 All VCC MSB 99 All VCC LSB 100 All Tx Bias MSB 101 All Tx Bias LSB 102 All Tx Power MSB 103 All Tx Power LSB 104 All Rx Power MSB 105 All Rx Power LSB 106 All Reserved MSB Reserved for 1st future definition of digitized analog input 107 All Reserved LSB Reserved for 1st future definition of digitized analog input 108 All Reserved MSB Reserved for 2nd future definition of digitized analog input 109 All Reserved LSB Reserved for 2nd future definition of digitized analog input Internally measured supply voltage in transceiver Internally measured Tx Bias Current Measured Tx output power Measured Rx input power Optional Status/Control Bits 110 7 Tx Disable State2) Digital state of the Tx Disable Input Pin 110 6 Soft Tx Disable2) Read/write bit that allows software disable of laser. Writing 1 disables laser 110 5 Reserved 110 4 Rx Rate Select State2) Digital state of the SFP Rx Rate Select Input Pin 110 3 Soft Rx Rate Select2) Read/write bit that allows software Rx rate select. Writing 1 selects full bandwidth operation. Not implemented. Preliminary Product Information 23 2004-06-28 V23848-N305-C56 Application Notes A/D Values and Status Bits (2-Wire Address A2h) (cont’d) Byte Bit Name Description 110 2 Tx Fault Digital state of the Tx Fault Output Pin 110 1 LOS Digital state of the LOS Output Pin 110 0 Data_Ready_Bar Indicates transceiver has achieved power up and data is ready 111 7-0 Reserved Reserved 1) 2) Temperature measurement is performed on an IC located on the underside of the iSFP™ PCB. Not implemented. Preliminary Product Information 24 2004-06-28 V23848-N305-C56 Application Notes Alarm and Warning Flags (2-Wire Address A2h) Byte Bit Name Description 112 7 Temp High Alarm Set when internal temperature exceeds high alarm level 112 6 Temp Low Alarm Set when internal temperature is below low alarm level 112 5 VCC High Alarm Set when internal supply voltage exceeds high alarm level 112 4 VCC Low Alarm Set when internal supply voltage is below low alarm level 112 3 Tx Bias High Alarm Set when Tx Bias current exceeds high alarm level 112 2 Tx Bias Low Alarm Set when Tx Bias current is below low alarm level 112 1 Tx Power High Alarm Set when Tx output power exceeds high alarm level 112 0 Tx Power Low Alarm Set when Tx output power is below low alarm level 113 7 Rx Power High Alarm Set when received power exceeds high alarm level 113 6 Rx Power Low Alarm Set when received power is below low alarm level 113 5 Reserved Alarm 113 4 Reserved Alarm 113 3 Reserved Alarm 113 2 Reserved Alarm 113 1 Reserved Alarm 113 0 Reserved Alarm 114 All Reserved 115 All Reserved 116 7 Temp High Warning Set when internal temperature exceeds high warning level 116 6 Temp Low Warning Set when internal temperature is below low warning level 116 5 VCC High Warning Set when internal supply voltage exceeds high warning level Preliminary Product Information 25 2004-06-28 V23848-N305-C56 Application Notes Alarm and Warning Flags (2-Wire Address A2h) (cont’d) Byte Bit Name Description 116 4 VCC Low Warning Set when internal supply voltage is below low warning level 116 3 Tx Bias High Warning Set when Tx bias current exceeds high warning level 116 2 Tx Bias Low Warning Set when Tx bias current is below low warning level 116 1 Tx Power High Warning Set when Tx output power exceeds high warning level 116 0 Tx Power Low Warning Set when Tx output power is below low warning level 117 7 Rx Power High Warning Set when received power exceeds high warning level 117 6 Rx Power Low Warning Set when received power is below low warning level 117 5 Reserved Warning 117 4 Reserved Warning 117 3 Reserved Warning 117 2 Reserved Warning 117 1 Reserved Warning 117 0 Reserved Warning 118 All Reserved 119 All Reserved Vendor Specific Memory Addresses (2-Wire Address A2h) Address # Bytes Name Description 120 -127 8 Vendor Specific Vendor specific User EEPROM (2-Wire Address A2h) Address # Bytes Name Description 128 - 247 120 User EEPROM User writable EEPROM 248 - 255 8 Vendor Specific Vendor specific control functions Preliminary Product Information 26 2004-06-28 V23848-N305-C56 Application Notes Multimode 850 nm iSFP™ Transceiver, AC/AC TTL Host Board Infineon iSFP™ Transceiver 3.3 V 1 µH Protocol VCC 10 µF VCCT 1 µH 0.1 µF 0.1 µF Protocol VCC 16 xx 1) VEET 4.7 to 10 kΩ 1/17/20 4.7 to 10 kΩ Tx Disable Tx Fault Tx Disable 3 Tx Fault 2 TD– 19 0.1 µF Laser Driver 100 Ω TD+ 18 VCCR 15 0.1 µF Protocol IC ASIC IC 4.7 to 10 kΩ 10 µF 0.1 µF xx 1) VEER 9/10/11/14 RD+ 13 0.1 µF RD– 12 0.1 µF LOS 8 Rate Select 2) 7 Pre-Amp./ Post Amp. 100 Ω LOS Rate Select 2) Diagnostic IC / EEPROM 3.3 V PLD / PAL 4.7 to 10 kΩ 4.7 to 10 kΩ 4.7 to 10 kΩ 6 5 4 MOD-DEF(0) MOD-DEF(1) MOD-DEF(2) 1) Design criterion of the capacitor used is the resonant frequency and its value must be in the order of the nominal data rate. Use of single layer capacitors recommended. Short trace lengths are mandatory. 2) Not implemented. File: 1319 Figure 7 Example iSFP™ Host Board Schematic and Recommended Host Board Supply Filtering Network Preliminary Product Information 27 2004-06-28 V23848-N305-C56 Package Outlines 13.4 13.7 Package Outlines 56.5 6.25 8.5 1.3 13.7 10.3 11.6 47.5 Dimensions in mm File: 1215 Figure 8 TRANSCEIVER TEMPERATURE REFERENCE POINT 29.80 Dimensions in mm File: 1224 Figure 9 Preliminary Product Information 28 2004-06-28 V23848-N305-C56 Revision History: 2004-06-28 Previous Version: 2004-01-28 Page Subjects (major changes since last revision) 8, 19, 21, 23 Tables changed 10 Table “Electrical Characteristics” changed 16 Eye Safety changed Table “Laser Emission Data” changed 27 Figure 7 Host Board Schematic changed DS2 Edition 2004-06-28 Published by Infineon Technologies AG, St.-Martin-Strasse 53, 81669 München, Germany © Infineon Technologies AG 2004. All Rights Reserved. Attention please! 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