19-2433; Rev 2; 3/05 Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs Applications ♦ 4MHz to 33MHz Tunable LP Filters ♦ Complete Synthesizer with I2C™ Interface ♦ Analog RF VGA and Digital Baseband VGA ♦ Multiple I2C Addresses for Multituner Applications ♦ Single-Ended (MAX2116) and Differential (MAX2118) I/Q Interface Ordering Information PART TEMP RANGE PIN-PACKAGE MAX2116UTL 0°C to +85°C 40 Thin QFN-EP* (6mm x 6mm) MAX2118UTL 0°C to +85°C 40 Thin QFN-EP* (6mm x 6mm) *EP = Exposed pad. IDC- IOUT+ IOUT(MAX2118 ONLY) VCCBB QOUT+ QOUT(MAX2118 ONLY) AS0 N.C. Pin Configuration/ Functional Diagram VCCRF2 The devices include fully monolithic VCOs, as well as a complete frequency synthesizer. Additionally, an onchip crystal oscillator is provided along with a buffered output for driving additional tuners and demodulators. Synthesizer programming and device configuration are accomplished with a 2-wire serial interface. For multituner applications, each device can be configured to have one of eight possible 2-wire interface addresses. Simplifying the interface to low-voltage CMOS demodulators, the MAX2116/MAX2118 incorporate two 2.85V regulated outputs for pulling up open-drain interface connections, thus preventing noisy 3V rails from corrupting the sensitive analog signal of the tuners. The MAX2116/MAX2118 devices are the most versatile family of DBS products available. With both singleended and differential baseband outputs, these devices are compatible with virtually all QPSK/8-PSK demodulators. The tuners are available in a very small 40-pin thin QFN package. ♦ Supports 1Mbaud to 45Mbaud, 925MHz to 2175MHz Operation QDC+ Each IC includes an LNA with gain control, I and Q downconverting mixers, and baseband lowpass filters gain and cutoff frequency control. Together, the RF and baseband variable gain amplifiers provide more than 79dB of gain control range. ♦ Fully Integrated VCOs QDC- The MAX2116/MAX2118 family of low-cost directconversion tuner ICs are designed for use in digital direct broadcast satellite (DBS) television applications, professional VSAT systems, and two-way Internet through satellite applications. These devices set the standard for integration and performance, significantly reducing the required RF know-how for design implementation. Uniquely architected, the MAX2116/MAX2118 simplify direct main board and tuner module designs. The MAX2116/MAX2118 devices directly convert Lband signals to baseband using a broadband I/Q downconverter. The operating frequency range extends from 925MHz to 2175MHz. Features 40 39 38 37 36 35 34 33 32 31 1 DC OFFSET CORRECTION IDC+ 30 VCCDIG 29 SCL 28 VREG2 27 SDA 26 AS1 25 N.C. 24 XTALOUT 23 CNTOUT 22 XTAL- 21 XTAL+ LPF BW CONTROL 2 DAC VCCRF1 RFIN- 4 RFIN+ 5 DVB N.C. 6 DSS (U.S.) GC1 7 INTERFACE LOGIC AND CONTROL GC2 3 DIV2/ DIV4 MAX2118 /N /R PFD 8 VOLTAGE REGULATOR ADC Internet Through Satellite TANK 18 19 20 CFLT 17 IFLT 16 VTUNE TANK 15 AS2 14 LOFLT 13 TANK TANK TANK TANK 12 VCCVCO I2C is a trademark of Philips Corp. N.C. 11 VCCLO PAD 10 TANK 9 TANK N.C. CP VCCCPX VREG1 CPOUT VSAT ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX2116/MAX2118 General Description MAX2116/MAX2118 Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs ABSOLUTE MAXIMUM RATINGS VCC to GND ...........................................................-0.3V to +5.5V All Other Pins to GND .................................-0.3V to (VCC + 0.3V) RFIN+ to RFIN-, XTL+ to XTL-, IDC+ to IDC-, QDC+ to QDC- ...................................................................±2.0V CNTOUT, XTALOUT, CPOUT, VREG1/2, I/QOUT± to GND Short-Circuit Duration.................................10s Continuous Current (any pin other than VCC or GND) .......10mA Continuous Power Dissipation (TA = +85°C) 40-Pin Thin QFN (derate 23.3mW/°C above +85°C) .... 1.86W Operating Temperature Range ..............................0°C to +85°C Junction Temperature .....................................................+150°C Storage Temperature Range ............................-65°C to +160°C Soldering Temperature (10s) ..........................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (VCC = +4.75V to +5.25V, GND = 0V, GC1 = +0.75V; no AC signal applied, default register settings, TA = 0°C to +85°C, unless otherwise noted. Typical values are at VCC = +5V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER CONDITIONS MIN TYP MAX UNITS SUPPLY Supply Voltage Supply Current 4.75 LO locked at 2175MHz 195 5.25 V 265 mA ANALOG GAIN CONTROL INPUT—GC1 Usable Voltage Range Input Current 0.75V < GC1 < 2.6V (Note 2) 0.75 2.6 V -50 +50 µA BASEBAND OUTPUTS— IOUT, QOUT (MAX2116) Nominal Output Voltage Swing RLOAD = 1kΩ // 10pF (Note 3) Output Clipping Voltage DC Output Voltage 0.8 VP-P 2 VP-P 1.2 V BASEBAND OUTPUTS— IOUT±, QOUT± (MAX2118) Nominal Output Voltage Swing RLOAD = 2kΩ // 10pF (differential) (Note 3) Bit DL = high 1 Bit DL = low 0.59 Output Clipping Voltage VP-P 2 VP-P Common-Mode Voltage 0.65 0.75 0.85 V DC Offset Voltage -50 0 +50 mV 2.7 2.85 3.05 V 3 mA ANALOG OUTPUT— VREG1, VREG2 Output Voltage Source Current Each output STATIC CONTROL INPUTS—AS2, AS1, AS0 Input Voltage High 4 V Input Voltage Low Input Current -50 0.5 V +50 µA SYNTHESIZER DC PARAMETERS Charge Pump Source/Sink Current 2 Bits CP1 = 0, CP0 = 0 ±35 ±50 ±68 Bits CP1 = 0, CP0 = 1 ±70 ±100 ±136 Bits CP1 = 1, CP0 = 0 ±140 ±200 ±272 Bits CP1 = 1, CP0 = 1 ±280 ±400 ±544 _______________________________________________________________________________________ µA Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs (VCC = +4.75V to +5.25V, GND = 0V, GC1 = +0.75V, no AC signal applied, default register settings, TA = 0°C to +85°C, unless otherwise noted. Typical values are at VCC = +5V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER CONDITIONS MAX UNITS -10 +10 nA 0.4 VCC 0.6 V Clock Rate 400 kHz Input Logic Level Low 1.5 Charge Pump Off-Leakage Current Charge Pump Output Voltage Compliance Charge-pump positive-to-negative current matching of ±10% MIN TYP I2C INTERFACE—SDA, SCL Input Logic Level High 2.3 Input Hysteresis 0.2 Input Current -10 Output Logic Level Low 6mA sink current V V V +10 0.6 µA V VTUNE ADC Resolution 3 Input Voltage Range ADC Reference Ladder Trip Point (Note 4) 0 ADC read bits Bits VCC 110 to 111 VCC 0.70 VCC 0.65 VCC 0.60 101 to 110 2.8 2.97 3.14 100 to 101 1.91 2.03 2.15 011 to 100 1.29 1.38 1.47 010 to 011 0.87 0.94 1.01 001 to 010 0.60 0.65 0.70 000 to 001 0.40 0.44 0.48 V V AC ELECTRICAL CHARACTERISTICS (MAX2116/MAX2118 EV kits, VCC = +4.75V to +5.25V, GC1 and GC2 set for maximum gain, GND = 0V, IOUT = QOUT = 800mVP-P (MAX2116), loaded with 1kΩ IOUT± = QOUT± = 590mVP-P differential (DL = 0, MAX2118), IOUT± = QOUT± = 1VP-P differential (DL = 1, MAX2118), loaded with differential 2kΩ. Baseband LPF BW = 33MHz, fRFIN = 2175MHz. For default register values, see the Serial Interface and Control Registers section. TA = +25°C to +85°C. Typical values are at VCC = +5V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER CONDITIONS MIN TYP MAX UNITS 2175 MHz RF FRONT END RF Input Frequency Range Input Carrier Levels Necessary to Produce 800mVP-P at I/Q Baseband Outputs (MAX2116) TA = 0°C to +85°C 925 GC1 = 0.75V (max gain), bits GC2(4) - GC2(0) = 00000 (max gain), for output ≥ 800 mVP-P -77 -72 dBm GC1 = 2.6V (min gain), bits GC2(4) - GC2(0) = 11111 (min gain), for output ≤ 800mVP-P 3 16 _______________________________________________________________________________________ 3 MAX2116/MAX2118 DC ELECTRICAL CHARACTERISTICS (continued) MAX2116/MAX2118 Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs AC ELECTRICAL CHARACTERISTICS (continued) (MAX2116/MAX2118 EV kits, VCC = +4.75V to +5.25V, GC1 and GC2 set for maximum gain, GND = 0V, IOUT = QOUT = 800mVP-P (MAX2116), loaded with 1kΩ IOUT± = QOUT± = 590mVP-P differential (DL = 0, MAX2118), IOUT± = QOUT± = 1VP-P differential (DL = 1, MAX2118), loaded with differential 2kΩ. Baseband LPF BW = 33MHz, fRFIN = 2175MHz. For default register values, see the Serial Interface and Control Registers section. TA = +25°C to +85°C. Typical values are at VCC = +5V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER Input Carrier Levels Necessary to Produce 1VP-P (Differential) at I/Q Baseband Outputs (MAX2118) Input Carrier Levels Necessary to Produce 590mVP-P (Differential) at I/Q Baseband Outputs (MAX2118) CONDITIONS MIN GC1 = 0.75V (max gain), bit DL = 1, bits GC2(4) - GC2(0) = 00000 (max gain) for output ≥ 800mVP-P TYP MAX -77 -72 UNITS dBm GC1 = 2.6V (min gain), bit DL = 1, bits GC2(4) - GC2(0) = 11111 (min gain), for output ≤ 800mVP-P 3 GC1 = 0.75V (max gain), bit DL = 0, bits GC2(4) - GC2(0) = 00000 (max gain), for output ≥ 800mVP-P 16 -77 -72 dBm GC1 = 2.6V (min gain), bit DL = 0, bits GC2(4) - GC2(0) = 11111 (min gain), for output ≤ 800 mVP-P 3 16 RF Gain Control (GC1) Range 0.75V < GC1 < 2.6V 60 69 dB Baseband Gain Control (GC2) Range Bits GC2(4) - GC2(0) = 00000 to 11111 19 24 dB IIP3 (Note 5) 10 dBm IIP2 (Note 6) 22 dBm NF GC1 = 0.75V (max gain), bits GC2(4) - GC2(0) = 00000 (max gain) 10.5 dB Minimum RF Input Return Loss 75Ω input source, 925MHz < fRFIN < 2175MHz 13.5 Maximum LO Leakage at RFIN 925MHz < fLO < 2175MHz -80 LO-Generated RFIN Second Harmonic Rejection Unwanted in 925MHz to 2175MHz band 33 50 Unwanted = 2250MHz 30 45 dB -63 dBm dB 6dB/oct Unwanted above 2250MHz BASEBAND OUTPUTS Baseband I/Q Output Impedance Single ended, real ZOUT 30 Ω Baseband Highpass -3dB Point 0.1µF capacitors at IDC±, QDC± 850 Hz Quadrature Phase Error 125kHz baseband test tone 4 Quadrature Gain Error 125kHz baseband test tone 1.2 dB Baseband Lowpass BW Range Baseband -3dB cutoff frequency 4 33 MHz Fc = 4MHz -5.5 +5.5 % Fc = 33MHz (Note 7) -10 +10 % LP Filter BW Accuracy Ratio of In-Filter-Band to Out-of-Filter-Band Noise 4 Finband = 100Hz to 22.5MHz, Foutband = 87.5MHz to 112.5MHz 25 _______________________________________________________________________________________ Degrees dB Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs (MAX2116/MAX2118 EV kits, VCC = +4.75V to +5.25V, GC1 and GC2 set for maximum gain, GND = 0V, IOUT = QOUT = 800mVP-P (MAX2116), loaded with 1kΩ IOUT± = QOUT± = 590mVP-P differential (DL = 0, MAX2118), IOUT± = QOUT± = 1VP-P differential (DL = 1, MAX2118), loaded with differential 2kΩ. Baseband LPF BW = 33MHz, fRFIN = 2175MHz. For default register values, see the Serial Interface and Control Registers section. TA = +25°C to +85°C. Typical values are at VCC = +5V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER CONDITIONS MIN TYP MAX UNITS VCO PERFORMANCE VCO Tuning Range VCO 0 to VCO 7 coverage VCO Tuning Gain Worst case, any VCO, any tuning voltage LO Phase Noise Referred to Mixer LO Port Bit DIV2 = 1, fLO = 2175MHz 2250 4500 500 10kHz offset -75 100kHz offset -99 MHz MHz/V dBc/Hz SYNTHESIZER PERFORMANCE Phase Detector Comparison Frequency 0.15 Reference Divide Range RF Divide Range Level at XTALOUT 4MHz to 27MHz, driving 10pF 2 128 256 32768 0.75 PLL-Referred Phase Noise Floor XTAL Frequency Range 2 1 1.5 -143 4 MHz VP-P dBc/Hz 27 MHz Note 1: Parameters are production tested at TA = +25°C and +85°C; limits called out at 0°C are guaranteed by design and characterization and are not production tested. Note 2: GCI gain control is guaranteed over this voltage range. 0.75V corresponds to maximum gain and 2.6V corresponds to minimum gain. Note 3: RF front-end specification met at this output level. Note 4: The VTUNE ADC transfer curve has been tailored to that of the VCO tuning curve. Note 5: Input IP3 test conditions: VGC1 set to provide 800mVP-P (MAX2116), 1VP-P differential (MAX2118, DL = high), 0.59VP-P differential (MAX2118 DL = low) baseband output when mixing down a -25dBm tone at 2175MHz to 5MHz baseband, with VGC2 = 00000. Two tones at -18dBm each are applied at fLO -100MHz and fLO -195MHz; IM3 tone at 5MHz is measured at baseband but is referred to RF input. Note 6: Input IP2 test conditions: VGC1 set to provide 800 mVP-P (MAX2116), 1VP-P differential (MAX2118, DL = high), 0.59VP-P differential (MAX2118 DL = low) baseband output when mixing down a -25dBm tone at 2175MHz to 5MHz baseband, with VGC2 = 0.75V. Two tones at -25dBm each are applied at fRF = 925MHz and fRF = 1245MHz; IM2 tone at fLO - 5MHz is measured at baseband but is referred to RF input. Note 7: These parameters are guaranteed by design and characterization, and are not production tested. _______________________________________________________________________________________ 5 MAX2116/MAX2118 AC ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (MAX2116/MAX2118 EV kits, VCC = +4.75V to +5.25V, GC1 and GC2 set for maximum gain, GND = 0V, IOUT = QOUT = 800 mVP-P (MAX2116), loaded with 1kΩ IOUT± = QOUT± = 590mVP-P differential (DL = 0, MAX2118), IOUT± = QOUT± = 1VP-P differential (DL = 1, MAX2118), loaded with differential 2kΩ. Baseband LPF BW = 33MHz, fRFIN = 2175MHz. For default register values, see the Serial Interface and Control Registers section. TA = 0°C to +85°C. Typical values are at VCC = +5V, TA = +25°C, unless otherwise noted.) 3RD HARMONIC vs. FUNDAMENTAL TONE BASEBAND OUTPUT 190 0°C -50 170 -60 160 -70 4.75 4.85 4.95 5.05 5.15 96 94 92 90 88 86 84 82 1.0 BASEBAND I/Q AMPLITUDE MATCHING (dB) 80 1000 1100 1200 1300 5 10 15 20 25 fXTL = 4MHz, M = 2, FDAC = 59 (fC = 25MHz) 0.8 0.6 0.2 0 -0.8 -0.6 -0.4 -0.2 5 10 15 20 25 BASEBAND FILTER 3dB FREQUENCY vs. FDAC AND TEMPERATURE 30 25 20 15 10 5 0 80 FDAC (DECIMAL) MAX2116 toc03 900 1300 100 120 1700 2500 2100 LO FREQUENCY (MHz) 5 fC = 22MHz -5 -15 -25 -35 -45 -55 fXTL = 4MHz, M = 2 45 0.1 1.0 10 40 VREG1, VREG2: VOUT vs. IOUT 3.0 +85°C 2.5 +25°C +25°C 35 2.0 30 25 100 BASEBAND FREQUENCY (MHz) 0°C 0°C 1.5 20 15 1.0 +85°C 10 0.5 5 0 60 82 500 VOUT (V) 35 50 BASEBAND FILTER 3dB FREQUENCY (MHz) MAX2116 toc07 BASEBAND FILTER 3dB FREQUENCY vs. FDAC 40 84 35 30 BASEBAND FREQUENCY (MHz) 20 86 -65 0 BASEBAND FREQUENCY (MHz) 40 0 88 BASEBAND FREQUENCY RESPONSE 0.4 35 30 fXTL = 4MHz, M = 2 45 90 1400 -1.0 50 6 900 MAX2116 toc08 BASEBAND I/Q PHASE ERROR (DEGREES) fXTL = 4MHz, M = 2, FDAC = 59 (fC = 25MHz) 0 92 BASEBAND I/Q AMPLITUDE MATCHING vs. BASEBAND FREQUENCY MAX2116 toc04 BASEBAND I/Q PHASE ERROR vs. BASEBAND FREQUENCY 98 94 FUNDAMENTAL TONE BASEBAND OUTPUT (mVP-P) SUPPLY VOLTAGE (V) 100 96 80 800 5.25 BASEBAND OUTPUT REL TO FULL SCALE (dB) 180 -40 MAX2116 toc05 200 -30 98 MAX2116 toc06 +25°C -20 100 MAX2116 toc09 +85°C 210 FUNDAMENTAL TONE AT 7MHz, 3RD HARMONIC AT 21MHz, RELATIVE TO FUNDAMENTAL -10 3RD HARMONIC (dBc) 220 MAX2116 toc02 230 SUPPLY CURRENT (mA) 0 MAX2116 toc01 240 BASEBAND I/Q PHASE ERROR vs. LO FREQUENCY BASEBAND I/Q PHASE ERROR (DEGREES) SUPPLY CURRENT vs. SUPPLY VOLTAGE BASEBAND FILTER 3dB FREQUENCY (MHz) MAX2116/MAX2118 Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs 0 0 25 50 75 FDAC (DECIMAL) 100 125 0 1 2 3 4 IOUT (mA) _______________________________________________________________________________________ 5 6 7 8 Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs BASEBAND GAIN vs. GC2 -5 -50 -60 -15 -80 5 20 25 30 35 900 15 13 12.5 GC1 ADJUSTED FOR FULL-SCALE BASEBAND OUTPUT WITH PRFIN = -25dBm. FROM TOP TO BOTTOM: GC2 = 0, 5, 10, 15, 20, 25, 30 IIP2 vs. GC2 26.0 25.0 24.5 11.5 IIP2 (dBm) 12.0 9 7 5 10.5 15 20 25 30 23.5 23.0 22.5 22.0 1 21.5 21.0 925 35 GC2 1125 1325 1525 1725 1925 2125 2325 0 RF INPUT RETURN LOSS vs. FREQUENCY 20 19 4.0 3.5 18 4.0 3.5 2.5 2.0 1.5 14 1.0 1.0 13 0.5 0.5 0 1500 2000 FREQUENCY (MHz) 2500 3000 FROM TOP TO BOTTOM: TEMPERATURE = +85°C, +55°C, +25°C, 0°C 2.0 1.5 1000 30 25 2.5 15 12 20 3.0 VTUNE (V) VTUNE (V) 16 15 VCO_4: VTUNE vs. VCO FREQUENCY 4.5 3.0 17 10 GC2 (DECIMAL) VTUNE vs. VCO FREQUENCY 4.5 MAX2116 toc16 Z0 = 75Ω 500 5 LO FREQUENCY (MHz) MAX2116 toc17 10 24.0 3 -1 10.0 GC1 = 0.75V, fLO = 2175MHz 25.5 11 5 1100 1300 1500 1700 1900 2100 2300 LO FREQUENCY (MHz) MAX2116 toc14 MAX2116 toc13 GC1 = 0.75V, fLO = 1500MHz IIP3 (dBm) NOISE FIGURE (dB) 17 11.0 RF INPUT RETURN LOSS (dB) 15 IIP3 vs. LO FREQUENCY 13.0 21 10 GC2 (DECIMAL) NOISE FIGURE vs. GC2 0 10.0 9.0 0 GC1 (V) 13.5 +25°C 9.5 -25 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 10.5 0°C -20 FROM TOP TO BOTTOM: GC2 = 30, 25, 20, 15, 10, 5, 0 -70 -10 MAX2116 toc15 -40 +85°C 11.0 MAX2116 toc18 -30 GC1 = 0.75V, GC2 = 0 11.5 NOISE FIGURE (dB) -20 GC1 = 1.86V, RFIN = -40dBm, fLO = 1550MHz, fCBB = 20MHz, fBB = 1MHz 12.0 MAX2116 toc11 -10 BASEBAND GAIN (dB) RF INPUT POWER (dBm) 0 NOISE FIGURE vs. LO FREQUENCY 0 MAX2116 toc10 10 MAX2116 toc12 RF INPUT POWER vs. GC1 (BASEBAND OUTPUT = 800mVP-P) 0 2100 2600 3100 3600 4100 4600 5100 5600 VCO FREQUENCY (MHz) 3250 3350 3450 3550 3650 3750 3850 VCO FREQUENCY (MHz) _______________________________________________________________________________________ 7 MAX2116/MAX2118 Typical Operating Characteristics (continued) (MAX2116/MAX2118 EV kits, VCC = +4.75V to +5.25V, GC1 and GC2 set for maximum gain, GND = 0V, IOUT = QOUT = 800 mVP-P (MAX2116), loaded with 1kΩ IOUT± = QOUT± = 590mVP-P differential (DL = 0, MAX2118), IOUT± = QOUT± = 1VP-P differential (DL = 1, MAX2118), loaded with differential 2kΩ. Baseband LPF BW = 33MHz, fRFIN = 2175MHz. For default register values, see the Serial Interface and Control Registers section. TA = 0°C to +85°C. Typical values are at VCC = +5V, TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (MAX2116/MAX2118 EV kits, VCC = +4.75V to +5.25V, GC1 and GC2 set for maximum gain, GND = 0V, IOUT = QOUT = 800 mVP-P (MAX2116), loaded with 1kΩ IOUT± = QOUT± = 590mVP-P differential (DL = 0, MAX2118), IOUT± = QOUT± = 1VP-P differential (DL = 1, MAX2118), loaded with differential 2kΩ. Baseband LPF BW = 33MHz, fRFIN = 2175MHz. For default register values, see the Serial Interface and Control Registers section. TA = 0°C to +85°C. Typical values are at VCC = +5V, TA = +25°C, unless otherwise noted.) FROM TOP TO BOTTOM: VCO7, VCO6, VCO5, VCO4 475 425 250 KV (MHz/V) 375 200 150 325 275 225 175 100 50 0 1.0 1.6 2.2 2.8 3.4 4.0 -74 -76 -78 -80 -82 -84 -86 75 -88 -90 0.4 1.0 1.6 VTUNE (V) 2.2 2.8 925 4.0 3.4 1175 LO-TO-RFIN LEAKAGE vs. FREQUENCY -65 -70 -75 -80 -85 -90 MAX2116 toc23 -60 -60 LO-TO-RFIN LEAKAGE (dBm) fLO = 2175MHz fCOMP = 1MHz -55 MAX2116 toc22 -50 1425 -70 -80 -90 -100 -110 -95 -120 -100 1 10 OFFSET FREQUENCY (kHz) 8 100 1675 FREQUENCY (MHz) VTUNE (V) PHASE NOISE vs. OFFSET PHASE NOISE (dBc/Hz) fCOMP = 1MHz -72 125 25 0.4 -70 PHASE NOISE (dBc/Hz) FROM TOP TO BOTTOM: VCO3, VCO2, VCO1, VCO0 MAX2116 toc20 525 MAX2116 toc19 350 300 PHASE NOISE AT 10kHz OFFSET vs. FREQUENCY VCO (4-7) KV vs. VTUNE MAX2116 toc21 VCO (0-3) KV vs. VTUNE KV (MHz/V) MAX2116/MAX2118 Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs 925 1175 1425 1675 1925 2175 FREQUENCY (MHz) _______________________________________________________________________________________ 1925 2175 Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs PIN NAME FUNCTION 1, 2 IDC-, IDC+ 3 VCCRF1 4 RFIN- 75Ω RF-Inverting Input. Working in conjunction with RFIN+ for differential input. Terminate with 22pF capacitor in series with a 75Ω resistor to GND for single-ended input. 5 RFIN+ 75Ω RF Noninverting Input. Working in conjunction with RFIN- for differential input. Connect to source through a 22pF series capacitor. 6, 9, 11, 25, 31 N.C. No Connection. Pin should be connected directly to GND. 7 GC1 Gain Control Input for RF Front End. High-impedance analog input with an operating range of 0.75V to 2.6V. VGC1 = 0.75V corresponds to maximum gain. 8, 28 VREG1, VREG2 10 PAD Ground. Direct connection to exposed pad. Can be used to check exposed pad continuity to ground. 12 VCCLO DC Power Supply for LO Circuits. Connect to a 5V ±5% low-noise supply. Bypass with a 1nF capacitor directly to GND. Do not share vias. 13 VCCVCO DC Power Supply for VCO Circuits. Connect to a 5V ±5% low-noise supply. See the Applications Information section for more details. 14 LOFLT LO Internal Regulator Bypass. Bypass with a 0.22µF ceramic chip capacitor to GND. 15, 26, 32 AS2, AS1, AS0 I2C Address Select Control. See Table 1 and Table 2. These pins are internally pullup to VCC. For logic high, leave these pins open. 16 VTUNE 17 CPOUT 18 IFLT 19 VCCCPX DC Power Supply for Charge Pump and XTAL Oscillator Circuits. Connect to a 5V ±5% lownoise supply. Bypass with a 1nF capacitor directly to GND. Do not share vias. 20 CFLT Bypass for Internal Crystal Oscillator Bias. Bypass with a 0.22uF ceramic chip capacitor to GND. 21, 22 XTL+, XTAL- 23 CNTOUT I-Channel Baseband DC Offset Correction. Connect a 0.1µF ceramic chip capacitor from IDCto IDC+. DC Power Supply for LNA and First-Stage RF VGA. Connect to a 5V ±5% low-noise supply. Bypass with a 1nF capacitor directly to GND. Do not share vias. 2.85V Linear Regulator. Used for terminating open-drain interfaces from demodulator. Each regulator can source 3mA. High Impedance VCO Tune Input Charge-Pump Output Test Pin. For normal operation, connect IFLT to ground. Crystal Oscillator Interface. See Typical Operating Circuit. Test Pin. Must be left open. 24 XTALOUT Crystal Oscillator Buffer Output. Requires a 10nF DC-blocking capacitor. 27, 29 SDA, SCL I2C Data and Clock Interface. See the Applications Information section for details. 30 VCCDIG 33 N.C. (MAX2116) DC Power Supply for Digital Circuits. Connect to a 5V ±5% low-noise supply. Bypass with a 1nF capacitor directly to GND. Do not share vias. No Connection. Pin should be connected directly to GND. QOUT- (MAX2118) Inverting Baseband Quadrature Output _______________________________________________________________________________________ 9 MAX2116/MAX2118 Pin Description Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs MAX2116/MAX2118 Pin Description (continued) PIN NAME 34 QOUT+ Noninverting Baseband Quadrature Output VCCBB DC Power Supply for Baseband Circuits. Connect to a 5V ±5% low-noise supply. Bypass with a 1nF capacitor directly to GND. Do not share vias. 35 36 FUNCTION N.C. (MAX2116) No Connection. Pin should be connected directly to GND. IOUT - (MAX2118) Inverting Baseband In-Phase Output 37 IOUT/IOUT+ Noninverting Baseband In-Phase Output 38 VCCRF2 39, 40 QDC+, QDC- Q-Channel Baseband DC Offset Correction. Connect a 0.1µF ceramic chip capacitor from QDC- to QDC+. — Exposed Pad Ground DC Power Supply for RF Circuits and Second-Stage RF VGA Circuits. Connect to a 5V ±5% lownoise supply. Bypass with a 1nF capacitor directly to GND. Do not share vias. Detailed Description Applications Information The MAX2116/MAX2118 downconvert RF signals in the 925MHz to 2175MHz range directly to baseband I/Q signals. They are targeted for digital DBS tuner applications. However, the MAX2116/MAX2118 are applicable to any system requiring a broadband I/Q downconversion. Adequate filtering of the VCC connection to the VCCVCO supply pin is critical to achieve low phase noise performance. See the Typical Operating Circuit. Internally, the MAX2116/MAX2118 consist of a broadband front-end LNA and variable gain stage, quadrature downconverter, monolithic broadband VCOs, complete frequency synthesizer, crystal reference oscillator and buffer amplifier, programmable baseband lowpass filters, high-linearity I and Q baseband amplifiers, and offset correction amplifiers. The MAX2116/MAX2118 feature a front-end VGA dynamic range in excess of 60dB. Additionally, the baseband VGA provides in excess of 19dB of additional gain control. The VSWR at RFIN is unaffected by the VGA setting. The MAX2116/MAX2118 include programmable onchip 7th-order Butterworth lowpass filters. The filter bandwidth is adjusted by setting two internal registers (M, FDAC). The M counter should be set such that the crystal frequency divided by M is between 1MHz and 2.5MHz. The FDAC register is then used to fine tune the bandwidth. The -3dB cutoff frequency is determined by the following equation: f(3dB) = fXTAL / M ✕ (4 + 0.145 ✕ FDAC) The MAX2116/MAX2118 include completely monolithic VCOs to cover the entire 925MHz to 2175MHz frequency range. The complete frequency range is covered within a 5V tuning range, thus eliminating the need for costly 30V supplies and varactor diodes. The VCO architecture also eliminates problems associated with frequency pulling with high receive input signal levels. VCCVCO (Pin 13) Bypass Baseband LPFs where M and FDAC are decimals. The filter can be adjusted from approximately 4MHz to 33MHz. Total device supply current is dependent on the filter BW setting, with increasing current commensurate with increasing 3dB BW. I/Q Output Voltage Level The MAX2116 I/Q outputs are single-ended and optimized for a nominal output voltage drive of 800mVP-P. Output clipping levels are typically 2VP-P. The MAX2118 I/Q outputs are differential, with two possible nominal output voltage levels. The nominal output voltage swing is set through the DL bit Byte 04 (see register table description). With DL = low, the nominal output voltage swing is 590mVP-P differential; DL = high 10 ______________________________________________________________________________________ Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs higher frequency crystals (>20MHz). Recommended values are between 2kΩ and 5kΩ. Serial Interface and Control Registers DC Offset Compensation IDC± and QDC± The baseband highpass response is set through a capacitor connected between IDC+ and IDC- for the I channel and QDC+ and QDC- for the Q channel. The 3dB highpass bandwidth is determined by the following equation: F3dB (highpass in Hz) = 1 / (11.75kΩ ✕ C), C in farads To reduce the potential for baseband spurious pickup, keep the connection between the DC compensation capacitors and the IDC± and QDC± pins as short as possible by placing the capacitors as close to the device as manufacturing allows. VREG1 and VREG2 The MAX2116/MAX2118 include two 2.85V voltage regulator outputs, with a maximum source current rating of 3mA each. These outputs ease the interface to low-voltage demodulators by providing a clean pullup termination for open-drain/collector outputs. VREG1 is located by the GC1 input control, with VREG2 conveniently located between the 2-wire interface control pins. VCO Selection The MAX2116/MAX2118 include eight fully monolithic VCOs to cover the entire 925MHz to 2175MHz range. Maxim has a detailed application note that describes the operation of the VCO system and proper selection of the desired VCO. This application note is available by request from Maxim. Programming Bits The MAX2116/MAX2118 conform to the Philips I 2C standard, 400kbps (fast mode), and operate as a slave. The MAX2116/MAX2118 have eight read and write addresses, which are determined by the logic state of the three address-select pins (AS2, AS1, and AS0). In all cases, the MSB is transmitted and read first (see Tables 1, 2, 3). Programming Bit Definition Byte 00 (Default = 03) Bit DIV2 controls the VCO frequency divider. High level = divide-by-2 enabled; low level = divide-by-4 enabled. Default is DIV2 = 0 (divide-by-4 enabled). Bits N(14)–N(8) are the 7 upper bits of the 15-bit programmable N divider, with the default value of N = 950. The overall VCO divide ratio is: 214 ✕ N(14) + 213 ✕ N(13) … +25 ✕ N(5) + 24 ✕ N(4) + 23 ✕ N(3) … + 20 ✕ N(0) Byte 01 (Default = B6) Bits N(7)–N(0) are the 8 lower bits of the 15-bit programmable N divider. Crystal Output Buffer (XTALOUT) The on-chip crystal oscillator circuit has been designed for operation from 4MHz to 27MHz. The crystal output buffer amplifier is designed to nominally deliver between 0.75VP-P and 1.5VP-P. However, it might be necessary to add a resistor between the XTALOUT pin and ground to increase the signal swing when using Table 1. MAX2116/MAX2118 Write Address Byte AS2 AS1 AS0 MSB Low Low Low 1 1 0 ADDRESS BYTE 0 0 0 0 LSB 0 Low Low High 1 1 0 0 0 0 1 0 Low High Low 1 1 0 0 0 1 0 0 Low High High 1 1 0 0 0 1 1 0 High Low Low 1 1 0 0 1 0 0 0 High Low High 1 1 0 0 1 0 1 0 High High Low 1 1 0 0 1 1 0 0 High High High 1 1 0 0 1 1 1 0 ______________________________________________________________________________________ 11 MAX2116/MAX2118 boosts the baseband output gain by 4.5dB, thus allowing the output voltage swing of 1VP-P. Output clipping levels are typically 2VP-P differential. MAX2116/MAX2118 Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs Table 2. MAX2116/MAX2118 Read Address Byte AS2 AS1 AS0 MSB Low Low Low 1 1 0 ADDRESS BYTE 0 0 0 0 LSB 1 Low Low High 1 1 0 0 0 0 1 1 Low High Low 1 1 0 0 0 1 0 1 Low High High 1 1 0 0 0 1 1 1 High Low Low 1 1 0 0 1 0 0 1 High Low High 1 1 0 0 1 0 1 1 High High Low 1 1 0 0 1 1 0 1 High High High 1 1 0 0 1 1 1 1 Table 3. MAX2116/MAX2118 Control Register Bytes RESET VALUE ADDR-H MSB Address — C0 C2 C4 C6 C8 CA CC CE 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 N High 03 00 DIV2 N14 N13 N12 N11 N10 N9 N8 N Low B6 01 N7 N6 N5 N4 N3 N2 N1 N0 R and CP and VCO 3D 02 R2 R1 R0 CP1 CP0 OSC2 OSC1 OSC0 WRITE TO MODE CONTROL BYTE LSB I/Q Filter DAC 7F 03 X0 F6 F5 F4 F3 F2 F1 F0 LPF Divider DAC 02 04 ADL ADE DL M4 M3 M2 M1 M0 GC2 and Diag 1F 05 D2 D1 D0 G4 G3 G2 G1 G0 Byte 02 (Default = 3D) Bits R2, R1, and R0 are the reference divider bits. The overall reference divide ratio R = 2 x 2 (4 x R2 + 2 x R1 + R0), with the default value of R = 4 (R2 = 0, R1 = 0, R0 = 1). Bits CP1, CP0 control the charge pump current, with the default value of ±400µA (Table 4). Bits OSC2, OSC1, and OSC0 control which of the eight on-chip VCOs is activated. Default is VCO 5 (101) (Table 5). Byte 03 (Default = 7F) Bit X(0) is unused; default = 0. Bits F(6)–F(0) set the value of FDAC for the baseband lowpass filter -3dB cutoff frequency. (see the Baseband LPFs section). 12 FDAC = 26 ✕ F(6) + ... +20F(0). (Default FDAC = 127.) Byte 04 (Default = 02) Bit ADL is the VCO ADC latch-enable bit. ADL = 1 latches ADC value (ADL = 0, default). Bit ADE enables VCO tune voltage DAC read. ADE = 1 enables ADC read (ADE = 0, default). Bit DL sets the differential output drive level for the MAX2118 (default, DL = 0) (Table 6). This bit is unused for the MAX2116. Bits M(4)–M(0) set the value of M counter of lowpass filter BW control. M = 24 ✕ M(4) + 23 ✕ M(3) + ... +20M(0). (Default M = 2.) ______________________________________________________________________________________ Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs CP1 CP0 CHARGE PUMP CURRENT (µA) 0 0 ± 50 0 1 ± 100 1 0 ± 200 1 1 ± 400 (default) Table 5. On-Chip VCO Selection (Byte 02) OSC2 OSC1 OSC0 VCO BAND 0 0 0 0 0 0 1 1 0 1 0 2 0 1 1 3 1 0 0 4 1 0 1 5 (Default) 1 1 0 6 1 1 1 7 Table 6. MAX2118 Output Drive Level Selection (Byte 04) DL IOUT±, QOUT± OUTPUT VOLTAGE LEVEL (DIFFERENTIAL) (VP-P) 0 0.59 1 1.0 I2C Read Status Bits Bit PWR high indicates power has been cycled, and the MAX2116/MAX2118 registers have been reset to default values. A stop condition while in read mode resets this bit. Bits ADC(2), ADC(1), and ADC(0) represent a 3-bit ADC conversion of the VCO tune voltage used for VCO and charge pump current selection and calibration. Bits F(6)–F(0) are a 7-bit representation of the LPF DAC current. Serial Interface Functional Description Register Map This is the standard I 2 C protocol. The write/read/ address bytes are dependent on the states of pins AS0/AS1/AS2. Write Operation The first byte is the device address plus the direction bit (R/W = 0). The second byte contains the internal address command of the first address to be accessed. The third byte is written to the internal register directed by the command address byte. The following bytes (if any) are written into successive internal registers. The transfer lasts until stop conditions are encountered. The MAX2116 acknowledges every byte transfer. Read Operation When an address is sent, the MAX2116 sends back first the status byte and then the I/Q DAC byte. Example: Write registers 0 to 3 with 0E, D8, 26 (Table 9). Example: Read from status registers. Sending an ACK terminates slave transmit mode (Table 10). BYTE 05 (default = 1F) Bits D(2), D(1), and D(0) control diagnostic features (Table 7). Bits G(4)–G(0) controls the gain of the baseband VGA. The BB gain is minimum at 11111 and the BB gain is maximum at 00000. Default is minimum gain setting of 11111 (Table 8). ______________________________________________________________________________________ 13 MAX2116/MAX2118 Table 4. Charge Pump Current Setting (Byte 02) MAX2116/MAX2118 Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs Table 7.Diagnostic Functions (Byte 05) D2 D1 D0 0 0 0 Normal operation DIAGNOSTIC FUNCTIONS 0 0 1 Force charge pump source current 0 1 0 Force charge pump sink current 0 1 1 Force charge pump High-Z state 1 0 0 Unused 1 0 1 N divider output frequency at CNTOUT pin and filter DAC output at IFILT pin 1 1 0 R divider output frequency at CNTOUT pin and GC2 DAC output at IFILT pin 1 1 1 M divider output frequency at CNTOUT pin Table 8. Baseband Gain Setting (Byte 5) READ FROM MODE RESET VAL ADDR-H MSB 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 PWR 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC2 0 0 0 0 1 1 1 1 ADC1 0 0 1 1 0 0 1 1 ADC0 0 1 0 1 0 1 0 1 0 1 1 1 1 1 1 1 1 0 0 F6 F5 F4 F3 F2 F1 F0 Address — Status Info 00 C1 C3 C5 C7 C9 CB CD CF — I/Q Filter DAC 00 — LSB Table 9. Example 1 Start Device Address Write ACK Register Address 00 ACK DATA 0E ACK ACK Status Register 00 ACK DAC D8 ACK/ NACK DATA D8 ACK DATA 26 ACK STOP Table 10. Example 2 Start Device Address Read Chip Information TRANSISTOR COUNT: 10,935 14 STOP Package Information For the latest package outline information, go to www.maximic.com/packages. ______________________________________________________________________________________ Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs QOUT- VCC QOUT+ IOUT- IOUT+ VCC VCC 40 39 38 37 36 35 34 33 32 31 VCC (MAX2118) (MAX2118) 1 30 DC OFFSET CORRECTION VCC LPF BW CONTROL 2 29 SCL DAC INTERFACE LOGIC AND CONTROL GC2 3 DIV2/ DIV4 4 28 27 SDA VCC RFIN 5 26 MAX2118 6 25 /N GC1 /R 7 24 XTALOUT PFD VOLTAGE REGULATOR 23 ADC 8 CP 11 12 VCC 13 14 TANK TANK TANK TANK TANK TANK TANK 10 22 TANK 9 15 21 16 17 VCC 18 19 20 VCC VCC LOOP FILTER Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15 © 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc. MAX2116/MAX2118 Typical Operating Circuit