LOOP VOLTAGE MONITOR FAULT CONTROL LOGIC VOLTAGE REGULATOR DRIVE 24k 16 GAIN / OFFSET ADJUSTMENT REGISTERS / 16-BIT DAC RSET 11.5k LDAC ALARM CURRENT DIRECTION REGOUT REGIN INPUT REGISTER SYNC SCLK SDIN SDO RANGE 0 RANGE 1 REG_SEL2 VLOOP AD5421 REG_SEL1 DVDD REG_SEL0 IODVDD 52 TEMP SENSOR LOOP - VREF RINT/REXT DGND REFOUT2 REFOUT1 REFIN CIN REXT1 REXT2 COM SCLK SDIN 1 8 9 DB23 DB16 DB15 24 DB0 INPUT WORD SPECIFIES REGISTER TO BE READ SDO 1 8 9 DB23 DB16 DB15 24 DB0 NOP OR REGISTER ADDRESS D15 D0 UNDEFINED DATA SPECIFIED REGISTER DATA CLOCKED OUT SYNC IODVDD 1 28 REGOUT 27 REGIN SDO 2 DRIVE SCLK 3 26 SYNC 4 25 VLOOP SDIN 5 AD5421 LDAC 6 TOP VIEW (Not to Scale) FAULT 7 DVDD 8 24 LOOP23 REXT2 22 REXT1 21 CIN ALARM CURRENT DIRECTION 9 20 REFOUT1 RINT/REXT 10 19 REFOUT2 RANGE 0 11 18 REFIN RANGE 1 12 17 REG_SEL0 COM 13 16 REG_SEL1 COM 14 15 REG_SEL2 I LOOP 16 mA 2N D 4mA I LOOP 17.2mA 2N I LOOP 20.8mA 2N D 3.8mA D 3.2mA DAC Re gisterData 65536 DAC Re gisterData 65536 DAC Re gisterData 65536 DAC Re gisterData 65536 DAC Re gisterData 65536 65534 32769 32768 32767 1 UPDATE ON SYNC HIGH SYNC SCLK MSB D23 LSB D0 24-BIT DATA DIN 24-BIT DATA TRANSFER - NO ERROR CHECKING UPDATE AFTER SYNC HIGH ONLY IF ERROR CHECK PASSED SYNC SCLK MSB D31 SDIN FAULT LSB D8 24 BIT DATA D0 D7 8-BIT FCS FA U LT PINGOES HIGH IF ERROR CHECK FAILS 32-BIT DATA TRANSFER WITH ERROR CHECKING REGIN 19M VLOOP VLOOP 1M AD5421 LOOP COM RL RDAC * CSLEW CSLEW T 5 * RDAC CSLEW 5ms 5 *15220 66 nF CSLEW 10 ms 5 *15220 130 nF Loop Current vs. Time for a 4mA to 20mA Step Voltage across 250Ohm Load 6 Rload = 250Ohm 5 4 CIN = 68nF CIN = 133nF 3 2 1 0 -0.002 0 0.002 0.004 0.006 Time(s) RDAC Vto I Circuitry CIN CSLEW LOOP- 0.008 0.01 0.012 200k REGIN VLOOP DRIVE RL AD5421 LOOP CIN COM CSLEW CHART HART MODEM HART_OUT HART_IN 4.5 CHART CSLEW CHART Optional Mosfet DN2540 BSP129 T1 2.5V 200k 2µF 0.1µF 0.1µF IODVDD DVDD RANGE 0 RANGE 1 ALARM CURRENT DIRECTION REGOUT VLOOP REGIN DRIVE 19M VLOOP RINT/REXT AD5421 DGND REFOUT2 REFOUT1 REFIN 0.1µF HART MODEM TXD HART_OUT RXD RTS CD HART_IN GND REXT1 R1 REXT2 CIN Sets Regulator Voltage 4.7nF 0.1µF VCC REG_SEL2 LOOP - FAULT LDAC REG_SEL1 24-Bit S-D ADC 1M SYNC SCLK SDIN SDO REG_SEL0 SENSOR MCU ADuC7060 COM 16nF Optional Resistor RL Power Dissipation (W) 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 25 35 45 55 65 75 85 75 85 Am bient Tem perature (°C) 53 Supply Voltage (V) 52 51 50 49 48 47 46 25 35 45 55 65 Am bient Tem perature (°C) TJ max TA JA TJ max 125 PD 125 105 32 625 mW JA (52 0.0228 ) 32 87 C TJ max TA I LOOP JA 125 105 0.0228 32 27 V