Omnidirectional Microphone with Bottom Port and Digital Output ADMP421 FEATURES GENERAL DESCRIPTION Small and thin 3 mm × 4 mm × 1 mm surface-mount package High SNR of 61 dBA High sensitivity of −26 dBFS Flat frequency response from 100 Hz to 15 kHz Low current consumption: <650 μA High PSRR of 80 dBFS Fourth-order Σ-Δ modulator Digital PDM output Compatible with Sn/Pb and Pb-free solder processes RoHS/WEEE compliant The ADMP421 is a low cost, low power, digital output bottomported omnidirectional MEMS microphone. The ADMP421 consists of a MEMS microphone element, an impedance converter amplifier, and a fourth-order Σ-Δ modulator. The digital interface allows for the pulse density modulated (PDM) output of two microphones to be time multiplexed on a single data line using a single clock. The ADMP421 has a high SNR and high sensitivity, making it an excellent choice for far field applications. The ADMP421 has a flat wideband frequency response resulting in natural sound with high intelligibility. Low current consumption and a sleep mode enable long battery life for portable applications. A builtin particle filter provides high reliability. The ADMP421 complies with the TIA-920 Telecommunications Telephone Terminal Equipment Transmission Requirements for Wideband Digital Wireline Telephones standard. APPLICATIONS Smartphones and feature phones Digital video cameras Bluetooth headsets Video phones Teleconferencing systems The ADMP421 is available in a thin 3 mm × 4 mm × 1 mm surface-mount package. It is reflow solder compatible with no sensitivity degradation. The ADMP421 is halide free. FUNCTIONAL BLOCK DIAGRAM ASIC MEMS DATA MEMBRANE BACKPLATE IMPEDANCE CONVERTER ADC L/R SELECT CLK VDD GND 07596-001 ADMP421 Figure 1. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved. ADMP421 TABLE OF CONTENTS Features .............................................................................................. 1 PCB Land Pattern Layout .................................................................8 Applications ....................................................................................... 1 Evaluation Board ...............................................................................9 General Description ......................................................................... 1 Interfacing With Analog Devices Codecs ................................... 10 Functional Block Diagram .............................................................. 1 Handling Instructions .................................................................... 11 Revision History ............................................................................... 2 Pick and Place Equipment......................................................... 11 Specifications..................................................................................... 3 Reflow Solder .............................................................................. 11 Timing Characteristics ................................................................ 4 Board Wash ................................................................................. 11 Absolute Maximum Ratings............................................................ 5 Reliability Specifications ................................................................ 12 ESD Caution .................................................................................. 5 Outline Dimensions ....................................................................... 13 Pin Configuration and Function Descriptions ............................. 6 Ordering Guide .......................................................................... 13 Typical Performance Characteristics ............................................. 7 REVISION HISTORY /10—Revision 0: Initial Version Rev. 0 | Page 2 of 16 ADMP421 SPECIFICATIONS TA = 25°C, VDD = 1.8 V, CLK = 2.4 MHz, unless otherwise noted. All minimum and maximum specifications are guaranteed. Typical specifications are not guaranteed. Table 1. Parameter PERFORMANCE Directionality Sensitivity1 Signal-to-Noise Ratio Equivalent Input Noise Frequency Response2 Total Harmonic Distortion Power Supply Rejection Ratio Maximum Acoustic Input INPUT CHARACTERISTICS Clock Supply Voltage Supply Current OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Latency Wake-Up Time Polarity Symbol SNR EIN THD PSRR CLK VDD IS Test Conditions/Comments Min 1 kHz, 94 dB SPL 20 kHz bandwidth, A-weighted 20 kHz bandwidth, A-weighted Low frequency −3 dB point High frequency −3 dB point Deviation from flat response within pass band 105 dB SPL 217 Hz, 100 mV p-p square wave superimposed on VDD = 1.8 V Peak −29 Typ Max Unit −23 80 dBFS dBA dBA SPL Hz kHz dB % dBFS 120 dB SPL Omni −26 61 33 100 15 −3 +2 3 2.43 1.65 3.6 650 50 Normal mode Sleep mode VOH VOL From sleep mode, power on 1 VDD 0 <30 10 Noninverting4 MHz V μA μA V V μs ms Relative to the rms level of a sine wave with positive amplitude equal to 100% 1s density and negative amplitude equal to 0% 1s density. See Figure 5 and Figure 6. The microphone operates at any clock frequency between 1.0 MHz and 3.3 MHz. Some specifications may not be guaranteed at frequencies other than 2.4 MHz. 4 Positive going (increasing) pressure on the membrane results in an increase in the number of 1s at the output. 2 3 Rev. 0 | Page 3 of 16 ADMP421 TIMING CHARACTERISTICS Table 2. Parameter Input tCLKIN Output t1OUTEN t1OUTDIS t2OUTEN t2OUTDIS Description Min Max Unit Input clock period 310 1000 ns DATA1 driven after falling clock edge DATA1 disabled after rising clock edge DATA2 driven after rising clock edge DATA2 disabled after falling clock edge 30 ns ns ns ns 20 30 20 Timing Diagram tCLKIN CLK t1OUTEN t1OUTDIS DATA1 t2OUTDIS 07596-002 DATA2 t2OUTEN Figure 2. Pulse Density-Modulated Output Timing Rev. 0 | Page 4 of 16 ADMP421 ABSOLUTE MAXIMUM RATINGS Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 3. Parameter Supply Voltage Sound Pressure Level (SPL) Mechanical Shock Vibration Temperature Range Rating 3.6 V 160 dB 10,000 g Per MIL-STD-883 Method 2007, Test Condition B −40°C to +70°C ESD CAUTION CRITICAL ZONE TL TO TP tP TP tL TSMAX TSMIN tS RAMP-DOWN PREHEAT 07596-003 TEMPERATURE RAMP-UP TL t25°C TO PEAK TIME Figure 3. Recommended Soldering Profile Limits Table 4. Recommended Soldering Profile Limits Profile Feature Average Ramp Rate (TL to TP) Preheat Minimum Temperature (TSMIN) Maximum Temperature (TSMAX) Time (TSMIN to TSMAX), tS Ramp-Up Rate (TSMAX to TL) Time Maintained Above Liquidous (tL) Liquidous Temperature (TL) Peak Temperature (TP) Time Within 5°C of Actual Peak Temperature (tP) Ramp-Down Rate Time 25°C (t25°C) to Peak Temperature Rev. 0 | Page 5 of 16 Sn63/Pb37 3°C/sec max Pb-Free 3°C/sec max 100°C 150°C 60 sec to 120 sec 3°C/sec 60 sec to 150 sec 183°C 240°C + 0°C/−5°C 10 sec to 30 sec 6°C/sec max 6 minute max 150°C 200°C 60 sec to 120 sec 3°C/sec 60 sec to 150 sec 217°C 260°C + 0°C/−5°C 20 sec to 40 sec 6°C/sec max 8 minute max ADMP421 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DATA 5 VDD 4 1 CLK 2 L/R SELECT 07596-007 3 GND Figure 4. Pin Configuration (Bottom View) Table 5. Pin Function Descriptions Pin No. 1 2 Mnemonic CLK L/R SELECT 3 4 GND VDD 5 DATA Description Clock Input to Microphone. Left Channel or Right Channel Select. DATA1 (right): L/R SELECT tied to GND. DATA2 (left): L/R SELECT pulled to VDD. Ground. Power Supply. For best performance and to avoid potential parasitic artifacts, placing a 0.1 μF (100 nF) ceramic type X7R or better capacitor between Pin 4 (VDD) and ground is strongly recommended. The capacitor should be placed as close to Pin 4 as possible. Digital Output Signal (DATA1, DATA2). Rev. 0 | Page 6 of 16 ADMP421 TYPICAL PERFORMANCE CHARACTERISTICS –40 10 8 –50 6 4 PSRR (dBFS) –60 (dB) 2 0 –2 –70 –80 –4 –6 –90 100 1k 10k FREQUENCY (Hz) –100 200 07596-004 –10 2k 5k 10k 20k Figure 7. Typical Power Supply Rejection Ratio vs. Frequency 10 (dB) 0 10k 07596-005 –10 1k FREQUENCY (Hz) 1k FREQUENCY (Hz) Figure 5. Frequency Response Mask –20 100 500 Figure 6. Typical Frequency Response (Measured) Rev. 0 | Page 7 of 16 07596-006 –8 ADMP421 PCB LAND PATTERN LAYOUT solder paste stencil pattern layout is shown in Figure 9. The diameter of the sound hole in the PCB should be larger than the diameter of the sound port of the microphone. A minimum diameter of 0.5 mm is recommended. The recommended PCB land pattern for the ADMP421 should be laid out to a 1:1 ratio to the solder pads on the microphone package, as shown in Figure 8. Care should be taken to avoid applying solder paste to the sound hole in the PCB. A suggested 3.80 ø1.70 (0.30) 4× 0.40 × 0.60 0.35 (0.30) 2.80 ø1.10 (0.30) 0.70 2× R0.10 2.05 07596-008 (0.30) 0.35 Figure 8. Suggested PCB Land Pattern Layout 2.45 1.498 × 0.248 0.9 0.248 × 0.948 (2×) 0.398 × 0.298 (4×) 0.7 1.45 0.248 × 1.148 (2×) 1.525 0.248 × 0.498 (2×) 1.17 1.498 0.205 WIDE 0.362 CUT (3×) Figure 9. Suggested Solder Paste Stencil Pattern Layout Rev. 0 | Page 8 of 16 07596-009 0.90 ADMP421 EVALUATION BOARD Figure 10 and Figure 11 show the ADMP421 evaluation board schematic and layout, respectively. The ADMP421 evaluation board is designed to plug directly into Connector J6 on the Analog Devices, Inc., EVAL-ADAU1761Z. ANALOG DEVICES ADMP421 P1 U1 GND ADMP421 1 2 CLK VDD 1 2 11 12 4 L/R SELECT 5 DATA C1 0.1µF U1 C1 GND 3 07596-011 2 CLK 3 4 5 6 7 LRSEL 8 DATA 9 10 VDD 11 12 07596-010 1 Figure 10. ADMP421 Evaluation Board Schematic Figure 11. ADMP421 Evaluation Board Layout Table 6. Evaluation Board Connector Pin Functions Pin No. 1 3 5 7 9 11 Rev. 0 | Page 9 of 16 Description GND CLK Not connected L/R SELECT DATA VDD Pin No. 2 4 6 8 10 12 Description Not connected Not connected Not connected Not connected Not connected Not connected ADMP421 INTERFACING WITH ANALOG DEVICES CODECS Figure 12 and Figure 13, and refer to the ADMP421 AN-1003 Application Note and the codecs’ respective data sheets for more details on the digital microphone interface. Analog Devices ADAU1361 and ADAU1761 codecs feature digital microphone inputs that support the ADMP421 PDM output data format. See the connection diagrams shown in JACKDET/MICIN R2: DIGITAL MICROPHONE/ JACK DETECTION CONTROL JDFUNC[1:0] TO JACK DETECTION CIRCUIT DIGITAL MICROPHONE INTERFACE RIGHT ADC LEFT CHANNEL RIGHT CHANNEL LEFT ADC R19: ADC CONTROL 07596-013 INSEL DECIMATORS Figure 12. Digital Microphone Signal Routing Block Diagram MICBIAS BCLK CLK CM ADMP421 LINP DIGITAL MICROPHONE DATA VDD 0.1µF LINN RINN L/R SELECT GND RINP BCLK CLK ADMP421 DIGITAL MICROPHONE VDD ADAU1361 OR ADAU1761 DATA 0.1µF GND JACKDET/MICIN Figure 13. ADAU1361 and ADAU1761 Stereo Interface Block Diagram Rev. 0 | Page 10 of 16 07596-012 L/R SELECT ADMP421 HANDLING INSTRUCTIONS PICK AND PLACE EQUIPMENT REFLOW SOLDER The MEMS microphone can be handled using standard pickand-place and chip shooting equipment. Care should be taken to avoid damage to the MEMS microphone structure as follows: For best results, the soldering profile should be in accordance with the recommendations of the manufacturer of the solder paste used to attach the MEMS microphone to the PCB. It is recommended that the solder reflow profile not exceed the limit conditions specified in Figure 3 and Table 4. Use a standard pickup tool to handle the microphone. Because the microphone hole is on the bottom of the package, the pickup tool can make contact with any part of the lid surface. Use care during pick-and-place to ensure that no high shock events above 20 kg are experienced because such events may cause damage to the microphone. Do not pick up the microphone with a vacuum tool that makes contact with the bottom side of the microphone. Do not pull air out of or blow air into the microphone port. Do not use excessive force to place the microphone on the PCB. BOARD WASH When washing the PCB, ensure that water does not make contact with the microphone port. Blow-off procedures and ultrasonic cleaning must not be used. Rev. 0 | Page 11 of 16 ADMP421 RELIABILITY SPECIFICATIONS The microphone sensitivity after stress must deviate by no more than 3 dB from the initial value. Table 7. Stress Test Low Temperature Operating Life High Temperature Operating Life THB Temperature Cycle High Temperature Storage Low Temperature Storage Component CDM ESD Component HBM ESD Component MM ESD Description −40°C, 500 hrs, powered +125°C, 500 hrs, powered 65°C/85% relative humidity (RH), 500 hrs, powered −40°C/+125°C, one cycle per hour, 100 cycles 150°C, 500 hrs −40°C, 500 hrs All pins, 0.5 kV All pins, 1.5 kV All pins, 0.2 kV Rev. 0 | Page 12 of 16 ADMP421 OUTLINE DIMENSIONS 0.95 REF 4.10 4.00 3.90 2.05 1.70 DIA. REFERENCE CORNER 3.54 REF 0.70 0.40 × 0.60 (Pins 1, 2, 4, 5) 0.30 REF 1.10 DIA. 1.50 0.25 DIA. (THRU HOLE) 3 0.90 2.48 REF 1 2 5 4 0.30 REF 3.10 3.00 2.90 R 0.10 (2 ×) 2.80 1.05 REF TOP VIEW 0.35 0.35 1.10 1.00 0.90 0.30 REF 0.30 REF 0.72 REF SIDE VIEW 03-19-2010-G 3.80 BOTTOM VIEW 0.24 REF Figure 14. 5-Terminal Chip Array Small Outline No Lead Cavity [LGA_CAV] 4 mm × 3 mm Body (CE-5-1) Dimensions shown in millimeters 2 8.00 4.00 1 1.60 MAX 1.50 NOM A 12.30 12.00 11.70 5.55 5.50 5.45 3.40 4.16 1.50 MIN DIA DETAIL A NOTES: 1. 10 SPROCKET HOLE PITCH CUMULATIVE TOLERANCE ± 0.20. 2. POCKET POSITION RELATIVE TO SPROCKET HOLE MEASURED AS TRUE POSITION OF POCKET, NOT POCKET HOLE. 0.35 0.30 0.25 1.85 1.75 1.65 0.20 MAX 2 1.30 A 0.25 SECTION A-A 0.25 0.50 R DETAIL A 062408-A 2.05 2.00 1.95 Figure 15. LGA_CAV Tape and Reel Outline Dimensions Dimensions shown in millimeters ORDERING GUIDE Model1 ADMP421ACEZ-RL ADMP421ACEZ-RL7 EVAL-ADMP421Z 1 2 Temperature Range −40°C to +70°C −40°C to +70°C Package Description 5-Terminal LGA_CAV, 13” Tape and Reel 5-Terminal LGA_CAV, 7” Tape and Reel Evaluation Board Z = RoHS Compliant Part. This package option is halide free. Rev. 0 | Page 13 of 16 Package Option CE-5-12 CE-5-12 Ordering Quantity 5,000 1,000 ADMP421 NOTES Rev. 0 | Page 14 of 16 ADMP421 NOTES Rev. 0 | Page 15 of 16 ADMP421 NOTES ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07596-0-/10(0) Rev. 0 | Page 16 of 16