19-0154; Rev 1; 3/96 Nonvolatile RAM Controller Applications µP Systems ____________________________Features ♦ Battery Backup ♦ Memory Write Protection ♦ 230µA Operating-Mode Quiescent Current ♦ 2nA Backup-Mode Quiescent Current ♦ Battery Freshness Seal ♦ Optional Redundant Battery ♦ Low Forward-Voltage Drop on VCC Supply Switch ♦ 5% or 10% Power-Fail Detection Options Computers ♦ Tests Battery Condition During Power-Up Embedded Systems ♦ 8-Pin SO Available _________________Pin Configurations ______________Ordering Information PART TOP VIEW V CCO 1 8 V CCI VBATT1 2 7 VBATT2 6 CEO 5 CE TOL 3 MXD1210 GND 4 TEMP. RANGE PIN-PACKAGE MXD1210CPA 0°C to +70°C 8 Plastic DIP MXD1210CSA MXD1210CWE MXD1210C/D MXD1210EPA MXD1210ESA MXD1210EWE MXD1210MJA 0°C to +70°C 0°C to +70°C 0°C to +70°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -55°C to +125°C 8 SO 16 Wide SO Dice* 8 Plastic DIP 8 SO 16 Wide SO 8 CERDIP *Contact factory for dice specifications. DIP/SO __________Typical Operating Circuit N.C. 1 16 N.C. V CCO 2 15 V CCI N.C. 3 14 N.C. VBATT1 4 MXD1210 13 VBATT2 N.C. 5 12 N.C. TOL 6 11 CEO N.C. 7 10 N.C. GND 8 9 CE +5V VCCI 8 VCCO 1 2 VBATT1 VBATT2 MXD1210 7 CE 5 FROM DECODER 4 VCC CMOS RAM 6 CE 3 Wide SO GND ________________________________________________________________ Maxim Integrated Products 1 For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800 MXD1210 _______________General Description The MXD1210 nonvolatile RAM controller is a very lowpower CMOS circuit that converts standard (volatile) CMOS RAM into nonvolatile memory. It also continually monitors the power supply to provide RAM write protection when power to the RAM is in a marginal (out-oftolerance) condition. When the power supply begins to fail, the RAM is write protected, and the device switches to battery-backup mode. MXD1210 Nonvolatile RAM Controller ABSOLUTE MAXIMUM RATINGS Continuous Power Dissipation (TA = +70°C) 8-Pin Plastic DIP (derate 9.09mW/°C above +70°C) ....727mW 8-Pin SO (derate 5.88mW/°C above +70°C).................471mW 16-Pin Wide SO (derate 9.52mW/°C above +70°C)......762mW 8-Pin CERDIP (derate 8.00mW/°C above +70°C).........640mW Operating Temperature Ranges MXD1210C_ _ ..................................................... 0°C to +70°C MXD1210E_ _ .................................................. -40°C to +85°C MXD1210MJA ................................................ -55°C to +125°C Storage Temperature Range ........................... -65°C to +150°C Lead Temperature (soldering, 10sec) ............................ +300°C VCCI to GND ................................................................-0.3V, +7V VBATT1 to GND.......................................................... -0.3V, +7V VBATT2 to GND.......................................................... -0.3V, +7V VCCO to GND..................................................... -0.3V, VS + 0.3V (VS = greater of VCCI, VBATT1, VBATT2) Digital Input and Output Voltages to GND............. 0.3V, VCCI + 0.3V Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS RECOMMENDED OPERATING CONDITIONS Supply Voltage Input High Voltage VIH Input Low Voltage VIL Battery Voltage (Note 1) TOL = GND 4.75 5.50 TOL = VCCO 4.50 5.50 VCCI VBATT1 VBATT2 V 2.2 1 or 2 batteries V 2.0 0.8 V 4.0 V ELECTRICAL CHARACTERISTICS (VCCI = +4.75V to +5.5V, TOL = GND; or VCCI = +4.5V to +5.5V, TOL = VCCO; TA = TMIN to TMAX; unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 0.23 0.5 mA NORMAL SUPPLY MODE, TOL = VCCO Supply Current Output Supply Voltage VCCO VCCO, CEO open, VBATT1 = VBATT2 = 3V ICCO1 = 80mA (Note 2) MXD1210C VCCI - 0.20 MXD1210E VCCI - 0.21 MXD1210M MXD1210C MXD1210E MXD1210M VCCI - 0.25 V Input Leakage Current IIL 80 75 65 ±1.0 Output Leakage Current IOL ±1.0 High-Level Output Voltage Low-Level Output Voltage VOH VOL Output Supply Current VCCI Trip Point 2 ICCI ICCO VCCTP VCCI - VCCO ≤ 0.2V (Note 2) IOH = -1mA IOL = 4mA TOL = GND TOL = VCCO 0.23 0.23 2.4 4.50 4.25 _______________________________________________________________________________________ 0.4 4.74 4.49 mA µA µA V V V Nonvolatile RAM Controller ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 2 100 nA 5 µA 300 µA MXD1210 (VCCI < VBATT; positive edge rate at VBATT1, VBATT2 > 0.1V/µs, TA = TMIN to TMAX; unless otherwise noted.) BATTERY-BACKUP MODE Quiescent Current (Note 1) IBATT VCCO, CEO open MXD1210C/E VCCI = 0V MXD1210M Output Supply Current (Notes 3, 4) ICCO2 VBATT - VCCO ≤ 0.2V CEO Output Voltage VO Output open VBATT - 0.2 V ELECTRICAL CHARACTERISTICS (TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS CIN 5 pF COUT 7 pF INPUT/OUTPUT CAPACITANCE (Note 5) Input Capacitance Output Capacitance VCC POWER TIMING CHARACTERISTICS (VCCI = +4.75V to +5.5V, TOL = GND; or VCCI = +4.5V to +5.5V, TOL = VCCO; TA = TMIN to TMAX; unless otherwise noted.) PARAMETER SYMBOL CE Propagation Delay tPD CE High to Power-Fail (Note 5) CONDITIONS RL = 1kΩ, CL = 50pF MIN TYP MAX MXD1210C 5 10 20 MXD1210E 5 10 22 MXD1210M 5 10 25 tPF 0 UNITS ns ns TIMING CHARACTERISTICS (VCCI < +4.75V to +5.5V, TOL = GND; or VCCI < +4.5V , TOL = VCCO; TA = TMIN to TMAX; unless otherwise noted.) PARAMETER Recovery at Power-Up VCC Slew-Rate Power-Down SYMBOL CONDITIONS tREC MIN TYP MAX UNITS 2 5 20 ms tF To out-of-tolerance condition 300 tFB Tolerance to battery power 10 VCC Slew-Rate Power-Up tR CE Pulse Width (Note 6) tCE µs 0 µs 1.5 µs Note 1: Only one battery input is required. Unused battery inputs must be grounded. Note 2: ICCO1 is the maximum average load current the MXD1210 can supply to the memories. Note 3: ICCO2 is the maximum average load current the MXD1210 can supply to the memories in battery-backup mode. Note 4: CEO can sustain leakage current only in battery-backup mode. Note 5: Guaranteed by design. Note 6: tCE max must be met to ensure data integrity on power loss. _______________________________________________________________________________________ 3 MXD1210 Nonvolatile RAM Controller ______________________________________________________________Pin Description PIN NAME FUNCTION 8-PIN DIP/SO 16-PIN WIDE SO 1 2 VCCO 2 4 VBATT1 3 6 TOL Tolerance select pin 4 8 GND Ground 5 9 CE 6 11 CEO 7 13 VBATT2 8 15 VCCI 5V power supply to chip – 1, 3, 5, 7 10, 12, 14, 16 N.C. No connect, not internally connected Backed-up supply to RAM Battery 1 positive connection Chip-enable input Chip-enable output Battery 2 positive connection VCCI P VCCO VBATT1 P P FRESHNESSSEAL MODE VBATT2 N P GND BATTERY SELECT MXD1210 GND BATTERY TEST VOLTAGE LEVEL DETECTION CE CEO CONTROL TOL Figure 1. Block Diagram 4 _______________________________________________________________________________________ CEO Nonvolatile RAM Controller Main Functions The MXD1210 executes five main functions to perform reliable RAM operation and battery backup (see Typical Operating Circuit and Figure 1): 1. RAM Power-Supply Switch: The switch directs power to the RAM from the incoming supply or from the selected battery, whichever is at the greater voltage. The switch control uses the same criterion to direct power to MXD1210 internal circuitry. 2. Power-Failure Detection: The write-protection function is enabled when a power failure is detected. The power-failure detection range depends on the state of the TOL pin as follows: CONDITION VCCTP RANGE (V) TOL = GND 4.75 to 4.50 TOL = VCCO 4.50 to 4.25 Power-failure detection is independent of the batterybackup function and precedes it sequentially as the power-supply voltage drops during a typical power failure. 3. Write Protection: This holds the chip-enable output (CEO) to within 0.2V of VCCI or of the selected battery, whichever is greater. If the chip-enable input (CE )is low (active) when power failure is detected, then CEO is held low until CE is brought high, at which time CEO is gated high for the duration of the power failure. The preceding sequence completes the current RD/WR cycle, preventing data corruption if the RAM access is a WR cycle. 4. Battery Redundancy: A second battery is optional. When two batteries are connected, the stronger battery is selected to provide RAM backup and to power the MXD1210. The battery-selection circuitry remains active while in the battery-backup mode, selecting the stronger battery and isolating the weaker one. The battery-selection activity is transparent to the user and the system. If only one battery is connected, the second battery input should be grounded. 5. Battery-Status Warning: This notifies the system when the stronger of the two batteries measures ≤ 2.0V. Each time the MXD1210 is repowered (VCCI > VCCTP) after detecting a power failure, the battery voltage is measured. If the battery in use is low, following the MXD1210 recovery period, the device issues a warning to the system by inhibiting the second memory cycle. The sequence is as follows: First access: read memory location n, loc(n) = x Second access: write memory location n, loc (n) = complement (x) Third access: read memory location n, loc (n) = ? If the third access (read) is complement (x), then the battery is good; otherwise, the battery is not good. Return to loc(n) = x following the test sequence. Freshness-Seal Mode The freshness-seal mode relates to battery longevity during storage rather than directly to battery backup. This mode is activated when the first battery is connected, and is defeated when the voltage at V CCI first exceeds VCCTP. In the freshness-seal mode, both batteries are isolated from the system; that is, no current is drained from either battery, and the RAM is not powered by either battery. This means that batteries can be installed and the system can be held in inventory without battery discharge. The positive edge rate at VBATT1 and VBATT2 should exceed 0.1V/µs. The batteries will maintain their full shelf-life while installed in the system. Battery Backup The Typical Operating Circuit shows the MXD1210 connected in order to write protect the RAM when VCC is less than 4.75V, and to provide battery backup to the supply. _______________________________________________________________________________________ 5 MXD1210 ______________ Detailed Description MXD1210 Nonvolatile RAM Controller tCE CE CE VIH VIH VIL VBATT -O.2V VIH tPF tPD VBATT -0.2V tCE CEO CEO VIH VIL tPD tREC tF 4.75V 4.5V VCCI VCCI 4.75V 4.5V 4.25V 4.25V 3V tR tFB Figure 2. Power-Up Timing Diagram 6 Figure 3. Power-Down Timing Diagram _______________________________________________________________________________________ Nonvolatile RAM Controller V CCI MXD1210 __________________Chip Topography VBATT2 V CCO VBATT1 0.121" (3.073mm) CEO TOL CE GND 0.080" (2.032mm) TRANSISTOR COUNT: 1436; LEAVE SUBSTRATE UNCONNECTED. _______________________________________________________________________________________ 7 MXD1210 Nonvolatile RAM Controller ________________________________________________________Package Information DIM E A A1 B C D E e H h L α H INCHES MAX MIN 0.069 0.053 0.010 0.004 0.019 0.014 0.010 0.007 0.197 0.189 0.157 0.150 0.050 BSC 0.244 0.228 0.020 0.010 0.050 0.016 8˚ 0˚ MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.27 0˚ 8˚ 21-325A h x 45˚ D α A 8-PIN PLASTIC SMALL-OUTLINE PACKAGE 0.127mm 0.004in. e A1 C L B DIM D1 A A1 A2 A3 B B1 C D D1 E E1 e eA eB L α E E1 D A3 A A2 L A1 INCHES MAX MIN 0.200 – – 0.015 0.175 0.125 0.080 0.055 0.022 0.016 0.065 0.050 0.012 0.008 0.390 0.348 0.035 0.005 0.325 0.300 0.280 0.240 0.100 BSC 0.300 BSC 0.400 – 0.150 0.115 15˚ 0˚ MILLIMETERS MIN MAX – 5.08 0.38 – 3.18 4.45 1.40 2.03 0.41 0.56 1.27 1.65 0.20 0.30 8.84 9.91 0.13 0.89 7.62 8.26 6.10 7.11 2.54 BSC 7.62 BSC – 10.16 2.92 3.81 0˚ 15˚ 21-324A α C e B1 eA B 8-PIN PLASTIC DUAL-IN-LINE PACKAGE eB Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 8 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 © 1996 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.