MAXIM MAX9611AUB+

19-5543; Rev 2; 1/11
TION KIT
EVALUA BLE
AVAILA
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
The MAX9611/MAX9612 are high-side current-sense
amplifiers with an integrated 12-bit ADC and a gain
block that can be configured either as an op amp or
comparator, making these devices ideal for a number of
industrial and automotive applications.
The high-side, current-sense amplifiers operate over a
wide 0V to 60V input common-mode voltage range. The
programmable full-scale voltage (440mV, 110mV, and
55mV) of these amplifiers offers wide dynamic range,
accurate current measurement, and application flexibility
in choosing sense resistor values. A choice of either an
internal op amp or a comparator is provided to the user.
The internal amplifier can be used to limit the inrush current or to create a current source in a closed-loop system. The comparator can be used to monitor fault events
for fast response.
An I2C controlled 12-bit, 500sps analog-to-digital converter (ADC) can be used to read the voltage across the
sense resistor (VSENSE), the input common-mode voltage
(VRSCM), op-amp/comparator output (VOUT), op-amp/
comparator reference voltage (VSET), and internal die
temperature. The I2C bus is compatible with 1.8V and
3.3V logic, allowing modern microcontrollers to interface
to it.
The MAX9611 features a noninverting input-to-output
configuration while the MAX9612 features an inverting
input-to-output configuration.
The MAX9611/MAX9612 operate with a 2.7V to 5.5V
supply voltage range, are fully specified over the -40NC
to +125NC automotive temperature range, and are available in a 3mm x 5mm, 10-pin FMAXM package.
Features
S 0V to +60V Input Common-Mode Voltage Range
S 2.7V to 5.5V Power-Supply Range, Compatible
with 1.8V and 3.3V Logic
S 5µA Software Shutdown Current
S Integrated 12-Bit ADC
S 13µV Current-Sense ADC Resolution
S 500µV (max) Current-Sense ADC Input Offset
Voltage
S 0.5% (max) Current-Sense ADC Gain Error
S I2C Bus with 16 Addresses
S Small, 3mm x 5mm 10-Pin µMAX Package
S -40NC to +125NC Operating Temperature Range
Ordering Information/
Selector Guide
PART
OUTPUT
MAX9611AUB+
Noninverting
10 FMAX
MAX9612AUB+
Inverting
10 FMAX
Note: All devices operate over the -40NC to +125NC temperature range.
+Denotes a lead(Pb)-free/RoHS-compliant package.
Typical Application Circuit
RS+
VIN
Server Backplanes
Base-Station PA Control
RSENSE
0V TO 60V
Applications
Hybrid Automotive Power Supplies
PIN-PACKAGE
RS-
LOAD
A0
VCC
0.1µF
A1
Base-Station Feeder Cable Bias-T
Telecom Cards
OUT
Battery-Operated Equipment
SET
MAX9611
MAX9612
µC
SCL
SCL
SDA
SDA
1.8V LOGIC
GND
FMAX is a registered trademark of Maxim Integrated Products, Inc.
Functional Diagrams appear at end of data sheet.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX9611/MAX9612
General Description
MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
ABSOLUTE MAXIMUM RATINGS
VCC to GND..............................................................-0.3V to +6V
RS+, RS-, OUT to GND..........................................-0.3V to +65V
Differential Input Voltage, RS+ - RS-.................................. Q65V
All Other Pins to GND..............................................-0.3V to +6V
OUT Short-Circuit to GND..........................................Continuous
Continuous Current into Any Pin...................................... Q20mA
Continuous Power Dissipation (TA = +70NC)
10-Pin FMAX (derate 8.8mW/NC above +70NC)...........707mW
FMAX Package Junction-to-Ambient
Thermal Resistance (BJA) (Note 1).............................113NC/W
Operating Temperature Range......................... -40NC to +125NC
Junction Temperature......................................................+150NC
Storage Temperature Range............................. -65NC to +150NC
Lead Temperature (soldering, 10s).................................+300NC
Soldering Temperature (reflow).......................................+260NC
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal consideration, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = 3.3V, VRS+ = VRS- = +12V, VSENSE = (VRS+ - VRS-) = 0V, TA = -40NC to +125NC, unless otherwise noted. Typical values are
at TA = +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
60
V
0.045
0.5
CURRENT-SENSE AMPLIFIER DC CHARACTERISTICS
Input Common-Mode Range
Guaranteed by CMRR
TA = +25NC, gain = 8x
0
2
TA = -40NC to +125NC, gain = 8x
Input Offset Voltage ADC Path
(Note 3)
VOS
TA = +25NC, gain = 4x
0.045
TA = +25NC, gain = 1x
0.1
0.1
TA = +25NC, gain = 4x
0.4
1.7
%
3.1
TA = -40NC to +125NC, gain = 4x
TA = +25NC, gain = 1x
0.5
2.5
TA = -40NC to +125NC, gain = 8x
GE
0.8
1.8
TA = -40NC to + 85NC, gain = 8x
Gain Error (Note 3)
mV
2.6
TA = -40NC to +125NC, gain = 1x
TA = +25NC, gain = 8x
0.5
2
TA = -40NC to +125NC, gain = 4x
1
4
4.7
TA = -40NC to +125NC, gain = 1x
Differential Input Resistance
RINDM
300
kI
Common-Mode Input Resistance
RINCM
12
MI
Input Bias Current
Input Offset Current (Note 4)
IRS+, IRS(IRS+) - (IRS-)
TA = +25NC
1
TA = +25NC
2
5
TA = -40NC to +125NC
3
TA = -40NC to +125NC
2 _______________________________________________________________________________________
6
6
FA
nA
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
(VCC = 3.3V, VRS+ = VRS- = +12V, VSENSE = (VRS+ - VRS-) = 0V, TA = -40NC to +125NC, unless otherwise noted. Typical values are
at TA = +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
VRS- = 0V to 60V,
TA = +25NC
Common-Mode Rejection Ratio
CMRR
VRS- = 0V to 60V,
TA = -40NC to +125NC
Power-Supply Rejection Ratio
Full-Scale Sense Voltage
LSB Step Size
PSRR
FS
LSB
VCC = 2.7V to 5.5V
Used in gain error
measurement
MIN
TYP
Gain = 8x,
VSENSE = 50mV
106
120
Gain = 4x,
VSENSE = 100mV
106
120
Gain = 1x,
VSENSE =400mV
100
120
Gain 8x,
VSENSE = 50mV
94
Gain 4x,
VSENSE = 100mV
94
Gain 1x,
VSENSE = 400mV
84
Gain = 8x,
VSENSE = 50mV
57
72
Gain = 4x,
VSENSE = 100mV
56
67
Gain = 1x,
VSENSE = 400mV
48
57
MAX
UNITS
dB
Gain = 8x
55
Gain = 4x
110
Gain = 1x
440
Gain = 8x
13.44
Gain = 4x
26.88
Gain = 1x
107.50
dB
mV
FV
ANALOG PATH, CSA + AMPLIFIER/COMPARATOR
Input Offset Voltage
SET Input Bias Current
VOS
TA = +25NC
IB
BW
Gain Bandwidth
Gain = 1x, RS- = 11.6V
GBW
Propagation Delay
tPD
Internal Hysteresis
VHYS
In comparator mode, 10mV overdrive
4
10
1
Maximum SET Input Voltage
Range
Signal Bandwidth
0.350
TA = -40NC to +125NC
50
mV
nA
1.126
V
4
MHz
2.5
MHz
1.5
Fs
In comparator mode, nonlatching
8
mV
Output Sink Current
VOUT = 4V
20
mA
Output Leakage Current
VOUT = 36V
1.7
Output Voltage Low
VOL
ISINK = 8mA, TA = -40°C to +85°C
ISINK = 8mA, TA = -40NC to +125NC
3
1
0.5
1.5
FA
V
_______________________________________________________________________________________ 3
MAX9611/MAX9612
ELECTRICAL CHARACTERISTICS (continued)
MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 3.3V, VRS+ = VRS- = +12V, VSENSE = (VRS+ - VRS-) = 0V, TA = -40NC to +125NC, unless otherwise noted. Typical values are
at TA = +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
OUT VOLTAGE MEASUREMENT (VOUT)
Full-Scale Input Voltage
LSB Step Size
LSB
Gain Error
GE
Input Offset Voltage
VOSOUT
VRSCM =
(VRS+ - VRS-)/2
57.3
14
0.8
TA = +25NC
TA = -40NC to +125°C
V
mV
6
7
TA = +25NC
14
TA = -40NC to +125NC
110
160
%
mV
COMMON-MODE VOLTAGE MEASUREMENT (VRSCM)
Full-Scale Input Voltage
LSB Step Size
LSB
Gain Error
GE
Input Offset Voltage
VOSOUT
VRSCM =
(VRS+ - VRS-)/2
TA = +25NC
57.3
V
14
mV
0.3
TA = -40NC to +125°C
6
7
TA = +25NC
14
TA = -40NC to +125NC
80
160
%
mV
SET VOLTAGE MEASUREMENT (VSET)
Full-Scale Input Voltage
1.10
V
LSB Step Size
268
FV
Gain Error
Input Offset Voltage
GE
VOSOUT
VRSCM =
(VRS+ - VRS-)/2
TA = +25NC
0.2
TA = -40NC to +125°C
5
6
TA = +25NC
0.3
TA = -40NC to +125NC
10
14
%
mV
Integral Nonlinearity
INL
1
LSB
Differential Nonlinearity
DNL
0.2
LSB
TEMPERATURE MEASUREMENT
Accuracy
0.48
Typical Measurement Range
-40
LSB Step Size
LSB
NC
+125
0.48
NC
NC
ANALOG-TO-DIGITAL CONVERTER
Resolution
12
Bit
Conversion Time
2
ms
SCL/SDA LOGIC LEVELS
Input Voltage Low
VIL
VCC = 2.7V to 5.5V
Input Voltage High
VIH
VCC = 2.7V to 5.5V
Input Hysteresis
Input Leakage Current
VHYS
0.4
1.45
V
V
0.05 x
VCC
1
V
200
nA
A1/A0 LOGIC LEVELS
Logic State 00-01 Threshold
1/4 x VCC
V
Logic State 01-10 Threshold
1/2 x VCC
V
Logic State 10-11 Threshold
3/4 x VCC
Input Leakage Current
1
4 _______________________________________________________________________________________
V
200
nA
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
(VCC = 3.3V, VRS+ = VRS- = +12V, VSENSE = (VRS+ - VRS-) = 0V, TA = -40NC to +125NC, unless otherwise noted. Typical values are
at TA = +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER-SUPPLY CHARACTERISTICS
Power-Supply Input Range
VCC
Quiescent Current
ICC
Shutdown Current
ISHDN
Guaranteed by PSRR
2.7
No activity on SCL
5.5
V
1.6
2.6
mA
5
10
FA
400
kHz
I2C TIMING CHARACTERISTICS (COMPATIBLE WITH SMBus)
Serial-Clock Frequency
Bus Free Time Between a STOP
and a START Condition
Hold Time, (Repeated) START
Condition
SCL Clock Low Period
SCL Clock High Period
fSCL
0
tBUF
1.3
Fs
tDH,STA
0.6
Fs
tLOW
1.3
Fs
tHIGH
0.6
Fs
Setup Time for a Repeated
START Condition
tSU,STA
0.6
Fs
Data Hold Time
tDH,DAT
0
Data Setup Time
tSU,DAT
900
100
ns
SDA/SCL Receiving Rise Time
tR
(Note 5)
20 + 0.1CB
300
SDA/SCL Receiving Fall Time
tF
(Note 5)
20 + 0.1CB
300
SDA Transmitting Fall Time
tF
(Note 5)
20 + 0.1CB
250
STOP Condition Setup Time
tSU,STO
Bus Capacitance
CB
Pulse Width of Spike Suppressed
tSP
Fs
0.6
ns
Fs
400
50
pF
ns
Note 2: All devices are 100% production tested at TA = +25NC. Temperature limits are guaranteed by design.
Note 3: VOS and gain error of current-sense amplifier extrapolated from from a two-point measurement made at VSENSE = (VRS+ VRS-) = 5mV to 50mV in gain of 8x, 5mV to 100mV in gain of 4x, and 10mV to 400mV in gain of 1x.
Note 4: Guaranteed by design.
Note 5: CB is in pF.
I2C Timing Diagram
SDA
tSU,STA
tSU,DAT
tLOW
tBUF
tHD,STA
tHD,DAT
tSU,STO
tHIGH
SCL
tHD,STA
tR
START CONDITION
tF
REPEATED START CONDITION
STOP
CONDITION
START
CONDITION
_______________________________________________________________________________________ 5
MAX9611/MAX9612
ELECTRICAL CHARACTERISTICS (continued)
Typical Operating Characteristics
(VCC = 3.3V, VCM = 12V, TA = +25NC, unless otherwise noted.)
GAIN = 8x
25
8x ADC PATH
600
TA = +125°C
500
4
MAX9611 toc02
700
MAX9611 toc01
2
400
VOS (µV)
20
15
TA = +85°C
300
200
100
10
0
-1
TA = -40°C
-100
-2
TA = +25°C
300
240
180
-4
0
VOFFSET_CSA (µV)
10
20
30
40
50
60
0
20
30
40
50
VCM (V)
TOTAL OFFSET VOLTAGE
vs. SUPPLY VOLTAGE
ADC PATH
GAIN = 8x
100
800
MAX9611 toc04
200
OP-AMP PATH
700
600
VOS (µV)
50
0
-50
-100
500
400
-150
300
-200
200
-250
3.0
3.5
4.0
4.5
5.0
2.5
5.5
3.0
3.5
4.0
4.5
5.0
VCC (V)
VCC (V)
RS- BIAS CURRENT
vs. COMMON-MODE VOLTAGE
RS+, RS- OFFSET CURRENT
vs. COMMON-MODE VOLTAGE
5
TA = +85°C
4
TA = -40°C
TA = +125°C
2
2.0
IOFFSET (nA)
TA = +25°C
3
2.5
MAX9611 toc06
2.5
1
5.5
MAX9611 toc07
VOS (µV)
10
VCM (V)
150
TA = +125°C
MAX9611 toc05
120
0
60
-60
-120
-180
-300
-240
-300
CSA OFFSET VOLTAGE
vs. SUPPLY VOLTAGE
IBIAS (mA)
TA = +85°C
-3
-200
0
TA = -40°C
TA = +25°C
1
0
5
ANALOG PATH
3
VOS (mV)
30
TOTAL OFFSET VOLTAGE
vs. COMMON-MODE VOLTAGE
MAX9611 toc03
MAX9611 CSA OFFSET VOLTAGE
vs. COMMON-MODE VOLTAGE
CSA HISTOGRAM
COUNTS
MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
1.5
1.0
0.5
0
0
0
10
20
30
VCM (V)
40
50
60
0
10
20
30
40
VCM (V)
6 _______________________________________________________________________________________
50
60
60
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
TOTAL GAIN ERROR
vs. COMMON-MODE VOLTAGE
GAIN ERROR (%)
0.2
0.20
0
-0.20
+85°C
-0.40
0.05
MAX9611 toc10
-40°C
+25°C
0.40
0.04
0
-0.2
-0.4
0.03
0.02
-0.6
+125°C
-0.60
0.01
-0.8
-0.80
-1.0
-1.00
20
30
40
0
60
50
10
20
30
40
50
0
60
0
VCM (V)
VCM (V)
0.5
1.0
1.5
2.0
2.5
3.0
SDA SINKING CURRENT (mA)
OUTPUT LOW VOLTAGE
vs. OUTPUT SINK CURRENT
SUPPLY CURRENT vs. SUPPLY VOLTAGE
2.0
MAX9611 toc11
4.0
3.5
MAX9611 toc12
10
1.7
3.0
2.5
ICC (mA)
OUTPUT LOW VOLTAGE (V)
2.0
1.4
1.1
1.5
1.0
0.8
0.5
0.5
0
0
5
10
15
20
2.5
25
3.0
3.5
4.0
4.5
5.0
5.5
VCC (V)
OUTPUT SINK CURRENT (mA)
CSA GAIN vs. FREQUENCY
(RS+/RS- TO OUT PATH)
OP-AMP GAIN vs. FREQUENCY
(SET TO OUT)
15
10
5
MAX9611 toc14
15
MAX9611 toc13
10
5
0
0
GAIN (dB)
0
GAIN (dB)
GAIN ERROR (%)
0.60
ANALOG PATH
SDA VOL (V)
8x ADC PATH
0.80
0.4
MAX9611 toc08
1.00
SDA/SCL VOL
vs. SINKING CURRENT
MAX9611 toc09
MAX9611 CSA GAIN ERROR
vs. COMMON-MODE VOLTAGE
-5
-10
-5
-10
-15
-15
-20
-20
-25
RS+ - RS- = VSENSE + VDC = 200mVP-P + 300mV
-30
1
10
100
FREQUENCY (kHz)
1,000
10,000
RS+ - RS- = 220mV
VIN = 100mVP-P
-25
-30
1
10
100
1,000
10,000
FREQUENCY (kHz)
_______________________________________________________________________________________ 7
MAX9611/MAX9612
Typical Operating Characteristics (continued)
(VCC = 3.3V, VCM = 12V, TA = +25NC, unless otherwise noted.)
Typical Operating Characteristics (continued)
(VCC = 3.3V, VCM = 12V, TA = +25NC, unless otherwise noted.)
CMRR vs. FREQUENCY
CSA ADC PATH
CMRR vs. FREQUENCY
ANALOG OP-AMP PATH
-20
MAX9611 toc17
MAX9611 toc16
VCM = 12V
VAC = 10VP-P
P-P NOISE (RS+/RS- TO OUT)
-70
MAX9611 toc15
0
-75
-80
-40
-60
-80
NOISE (5µV/div)
-85
CMRR (dB)
-90
-95
-100
-105
-100
-110
-120
-115
-140
-120
10
100
1000
0.01
FREQUENCY (kHz)
0.1
1
10
100
1000
INTEGRAL NONLINEARITY
vs. DIGITAL OUTPUT CODE
(SET INPUT)
1.0
0.1
0.8
0.6
0.4
-0.3
0.2
DNL (LSB)
-0.1
-0.5
-0.7
0
-0.2
-0.9
-0.4
-1.1
-0.6
-1.3
-0.8
-1.5
-1.0
0
512 1024 1536 2048 2560 3072 3584 4096
0
512 1024 1536 2048 2560 3072 3584 4096
DIGITAL CODE
DIGITAL CODE
ADC NOISE HISTOGRAM ON
VSET = 0.5V
ADC NOISE HISTOGRAM ON
VSENSE = 20mV (GAIN = 8x)
1000
MAX9611 toc20
1000
900
800
900
800
700
600
600
500
500
N
700
400
400
300
300
200
200
100
100
0
0
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
N
MAX9611 toc19
0.3
INL (LSB)
DIFFERENTIAL NONLINEARITY
vs. DIGITAL OUTPUT CODE
(SET INPUT)
MAX9611 toc18
0.5
TIME (10s/div)
FREQUENCY (kHz)
DIGITAL CODE
MAX9611 toc21
1
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
CMRR (dB)
MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
DIGITAL CODE
8 _______________________________________________________________________________________
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
HOT-SWAP OPERATION WITH
p-CHANNEL FET MODE 000
WATCHDOG LATCH RETRY MODE 111
MAX9611 toc24
DTIM = 0, RTIM = 1
VSET = 600mV
PULSE WIDTH > 1ms
DTIM = 0, RTIM = 0
VSET = 600mV
PULSE WIDTH < 1ms
VOLTAGE (5V/div)
VPULLUP
VOLTAGE (5V/div)
WATCHDOG LATCH RETRY MODE 111
MAX9611 toc23
MAX9611 toc22
VOUT (UNREGULATED)
VOUT (REGULATED)
VCSAIN
200mV/div
VOUT
5V/div
VCSAIN
200mV/div
VOUT
5V/div
ROUT = 8I
TIME (400µs/div)
TIME (100µs/div)
WATCHDOG LATCH MODE 111
TIME (4ms/div)
WATCHDOG LATCH MODE 111
MAX9611 toc25
MAX9611 toc26
200mV/div
VCSAIN
VCSAIN
VOUT
200mV/div
10V/div
5V/div
DTIM = 1, RTIM = 1
VSET = 600mV
PULSE WIDTH > 1ms
VOUT
TIME (100µs/div)
DTIM = 0, RTIM = 1
VSET = 600mV
PULSE WIDTH > 1ms
TIME (1ms/div)
WATCHDOG LATCH RETRY MODE 111
WATCHDOG LATCH RETRY MODE 111
MAX9611 toc27
DTIM = 0, RTIM = 0
VSET = 600mV
PULSE WIDTH > 1ms
MAX9611 toc28
VCSAIN
DTIM = 0, RTIM = 1
VSET = 600mV
PULSE WIDTH > 1ms
200mV/div
VCSAIN
200mV/div
VOUT
5V/div
VOUT
TIME (10ms/div)
5V/div
TIME (10ms/div)
_______________________________________________________________________________________ 9
MAX9611/MAX9612
Typical Operating Characteristics (continued)
(VCC = 3.3V, VCM = 12V, TA = +25NC, unless otherwise noted.)
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
MAX9611/MAX9612
Pin Configuration
TOP VIEW
OUT 1
+
10 VCC
RS+
2
9
A0
RS-
3
8
A1
SET
4
7
SDA
GND
5
6
SCL
MAX9611
MAX9612
µMAX
Pin Description
PIN
NAME
1
OUT
Internal Amplifier/Comparator Output
FUNCTION
2
RS+
Positive Current-Sensing Input. Power side connects to external sense resistor.
3
RS-
Negative Current-Sensing Input. Load side connects to external sense resistor.
4
SET
External Set-Point Voltage
5
GND
Ground
6
SCL
I2C Interface Clock Input
7
SDA
I2C Interface Data Input/Output
8
A1
Address Input 1
9
A0
Address Input 0
10
VCC
Supply Voltage Input. Bypass VCC to GND with a 0.1FF and a 4.7FF capacitor in parallel.
10 �������������������������������������������������������������������������������������
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
RS+
VCC
RS-
CSA
2.5x
OUT
OP AMP/
COMP
RS+
MAX9611
1x, 4x,
8x
A0
DECODER
MUX
TEMP
SET
GND
RS-
VCC
CSA
2.5x
OUT
OP AMP/
COMP
I2C
REGISTERS
SCL
SDA
MAX9612
1x, 4x,
8x
A0
DECODER
MUX
TEMP
SET
12-BIT
ADC
A1
12-BIT
ADC
I2C
REGISTERS
A1
SCL
SDA
GND
NOTE: ANALOG PATH IN BOLD.
______________________________________________________________________________________ 11
MAX9611/MAX9612
Functional Diagrams
MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Detailed Description
The MAX9611/MAX9612 are high-side, current-sense
amplifiers with an integrated 12-bit ADC and an internal
selectable op amp/comparator. These devices are ideal
for a variety of industrial and automotive applications.
The MAX9611/MAX9612’s high-side, current-sense
amplifiers operate over a wide 0V to 60V input common-mode voltage range. The programmable full-scale
voltage (440mV, 110mV, and 55mV) allows for a wide
dynamic range current measurement and application
flexibility in choosing sense resistor values.
The I2C bus is 1.8V and 3.3V logic compatible and
can interface with modern microcontrollers. An internal
12-bit, 500sps integrating analog-to-digital converter
(ADC) allows the user to read analog signals such as die
temperature, VOUT, VSET, VRSCM, and VSENSE.
At power-up, the selectable op-amp/comparator block
is configured in the op-amp mode. The op amp has
an effective 60V Class A-type output stage and can be
used to limit inrush currents and create a current source
when used in a closed-loop system. When the internal
comparator is selected, the MAX9611/MAX9612 can
be configured to have a latched and retry functionality, allowing a 60V open-drain transistor output, ideal to
operate high-side relay-disconnect FETs. The MAX9611
has a noninverting input-to-output configuration while the
MAX9612 has an inverting input-to-output configuration.
Current-Sense Amplifier
The MAX9611/MAX9612 feature a precision current-sense
amplifier with a 0V to 60V input common-mode voltage
range. An internal negative charge pump eliminates input
stage crossover distortion, typical in most rail-to-rail
input current-sense amplifiers. Low input bias currents
and low input offset currents allow a wide selection of
input filters to be designed without degrading the accuracy of the current-sense amplifier.
The current-sense amplifier inputs feature both a
-0.3V/+65V common-mode absolute maximum rating
as well as a Q65V differential absolute maximum rating,
allowing a wide variety of fault conditions to be withstood
easily by the device without damage.
The current-sense amplifier has a gain of 2.5V/V and
connects directly to the output op-amp/comparator
inputs. The ADC path features a 1x, 4x, and 8x programmable gain providing for 440mV, 110mV, and 55mV fullscale sense voltage.
Analog-to-Digital Converter (ADC)
The MAX9611/MAX9612 feature an internal dual-slope
integrating 12-bit ADC that has a 2ms conversion time
and a 1.8V and 3.3V logic-compatible I2C bus. An internal mux allows the following on chip variables to be
read: input sense voltage, input common-mode voltage,
SET voltage, OUT voltage, and die temperature.
Temperature Measurement
Die temperature can be read by the ADC over the entire
operating range (-40NC to +125NC) with 0.5NC resolution.
Die temperature can be used for application calibration
and thermal monitoring and is available in a 9-bit, two’s
complement format. Readings outside of normal operating temperature range (-40NC to +125NC) are inaccurate
and should be considered invalid. See Table 1 for binary
and hex values.
Table 1. Binary and Hex Digital Output Values for Temperature Measurements
TEMPERATURE (NC)
DIGITAL OUTPUT
BINARY
HEX
+122.4
0111 1111 1xxx xxxx
7F8x
+24
0001 1001 0xxx xxxx
190x
+0.48
0000 0000 1xxx xxxx
008x
0
0000 0000 0xxx xxxx
000x
-0.48
1111 1111 1xxx xxxx
FF8x
-24
1110 0111 0xxx xxxx
E70x
-40
1101 1001 1xxx xxxx
D98x
12 �������������������������������������������������������������������������������������
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
The SET input can also serve as an auxiliary input port
to the ADC, if the op amp or comparator is not utilized
in the application. Its full-scale input range extends from
0V to 1.10V.
OUT Voltage Measurement
The internal amplifier/comparator output voltage can be
monitored over the entire 0V to 57.3V range by the ADC.
An internal high-value resistor divider on OUT reduces
leakage current effects.
Common-Mode Voltage Measurement
The input common-mode voltage is defined as the average of the voltage at RS+ and RS-. A high value resistordivider allows measurement of the input common-mode
voltage over the 0V to 57.3V range.
Sense Voltage Measurement
Three programmable gains allow for a wide range of currents to be read by the ADC. The current-sense amplifier
gain can be set to 1x, 4x, or 8x. The full-scale sense voltages are then 440mV, 110mV, and 55mV, respectively.
Output Amplifier/Comparator
The MAX9611/MAX9612 feature an internally selectable
op amp and comparator where one of the inputs is connected to the 2.5x current-sense amplifier, and the other
input is connected to the SET input. The op amp or the
comparator output can be selected and connected to
OUT. The output stage is an open-drain 60V nFET, that
requires a suitable pullup resistor for proper operation. The op amp then behaves like a Class-A output
stage. Select op amp or comparator function in Control
Register 1 (0x0A) bit 7 (see Tables 4 and 5).
Watchdog/Latch/Retry Functionality
Internal digital circuitry is used to implement a watchdog
feature that can be useful to handle normal application
transients that are not true fault conditions. This feature
applies both to the op amp and comparator modes of
part operation. A watchdog delay time is internally set to
1ms by default but can be changed to 100Fs. The retry
delay time is internally set to 50ms by default, but can be
changed to 10ms (see Tables 6 and 7).
In normal operation mode, (Control Register 1 (0x0A)
000x xxxx), the amplifier output responds to the difference between its inputs, i.e., the CSA output voltage and
the SET voltage. In open-loop configuration, the op amp
can be used as a comparator.
In a watchdog-latch-retry mode (Control Register 1
(0x0A) 111x xxxx), the output of the comparator waits
for a watchdog delay time (to ensure the CSA output
continues to stay above the SET voltage for this duration)
before responding, and then latches onto this state. After
a retry delay time, it resets the comparator state and the
cycle repeats.
Similar functionality is implemented for the op-amp
mode as well (Control Register 1 (0x0A) 000x xxxx to
011x xxxx).
A RESET bit is defined in Control Register 1 (0x0A) to
reset a latched state when commanded by the user.
I2C Interface
The MAX9611/MAX9612 I2C interface consists of a
serial-data line (SDA) and serial-clock line (SCL). SDA
and SCL facilitate bidirectional communication between
the MAX9611/MAX9612 and the master at rates up to
400kHz. The MAX9611/MAX9612 are slave devices that
transfer and receive data. The master (typically a microcontroller) initiates data transfer on the bus and generates the SCL signal to permit that transfer.
______________________________________________________________________________________ 13
MAX9611/MAX9612
SET Voltage Measurement
The SET voltage serves as a reference voltage for the
internal op amp or comparator around which a control
loop can be designed. The low bias current for SET
allows high-impedance resistor-dividers and currentoutput DACs to be used, making it easy to interface
without introducing additional errors.
MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Slave Address
A bus master initiates communication with a slave
device by issuing a START (S) condition followed by a
slave address. When idle, the MAX9611/MAX9612 continuously wait for a START condition followed by their
slave address. When the MAX9611/MAX9612 recognize
a slave address, it is ready to accept or send data. The
MAX9611/MAX9612 offer 16 different slave addresses
using two address inputs, A1 and A0. See Table 2 for
different slave address options. The least significant bit
(LSB) of the address byte (R/W) determines whether
the master is writing to or reading from the MAX9611/
MAX9612 (R/W = 0 selects a write condition, R/W = 1
selects a read condition). After receiving the address,
the MAX9611/MAX9612 (slave) issue an acknowledge
by pulling SDA low for one clock cycle.
I2C Write Operation
A write operation (Figure 1) begins with the bus master
issuing a START condition followed by seven address
bits and a write bit (R/W = 0). If the address byte is
successfully received, the MAX9611/MAX9612 (slave)
issue an acknowledge (A). The master then writes to
the slave and the sequence is terminated by a STOP (P)
condition for a single write operation.
For a burst write operation, more data bytes are sent after
the register address before the transaction is terminated.
Table 2. MAX9611/MAX9612 Address
Description
A0
DEVICE WRITE
ADDRESS (hex)
DEVICE READ
ADDRESS (hex)
0
0
0xE0
0xE1
0
1/3 x VCC
0xE2
0xE3
0
2/3 x VCC
0xE4
0xE5
0
VCC
0xE6
0xE7
A1
1/3 x VCC
0
0xE8
0xE9
1/3 x VCC
1/3 x VCC
0xEA
0xEB
1/3 x VCC
2/3 x VCC
0xEC
0xED
1/3 x VCC
VCC
0xEE
0xEF
2/3 x VCC
0
0xF0
0xF1
2/3 x VCC
1/3 x VCC
0xF2
0xF3
2/3 x VCC
2/3 x VCC
0xF4
0xF5
2/3 x VCC
VCC
0xF6
0xF7
VCC
0
0xF8
0xF9
VCC
1/3 x VCC
0xFA
0xFB
VCC
2/3 x VCC
0xFC
0xFD
VCC
VCC
0xFE
0xFF
I2C Read Operation
In an I2C read operation (Figure 2), the bus master
issues a write command first by initiating a START condition followed by seven address bits, a write bit (R/W = 0)
and the 8-bit register address. The master then issues
a Repeated START (Sr) condition, followed by seven
address bits, a read bit (R/W = 1). If the address byte
is successfully received, the MAX9611/MAX9612 (slave)
issue an acknowledge (A). The master then reads from
the slave. For continuous read, the master issues an
acknowledge bit (AM) after each received byte. The
master terminates the read operation by sending a not
acknowledge (NA) bit. The MAX9611/MAX9612 then
release the data line SDA allowing the master to generate a STOP condition.
SINGLE WRITE
ACKNOWLEDGE FROM
MAX9611/MAX9612
S
SLAVE ADDRESS
A
DATA
0
A
REGISTER ADDRESS
R/W
BURST WRITE
S
A
P
STOP
ACKNOWLEDGE FROM
MAX9611/MAX9612
SLAVE ADDRESS
0
A
REGISTER ADDRESS
R/W
A
DATA 1
A
DATA 2
A
DATA 3
A
DATA N
A
P
STOP
Figure 1. I2C Write Operation
SINGLE READ
SLAVE ADDRESS
S
A Sr
BURST READ
S
REGISTER ADDRESS
0 A
R/W
SLAVE ADDRESS
1
DATA
A
R/W
ACKNOWLEDGE FROM
MAX9611/MAX9612
R/W
SLAVE ADDRESS
AM P
ACKNOWLEDGE FROM
FROM MASTER
0 A
SLAVE ADDRESS
A Sr
REPEAT
START
AM
ACKNOWLEDGE FROM
MAX9611/MAX9612
1
REGISTER ADDRESS
DATA
A
R/W
DATA
AM
DATA N
NO READ-ACKNOWLEDGE
FROM MASTER
Figure 2. I2C Read Operation
14 �������������������������������������������������������������������������������������
NA P
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Table 3 lists all the registers, their corresponding POR
values and their addresses.
The two control registers are read/write registers used
to configure the ADC for different modes of operation.
Table 3. Internal Register/Addresses
REGISTERS
POR VALUES (hex)
REGISTER ADDRESS (hex)
CSA DATA BYTE 1 (MSBs)
0x000
0x00
CSA DATA BYTE 1 (LSBs)
0x000
0x01
RS+ DATA BYTE 1 (MSBs)
0x000
0x02
RS+ DATA BYTE 1 (LSBs)
0x000
0x03
OUT DATA BYTE 1 ( MSBs)
0x000
0x04
OUT DATA BYTE 1 (LSBs)
0x000
0x05
SET DATA BYTE 1 (MSBs)
0x000
0x06
SET DATA BYTE 1 (LSBs)
0x000
0x07
TEMP DATA BYTE 1 (MSBs)
0x800
0x08
TEMP DATA BYTE 1 (LSBs)
0x000
0x09
CONTROL REGISTER 1
0x000
0x0A
CONTROL REGISTER 2
0x000
0x0B
Data Registers
The five 12-bit data registers banks comprise two 8-bit registers for 8 MSBs and 4 LSBs. The 12-bit data is split
between the two 8-bit data bytes as seen in Figure 1. They are read-only registers that hold the converted data. Do not
issue a STOP command until both bytes are read. Instead use a Repeated START command to read the second byte.
Byte 1
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
MSB12
MSB11
MSB10
MSB09
MSB08
MSB07
MSB06
MSB05
Byte 2
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
LSB05
LSB03
LSB02
LSB01
0
0
0
0
Control Register 1
Control Register 1 is an 8-bit write/read register that configures the MAX9611/MAX9612 for different modes of operation. Tables 4 and 5 show the bit location and function for Control Register 1.
Table 4. Control Register 1 Bit Location
BIT NUMBER
7
6
5
4
3
2
1
0
BIT NAME
MODE2
MODE1
MODE0
LR
SHDN
MUX2
MUX1
MUX0
POR VALUE
0
0
0
0
0
0
0
0
______________________________________________________________________________________ 15
MAX9611/MAX9612
Registers
The MAX9611/MAX9612 include five 12-bit data register
banks and two 8-bit control registers.
MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Table 5. Control Register 1 Bit Description
BIT
BIT NAME
2, 1, 0
MUX2, MUX1,
MUX0
3
SHDN
4
LR
7, 6, 5
MODE2, MODE1,
MODE0
FUNCTION
000 Channel A: Read current-sense amplifier output from ADC, gain = 1x
001 Channel A: Read current-sense amplifier output from ADC, gain = 4x
010 Channel A: Read current-sense amplifier output from ADC, gain = 8x
011 Channel B: Read average voltage of RS+ (input common-mode voltage) from ADC
100 Channel C: Read voltage of OUT from ADC
101 Channel D: Read voltage of SET from ADC
110 Channel E: Read internal die temperature from ADC
111 Read all channels in fast-read mode, sequentially every 2ms. Uses last gain setting.
Power-on state = 0
0 = Normal operation
1 = Shutdown mode
0 = Normal operation
1 = Reset if comparator is latched due to MODE = 111. This bit is automatically reset after a
1 is written.
000 = Normal operation for op amp/comparator
111 = Comparator mode. OUT remains low until CSA output > VSET for 1ms, OUT latches
high for 50ms, then OUT autoretries by going low. The comparator has an internal
±10mV hysteresis voltage to help with noise immunity. For MAX9612, the polarity is
reversed.
011 = Op-amp mode. OUT regulates pFET for 1ms at VSET, OUT latches high for 50ms,
then OUT autoretries by going low. For MAX9612, the polarity is reversed.
Control Register 2
Control Register 2 is an 8-bit write/read register that provides the different time delay options for asserting the comparator output when monitoring fault events. Tables 6 and 7 show the bit location and function for Control Register 2.
Table 6. Control Register 2
BIT NUMBER
7
6
5
4
3
2
1
0
BIT NAME
X
X
X
X
DTIM
RTIM
X
X
POR VALUE
0
0
0
0
0
0
0
0
Table 7. Control Register 2 Bit Descriptions
BIT
BIT NAME
7, 6, 5, 4
X
FUNCTION
3
DTIM
Watchdog delay time
0 = 1ms
1 = 100Fs
2
RTIM
Watchdog retry delay time
0 = 50ms
1 = 10ms
1, 0
X
Set to 0
Set to 0
16 �������������������������������������������������������������������������������������
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Applications Information
Inrush Current Limiter
The MAX9611 can be used as an inrush current limiter
for a number of applications as shown in Figure 3. Note
that the sense resistor can be placed on either side of
the pFET. Since the input common-mode voltage of the
MAX9611 extends to ground, the sense resistor can be
placed at the load side as well, allowing current to be
sensed even when there is a dead-short on the load.
The inrush current limiting circuit reads and measures
the load-current during normal operation and can limit
the load current to a user-set value. In normal operation,
the load current is below the set threshold. The pFET
is fully turned on because the op-amp output is at 0V.
In the event of an overcurrent situation at the load, the
op-amp controls the pFET’s gate-voltage so it transitions
to a linear region, thus limiting the load current. In this
case, the op-amp output voltage is between 0V and
VBAT, as required for current-limiting.
Choose a suitable sense resistor and a low RDS-on pFET to
ensure the best efficiency during normal operation. Choose
a pFET with large power dissipation to ensure compliance
with safe operating area of the pFET. The MAX9611 comes
equipped with a variety of watchdog options to help with
this design (see Control Register 2, Table 7).
Choose resistor values R1 and R2 to ensure that the
pFET is fully on in normal operating conditions and to
ensure that the VGS maximum rating is not exceeded.
Also, R1 and R2 help limit the current in the open-drain
output stage of the internal op amp. RCOMP and CCOMP
help roll-off high-frequency gain of the feedback control
system. R2 and CCOMP set a pole, for which 10kHz is a
good choice. RCOMP and CCOMP set a zero, for which
100kHz is a good choice.
With the internal gain of the current-sense amplifier
(2.5V/V), the inrush current-limit threshold can be set
using resistor-divider R3 and R4 as follows:
VCC × R3
=I
R2
+
R3
(
)(2.5 × R SENSE ) LIMIT
Note: The inrush current limiter can be changed to a
high-side relay-disconnect circuit by using the MAX9611
set to comparator mode (MODE 111).
INRUSH CURRENT LIMITER
RSENSE
VBAT
CCOMP
R2
P
RS+
2.7V TO 5.5V
RCOMP
RSLOAD
A0
VCC
0.1µF
R1
A1
R4
MAX9611
OUT
0.1µF
R3
SET
1µF
GND
SCL
I2C CLOCK
INPUT
SDA
I2C DATA
INPUT/OUTPUT
(OUTPUT SET TO OP-AMP MODE)
Figure 3. Inrush Current Limiter
______________________________________________________________________________________ 17
MAX9611/MAX9612
Power-On Reset
The MAX9611/MAX9612 include power-on reset circuitry that ensures all registers reset to a known state on
power-up. Once VCC goes above 2.4V, the POR circuit
releases the registers for normal operation.
MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Base-Station PA Gain Control
When the OUT open-dran transistor is off, the gate voltage of the PA FET is:
While the MAX9611 is designed to control high-side
pFETs, the MAX9612 can be similarly used to control
low-side nFETs. For example the MAX9612 can be used
to control the DC bias point of power amplifier LDMOS
or GaN nFETs in base-station applications. The circuit
shown in Figure 4 also allows the option to apply negative bias voltages to the PA FET, which is required for
certain types of transistors for proper operation.
VGATE =
VCLAMPR1 VNEG (R2 + R3)
+
R1 + R2 + R3
R1 + R2 + R3
RCOMP and CCOMP connected to the OUT pin compensate the internal amplifier. Choose a corner frequency
of 100kHz.
In the circuit shown, the nFET is in a linear mode of
operation to allow it to amplify high-frequency RF signals, while the MAX9612 sets the DC operating point.
The gain of the FET can be varied by changing its drain
current. This operating point can be varied by an external DAC voltage that feeds the SET pin.
Choose suitable RSENSE as required for the application.
The inductor isolates the DC measuring point of current
from the high-frequency AC signals through the PA FET,
as well as helping with the high-frequency gain.
Power-Supply Bypassing and Grounding
The MAX9611/MAX9612 share a common ground pin
for both the analog and digital on-chip circuitry. It is
therefore very important to properly bypass the VCC to
GND, and to have a solid low-noise ground plane on the
circuit board so as to minimize ground bounce. Bypass
VCC to GND with low ESR 0.1FF in parallel with a 4.7FF
ceramic capacitors to GND placed as close as possible
to the device.
VNEG and VCLAMP together with R1, R2, and R3 set the
DC bias point limits for the PA transistor. VCLAMP is a
suitable positive voltage and VNEG is a suitable negative voltage. When VOUT = 0V, the gate voltage of the
PA FET is:
VNEG × R2
= VOUT
(R1 + R2)
Chip Information
PROCESS: BiCMOS
BASE-STATION PA GAIN CONTROL
2.7V TO 5.5V
RS-
RFOUT
RS+
A0
VCC
CIN
VCLAMP
A1
R3
MAX9612
R2
N
SCL
I2C CLOCK
INPUT
SDA
I2C DATA
INPUT/OUTPUT
SET
10-BIT
DAC
OUT
RCOMP
R1
VNEG
CCOMP
GND
RFIN
(OUTPUT SET TO OP-AMP MODE)
Figure 4. Base-Station PA Gain Control
18 �������������������������������������������������������������������������������������
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
PACKAGE CODE
OUTLINE NO.
LAND PATTERN NO.
10 FMAX
U10+2
21-0061
90-0330
10LUMAX.EPS
PACKAGE TYPE
α
α
______________________________________________________________________________________ 19
MAX9611/MAX9612
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the
package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the
package regardless of RoHS status.
MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Revision History
REVISION
NUMBER
REVISION
DATE
DESCRIPTION
PAGES
CHANGED
0
9/10
Initial release
—
1
11/10
Updated text in Table 5 to add “comparator” to mode 000 for bits 7, 6, 5
16
2
1/11
Relaxed room temperature limits for 4x and 8x gains from 0.3mV to 0.5mv
1, 2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time.
20
© 2011
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.