MAXIM MAX3267ESA

19-4796; Rev 1; 6/00
KIT
ATION
EVALU
E
L
B
AVAILA
1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise
Transimpedance Preamplifiers for LANs
The 1.25Gbps MAX3266 has a typical optical dynamic
range of -24dBm to 0dBm in a shortwave (850nm)
configuration or -27dBm to -3dBm in a longwave
(1300nm) configuration. The 2.5Gbps MAX3267 has a
typical optical dynamic range of -21dBm to 0dBm in a
shortwave configuration or -24dBm to -3dBm in a longwave configuration.
Features
♦ 200nA Input-Referred Noise (MAX3266)
500nA Input-Referred Noise (MAX3267)
♦ 920MHz Bandwidth (MAX3266)
1900MHz Bandwidth (MAX3267)
♦ 1mA Input Overload
♦ +3.0V to +5.5V Single-Supply Voltage
Ordering Information
PART
TEMP. RANGE
MAX3266CSA
0°C to +70°C
8 SO
MAX3266C/D
—
Dice*
MAX3267CSA
0°C to +70°C
8 SO
—
Dice*
MAX3267C/D
MAX3267ESA
PIN-PACKAGE
-40°C to +85°C
MAX3267E/D
8 SO
—
Dice*
*Dice are designed to operate over a -40°C to +140°C junction temperature (Tj) range, but are tested and guaranteed at TA = +25°C.
Pin Configuration
TOP VIEW
Applications
VCC 1
Gigabit Ethernet
N.C.
1Gbps to 2.5Gbps Optical Receivers
IN
Fibre Channel
2
3
MAX3266
MAX3267
FILTER 4
8
GND
7
OUT+
6
OUT-
5
GND
SO
Typical Application Circuit
VCC
0.01µF
1.5k
CFILTER
400pF
VCC
FILTER
0.1µF
OUT+
PHOTODIODE
IN
100Ω
OUT-
MAX3266
MAX3267
0.1µF
LIMITING
AMPLIFIER
GND
________________________________________________________________ Maxim Integrated Products
1
For free samples and the latest literature, visit www.maxim-ic.com or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
MAX3266/MAX3267
General Description
The MAX3266 is a transimpedance preamplifier for
1.25Gbps local area network (LAN) fiber optic
receivers. The circuit features 200nA input-referred
noise, 920MHz bandwidth, and 1mA input overload.
The MAX3267 provides a pin-for-pin compatible solution for communications up to 2.5Gbps. It features
500nA input-referred noise, 1.9GHz bandwidth, and
1mA input overload.
Both devices operate from a +3.0V to +5.5V single supply and require no compensation capacitor. They also
include a space-saving filter connection that provides
positive bias for the photodiode through a 1.5kΩ resistor
to VCC. These features allow easy assembly into a TO-46
or TO-56 header with a photodiode.
MAX3266/MAX3267
1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise
Transimpedance Preamplifiers for LANs
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (VCC - GND) .................................-0.5V to +6.0V
IN Current..............................................................-4mA to +4mA
FILTER Current......................................................-8mA to +8mA
Voltage at OUT+, OUT- ...................(VCC - 1.5V) to (VCC + 0.5V)
Continuous Power Dissipation (TA = +70°C)
8-Pin SO (derate 6.7mW/°C above +70°C)..................533mW
Storage Temperature Range .............................-55°C to +150°C
Operating Junction Temperature (die) ..............-55°C to +150°C
Processing Temperature (die) .........................................+400°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—MAX3266C/MAX3267C
(VCC = +3.0V to +5.5V, TA = 0°C to +70°C, 100Ω load between OUT+ and OUT-. Typical values are at TA = +25°C, VCC = 3.3V,
source capacitance = 0.85pF, unless otherwise noted.) (Note 1)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
0.69
0.83
0.91
V
26
50
mA
MAX3266
2260
2800
3400
MAX3267
1540
1900
2330
Input Bias Voltage
Supply Current
Transimpedance
Differential, measured
with 30µAp-p signal
(40µAp-p for MAX3267)
Ω
Output Impedance
Single ended (per side)
48
50
52
Ω
Maximum Differential Output
Voltage
Input = 1mAp-p
185
250
415
mVp-p
1220
1500
1860
Ω
Filter Resistor
AC Input Overload
1.0
mAp-p
DC Input Overload
0.65
mA
Die, packaged in TO-56
header (Note 2)
Input-Referred RMS Noise
SO package
(Note 2)
Input-Referred Noise Density
Small-Signal Bandwidth
Low-Frequency Cutoff
(Note 2)
MAX3266
192
MAX3266
200
MAX3267
485
MAX3266
MAX3267
6.6
11.0
nA
655
pA/(Hz)1/2
MAX3266
750
920
1100
MAX3267
1530
1900
2420
-3dB, input ≤ 20µA DC
44
MAX3266
MAX3267
Transimpedance Linear Range
Peak-to-peak,
0.95 < linearity < 1.05
Deterministic Jitter
(Note 3)
Power-Supply Rejection Ratio
(PSRR)
Output referred, f < 2MHz,
PSRR = -20log (∆VOUT/∆VCC)
2
256
MHz
kHz
30
40
µAp-p
MAX3266
19
76
MAX3267
12
50
50
_______________________________________________________________________________________
ps
ps
dB
1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise
Transimpedance Preamplifiers for LANs
(VCC = +3.0V to +5.5V, TA = -40°C to +85°C, 100Ω load between OUT+ and OUT-. Typical values are at TA = +25°C, VCC = 3.3V,
source capacitance = 0.85pF, unless otherwise noted.) (Note 1)
PARAMETER
CONDITIONS
Input Bias Voltage
MIN
TYP
0.67
0.83
0.97
V
26
53.2
mA
Supply Current
MAX
UNITS
Transimpedance
Differential, measured with 40µAp-p signal
1470
1900
2355
Ω
Output Impedance
Single ended (per side)
47.7
50
52.1
Ω
Maximum Differential Output
Voltage
Input = 1mAp-p
155
250
430
mVp-p
1210
1500
1865
Ω
Filter Resistor
AC Input Overload
1.0
DC Input Overload
0.65
mAp-p
mA
Input-Referred RMS Noise
SO package (Note 2)
485
Input-Referred Noise Density
(Note 2)
11.0
Small-Signal Bandwidth
1515
1900
Low-Frequency Cutoff
-3dB, input ≤ 20µA DC
Transimpedance Linear Range
Peak-to-peak, 0.95 < linearity < 1.05
Deterministic Jitter
(Note 3)
14
Power-Supply Rejection Ratio
(PSRR)
Output referred, f < 2MHz,
PSRR = -20log (∆VOUT/∆VCC)
50
668
nA
pA/(Hz)1/2
2550
24
MHz
kHz
40
µAp-p
50
ps
dB
Note 1: Source Capacitance represents the total capacitance at the IN pin during characterization of noise and bandwidth parameters. Figure 1 shows the typical source capacitance vs. reverse voltage for the photodiode used during characterization of
TO-56 header packages. Noise and bandwidth will be affected by the source capacitance. See the Typical Operating
Characteristics for more information.
Note 2: Input-Referred Noise is calculated as RMS Output Noise / (Gain at f = 10MHz). Noise Density is (Input-Referred Noise) /
√bandwidth. No external filters are used for the noise measurements.
Note 3: Deterministic Jitter is measured with the K28.5 pattern applied to the input [00111110101100000101].
_______________________________________________________________________________________
3
MAX3266/MAX3267
ELECTRICAL CHARACTERISTICS—MAX3267E
Typical Operating Characteristics
(VCC = +3.3V, TA = +25°C, MAX3266/MAX3267 EV kit, source capacitance = 0.85pF, unless otherwise noted.)
210
200
190
CIN = 1.0pF
CIN = 1.5pF CIN = 1.0pF
25
50
75
100
-25
0
25
50
75
100
1M
10M
100M
1G
10G
FREQUENCY (Hz)
DETERMINISTIC JITTER
vs. INPUT AMPLITUDE
INPUT-REFERRED RMS NOISE CURRENT
vs. DC INPUT CURRENT
SMALL-SIGNAL TRANSIMPEDANCE
vs. TEMPERATURE
60
50
MAX3267
30
20
700
MAX3267
600
500
400
300
MAX3266
10
200
1
1000
10
100
MAX3266
BANDWIDTH vs. TEMPERATURE
MAX3267
BANDWIDTH vs. TEMPERATURE
2400
940
CIN = 0.5pF
890
840
BANDWIDTH (MHz)
MAX3266/67-07
990
CIN IS SOURCE CAPACITANCE
2300 PRESENTED TO DIE, INCLUDING
PACKAGE PARASITIC, PIN DIODE,
2200 AND PARASITIC INTERCONNECT
CAPACITANCE.
2100
CIN = 0.5pF
2000
740
25
50
75
JUNCTION TEMPERATURE (°C)
100
64
63
1500
-50
-25
0
25
50
75
100
OUTPUT AMPLITUDE vs. TEMPERATURE
350
300
250
200
150
100
CIN = 1.0pF
50
CIN = 1.5pF
-25
0
25
50
75
JUNCTION TEMPERATURE (°C)
-50
AMBIENT TEMPERATURE (°C)
1800
1600
CIN = 1.5pF
MAX3267
65
60
1000
1900
1700
CIN = 1.0pF
66
61
DIFFERENTIAL DC INPUT CURRENT (µA)
CIN IS SOURCE CAPACITANCE
PRESENTED TO DIE, INCLUDING
PACKAGE PARASITIC, PIN DIODE,
AND PARASITIC INTERCONNECT
CAPACITANCE.
MAX3266
67
62
MAX3266
PEAK-TO-PEAK AMPLITUDE (µA)
1040
68
0
100
1090
69
AMPLITUDE (mV)
0
MAX3266/67-06
800
100
10
70
MAX3266/67-05
900
TRANSIMPEDANCE (dB)
70
1000
INPUT-REFERRED NOISE (nA)
MAX3266/67-04
80
0
MAX3266/67-03
50
-50
JUNCTION TEMPERATURE (°C)
90
790
MAX3267
60
JUNCTION TEMPERATURE (°C)
100
40
65
55
CIN = 0.5pF
350
0
PEAK-TO-PEAK JITTER (ps)
450
400
170
4
500
CIN = 1.5pF
70
MAX3266/67-09
180
CIN = 0.5pF
550
MAX3266
TRANSIMPEDANCE (dB)
220
CIN IS SOURCE CAPACITANCE
PRESENTED TO DIE, INCLUDING
PACKAGE PARASITIC, PIN DIODE,
AND PARASITIC INTERCONNECT
CAPACITANCE.
600
FREQUENCY RESPONSE
75
MAX3266/67-08
INPUT-REFERRED NOISE (nA)
230
650
MAX3266/67-02
CIN IS SOURCE CAPACITANCE
PRESENTED TO DIE, INCLUDING
PACKAGE PARASITIC, PIN DIODE,
AND PARASITIC INTERCONNECT
CAPACITANCE.
240
MAX3267
INPUT-REFERRED NOISE vs. TEMPERATURE
INPUT-REFERRED NOISE (nA)
250
MAX3266/67-01
MAX3266
INPUT-REFERRED NOISE vs. TEMPERATURE
BANDWIDTH (MHz)
MAX3266/MAX3267
1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise
Transimpedance Preamplifiers for LANs
100
0
-50
-25
0
25
50
AMBIENT TEMPERATURE (°C)
_______________________________________________________________________________________
75
100
1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise
Transimpedance Preamplifiers for LANs
4mV/div
INPUT: 27-1 PRBS
30mV/div
INPUT: 27-1 PRBS
MAX3266/67-12
EYE DIAGRAM (INPUT = 20µAp-p)
MAX3266/67-11
EYE DIAGRAM (INPUT = 1mAp-p)
MAX3266/67-10
EYE DIAGRAM (INPUT = 10µAp-p)
5mV/div
INPUT: 27-1 PRBS
160ps/div
80ps/div
160ps/div
DC TRANSFER FUNCTION
30mV/div
150
MAX3266/67-14
INPUT: 27-1 PRBS
100
OUTPUT VOLTAGE (mVp-p)
MAX3266/67-13
EYE DIAGRAM (INPUT = 1mAp-p)
MAX3267
50
MAX3266
0
-50
-100
-150
80ps/div
-200 -150 -100 -50
0
50
100 150 200
INPUT CURRENT (µA)
Pin Description
PIN
NAME
FUNCTION
1
VCC
Supply Voltage
2
N.C.
No Connection. Not internally connected.
3
IN
4
FILTER
5
GND
Ground
6
OUT-
Inverting Output. Current flowing into IN causes VOUT- to decrease.
7
OUT+
Noninverting Output. Current flowing into IN causes VOUT+ to increase.
8
GND
Ground
Amplifier Input
Provides bias voltage for the photodiode through a 1.5kΩ resistor to VCC. When grounded, this pin disables
the DC Cancellation Amplifier to allow a DC path from IN to OUT+ and OUT- for testing.
_______________________________________________________________________________________
5
MAX3266/MAX3267
Typical Operating Characteristics (continued)
(VCC = +3.3V, TA = +25°C, MAX3266/MAX3267 EV kit, source capacitance = 0.85pF, unless otherwise noted.)
Detailed Description
The MAX3266 is a transimpedance amplifier designed
for 1.25Gbps fiber optic applications. Figure 2 is a functional diagram of the MAX3266, which comprises a transimpedance amplifier, a voltage amplifier, an output
buffer, an output filter, and a DC cancellation circuit.
The MAX3267, a transimpedance amplifier designed
for 2.5Gbps fiber optic applications, shares similar
architecture with the MAX3266.
1.85
1.70
1.40
1.25
1.10
0.95
0.80
0.65
0.50
1
2
3
4
Voltage Amplifier
The voltage amplifier converts single-ended signals to
differential signals and introduces a voltage gain.
The output buffer provides a reverse-terminated voltage output. The buffer is designed to drive a 100Ω differential load between OUT+ and OUT-. The output
current is divided between internal 50Ω load resistors
and the external load resistor. In the typical operating
circuit, this creates a voltage-divider with gain of 1/2.
The MAX3266 can also be terminated with higher output impedances, which increases gain and output voltage swing.
For optimum supply-noise rejection, the MAX3266
should be terminated with a differential load. If a singleended output is required, the unused output should be
similarly terminated. The MAX3266 will not drive a DCcoupled, 50Ω grounded load.
1.55
0
Transimpedance Amplifier
The signal current at the input flows into the summing
node of a high-gain amplifier. Shunt feedback through
RF converts this current to a voltage with gain of approximately 2.2kΩ (1.0kΩ for MAX3267). Schottky diodes
clamp the output voltage for large input currents, as
shown in Figure 3.
Output Buffer
MAX3266/67 fig01
2.00
CAPACITANCE (pF)
MAX3266/MAX3267
1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise
Transimpedance Preamplifiers for LANs
5
REVERSE BIAS (V)
Figure 1. Typical Photodiode Capacitance vs. Bias Voltage
MAX3266
RF
TRANSIMPEDANCE
AMPLIFIER
VOLTAGE
AMPLIFIER
OUTPUT
BUFFER
50Ω
OUTPUT
FILTER
OUT+
OUT-
IN
50Ω
LOWPASS FILTER
VCC
VCC
GND
DISABLE
1.5k
DC CANCELLATION
CIRCUIT
FILTER
Figure 2. MAX3266 Functional Diagram
6
_______________________________________________________________________________________
1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise
Transimpedance Preamplifiers for LANs
MAX3266/MAX3267
AMPLITUDE
AMPLITUDE
INPUT FROM PHOTODIODE
TIME
TIME
OUTPUT (SMALL SIGNALS)
OUTPUT (LARGE SIGNALS)
Figure 3. MAX3266 Limited Output
INPUT (AFTER DC CANCELLATION)
Figure 4. DC Cancellation Effect on Input
Output Filter
The MAX3266 includes a one-pole lowpass filter that
limits the circuit bandwidth and improves noise performance.
DC Cancellation Circuit
The DC cancellation circuit uses low-frequency feedback to remove the DC component of the input signal
(Figure 4). This feature centers the input signal within
the transimpedance amplifier’s linear range, thereby
reducing pulse-width distortion on large input signals.
The DC cancellation circuit is internally compensated
and therefore does not require external capacitors. This
circuit minimizes pulse-width distortion for data
sequences that exhibit a 50% duty cycle. A duty cycle
significantly different from 50% will cause the MAX3266
to generate pulse-width distortion.
DC cancellation current is drawn from the input and
creates noise. For low-level signals with little or no DC
component, this is not a problem. Amplifier noise will
increase for signals with significant DC component (see
Typical Operating Characteristics).
Applications Information
Optical Power Relations
Many of the MAX3266 specifications relate to the input
signal amplitude. When working with fiber optic
receivers, the input is usually expressed in terms of average optical power and extinction ratio. Figure 5 shows
relations that are helpful for converting optical power to
input signal when designing with the MAX3266.
Optical power relations are shown in Table 1; the definitions are true if the average duty cycle of the input data
is 50%.
Optical Sensitivity Calculation
The input-referred RMS noise current (I N ) of the
MAX3266 generally determines the receiver sensitivity.
To obtain a system bit error rate (BER) of 1E-12, the
SNR ratio must always exceed 14.1. The input sensitivity, expressed in average power, can be estimated as:
 14.1 I r + 1

N e

1000 dBm
Sensitivity = 10 log
 2ρ r − 1



(e
(
)
)
Where ρ is the photodiode responsivity in A/W.
Input Optical Overload
The overload is the largest input that the MAX3266
accepts while meeting specifications. The optical overload can be estimated in terms of average power with
the following equation:
 1mA

Overload = 10 log 
1000 dBm
 2ρ

_______________________________________________________________________________________
7
Noise performance and bandwidth will be adversely
affected by capacitance at the IN pin. Minimize capacitance on this pin and select a low-capacitance photodiode. Assembling the MAX3266 in die form using chip
and wire technology provides the best possible performance. Figure 6 shows a suggested layout for a TO
header.
The SO package version of the MAX3266 is offered as
an easy way to characterize the circuit and become
familiar with the circuit’s operation, but it does not offer
optimum performance. When using the SO version of
the MAX3266, the package capacitance adds approximately 0.3pF at the input. The PC board between the
MAX3266 input and the photodiode also adds parasitic
capacitance. Keep the input line short, and remove
power and ground planes beneath it.
PI
OPTICAL POWER
MAX3266/MAX3267
1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise
Transimpedance Preamplifiers for LANs
PAVG
PO
TIME
Figure 5. Optical Power Relations
Table 1. Optical Power Relations
PARAMETER
SYMBOL
Average Power
PAVG
RELATION
Extinction Ratio
re
re = P1/P0
Optical Power
of a 1
P1
P1 = 2PAVG (re) / (re + 1)
Optical Power
of a 0
P0
P0 = 2PAVG / (re + 1)
Signal
Amplitude
PIN
PIN = P1 - P0
= 2PAVG (re) / (re + 1)
PAVG = (P0 + P1) / 2
Photodiode Filter
Supply voltage noise at the cathode of the photodiode
produces a current I = CPD ∆V/∆t, which reduces the
receiver sensitivity (C PD is the photodiode capacitance.) The filter resistor of the MAX3266, combined
with an external capacitor, can be used to reduce this
noise (see the Typical Application Circuit). Current generated by supply noise voltage is divided between
CFILTER and CPD. The input noise current due to supply
noise is (assuming the filter capacitor is much larger
than the photodiode capacitance):
INOISE = (VNOISE)(CPD) / (RFILTER)(CFILTER)
If the amount of tolerable noise is known, the filter
capacitor can be easily selected:
CFILTER = (VNOISE)(CPD) / (RFILTER)(INOISE)
Optical Linear Range
The MAX3266 has high gain, which limits the output
when the input signal exceeds 30µAp-p (40µAp-p for
MAX3267). The MAX3266 operates in a linear range for
inputs not exceeding:
(
)
 30µA re + 1

1000 dBm
Linear Range = 10log 
 2ρ re − 1

(
)
Layout Considerations
Use good high-frequency design and layout techniques. The use of a multilayer circuit board with separate ground and power planes is recommended.
Connect the GND pins to the ground plane with the
shortest possible traces.
8
For example, with maximum noise voltage = 100mVp-p,
CPD = 0.85pF, RFILTER = 1.5kΩ, and INOISE selected to
be 100nA (1/2 of the MAX3266’s input noise):
CFILTER = (100mV)(0.85pF) / (1500Ω)(100nA) = 570pF
Wire Bonding
For high current density and reliable operation, the
MAX3266 uses gold metalization. Connections to the
die should be made with gold wire only, using ballbonding techniques. Wedge bonding is not recommended. Die thickness is typically 15mils (0.375mm).
_______________________________________________________________________________________
1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise
Transimpedance Preamplifiers for LANs
MAX3266/MAX3267
TOP VIEW OF TO-56 HEADER
VCC
CFILTER
PHOTODIODE
OUT+
OUT-
MAX3266/MAX3267
CASE IS GROUND
Figure 6. Suggested Layout for TO-56 Header
Chip Topographies
MAX3267
MAX3266
FILTER
INPUT
VCC
FILTER
GND
GND
INPUT
GND
GND
0.050"
(1.25mm)
OUT-
OUT+
VCC
0.050"
(1.25mm)
OUT-
0.030"
(0.75mm)
OUT+
0.030"
(0.75mm)
TRANSISTOR COUNT: 320
SUBSTRATE CONNECTED TO GND
_______________________________________________________________________________________
9
1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise
Transimpedance Preamplifiers for LANs
SOICN.EPS
MAX3266/MAX3267
Package Information
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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