19-1272; Rev 0a; 8/97 KIT ATION EVALU E L B AVAILA 12-Bit, 100Msps TTL DAC Features ♦ 12-Bit, 100Msps DAC The MAX5013 is a TTL-compatible device. It features a fast 13ns settling time and low 15pV-s glitch impulse energy, which results in excellent spurious-free dynamicrange characteristics. The MAX5013 is available in a 28-pin plastic DIP or PLCC package, in the -40°C to +85°C extended-industrial temperature range. ♦ 40MHz Multiplying Bandwidth ♦ TTL-Compatible Inputs ♦ Low Power: 640mW ♦ 1/2LSB DNL ♦ Extended-Industrial Temperature Range ♦ Superior Performance over AD9713: Improved Settling Time: 13ns Improved Glitch Energy: 15pV-s Master/Slave Latches Ordering Information ________________________Applications Fast-Frequency-Hopping Spread-Spectrum Radios Direct-Sequence Spread Spectrum Radios Digital RF/IF Modulation Microwave and Satellite Modems PART TEMP. RANGE PIN-PACKAGE MAX5013AEPI MAX5013BEPI MAX5013AEQI -40°C to +85°C -40°C to +85°C -40°C to +85°C 28 Plastic DIP 28 Plastic DIP 28 PLCC MAX5013BEQI -40°C to +85°C 28 PLCC Test and Measurement Instrumentation Pin Configurations appear at end of data sheet. Functional Diagram MAX5013 ________________________________________________________________ Maxim Integrated Products For the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 408-737-7600 ext. 3468. 1 MAX5013 General Description The MAX5013 is a 12-bit, 100Msps digital-to-analog converter (DAC) designed for digital modulation, direct digital synthesis, high-resolution imaging, and arbitrarywaveform-generation applications. This device is pinfor-pin compatible with the AD9713 with significantly improved settling time and glitch-energy performance. MAX5013 12-Bit, 100Msps TTL DAC ABSOLUTE MAXIMUM RATINGS Supply Voltages Positive Supply Voltage (VCC) ............................................+7V Negative Supply Voltage (VEE) ............................................-7V A/D Ground Voltage Differential.........................................0.5V Input Voltages Digital Input Voltage (D1–D12, Latch Enable) ..........0V to VCC Control Amp Input Voltage Range..............................0V to -4V Reference Input Voltage Range (VREF) .................-3.7V to VEE Output Currents Internal-Reference Output Current .................................500µA Control-Amplifier Output Current..................................±2.5mA Continuous Power Dissipation Plastic DIP (derate 14.29mW/°C above +70°C) .............1.14W PLCC (derate 10.53mW/°C above +70°C) ...................842mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Lead Temperature (soldering, 10sec) .............................+300°C Storage Temperature Range .............................-65°C to +150°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = +5.0V, VEE = -5.2V, RSET = 7.5kΩ, Control Amp In = Ref Out, VOUT = 0V, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER CONDITIONS TEST LEVEL MIN MAX5013A TYP MAX MIN MAX5013B TYP MAX UNITS DC PERFORMANCE Performance Resolution 12 I Differential Nonlinearity Max at full temperature Best fit ±0.5 VI I ±0.75 Max at full temperature VI Output Capacitance Offset-Drift Coefficient TA = +25°C TA = +25°C Full temperature Full temperature TA = +25°C Full temperature Full temperature V I VI V I VI V Output Compliance Voltage TA = +25°C IV -1.2 Equivalent Output Resistance TA = +25°C IV 0.8 Conversion Rate Settling Time (tST) (Note 2) TA = +25°C TA = +25°C IV V 100 Output Propagation Delay (tD) (Note 3) TA = +25°C Glitch Energy (Note 4) Full-Scale Output Current (Note 5) Gain-Error Tempco Zero-Scale Offset Error ±1.0 ±1.5 Integral Nonlinearity Gain Error (Note 1) 12 ±0.75 ±20 ±1.0 ±1.0 ±1.75 10 1.0 150 0.5 10 1.0 5.0 8.0 150 0.5 2.5 5.0 -1.2 1.2 0.8 1.0 LSB pF 5.0 8.0 % F.S. ppm/°C 2.5 5.0 0.01 2.0 LSB ±1.5 ±2.0 0.01 1.0 Bits ±1.25 µA µA/°C 2.0 V 1.2 kΩ DYNAMIC PERFORMANCE Dynamic Performance Spurious-Free Dynamic Range 1.23MHz; 10Msps 5.055MHz; 20Msps 10.1MHz; 50Msps 16MHz; 40Msps Rise/Fall Time 2 13 100 13 Msps ns V 2 2 ns TA = +25°C V 15 15 pV-s TA = +25°C V 20.48 20.48 mA 70 68 68 68 2 70 68 68 68 2 TA = +25°C 2MHz span 10MHz span RL = 50Ω V V _______________________________________________________________________________________ dBc ns 12-Bit, 100Msps TTL DAC (VCC = +5.0V, VEE = -5.2V, RSET = 7.5kΩ, Control Amp In = Ref Out, VOUT = 0V, TA = TMIN to TMAX, unless otherwise noted.) TEST LEVEL MIN Positive Supply Voltage IV 4.75 5.0 5.25 4.75 5.0 5.25 Negative Supply Voltage IV -5.46 -5.2 -4.94 -5.46 -5.2 -4.94 PARAMETERS CONDITIONS MAX5013A TYP MAX MIN MAX5013B TYP MAX UNITS POWER-SUPPLY REQUIREMENTS Positive Supply Current (+5.0V) Negative Supply Current (-5.2V) TA = +25°C I Full temperature TA = +25°C 115 VI ±5% of VEE and VCC, external reference, TA = +25°C 14 8 16 I Full temperature Nominal Power Dissipation Power-Supply Rejection Ratio 8 VI 140 115 148 V 640 I 30 14 16 140 148 640 100 30 V mA mA mW 100 µA/V VOLTAGE INPUT AND CONTROL Reference Input Impedance TA = +25°C V 3 3 kΩ Reference Multiplying Bandwidth TA = +25°C V 40 40 MHz Internal Reference Voltage VI -1.15 -1.20 -1.25 -1.15 -1.20 -1.25 V Internal Reference Voltage Drift Full temperature V 50 50 ppm/°C Amplifier Input Impedance TA = +25°C V 3 3 MΩ Amplifier Input Bandwidth TA = +25°C V 1 1 MHz Logic 1 Voltage Full temperature VI Logic 0 Voltage Full temperature VI Logic 1 Current Full temperature VI Logic 0 Current Full temperature VI Input Capacitance TA = +25°C V TA = +25°C IV 3 Full temperature IV 3.5 TA = +25°C IV 0.5 Full temperature IV 0.5 TA = +25°C IV 5.0 DIGITAL INPUTS Input Setup Time (tS) Input Hold Time (tH) Latch Pulse Width (tPWL, tPWH) Note 1: Note 2: Note 3: Note 4: 2.0 2.0 V 0.8 0.8 V 20 20 µA 600 600 µA 3 2 3 3 2 3.5 0 0.5 0 0.5 4.0 5.0 4.0 pF ns ns ns Gain is measured as a ratio of the full-scale current to ISET. The ratio is nominally 128. Measured as voltage at mid-scale transition to ±0.024%; RL = 50Ω. Measured from the rising edge of Latch Enable to where the output signal has left a 1LSB error band. Glitch is measured as the largest single transient. Note 5: Calculated using I FS = 128 x Control Amp In RSET _______________________________________________________________________________________ 3 MAX5013 ELECTRICAL CHARACTERISTICS (continued) MAX5013 12-Bit, 100Msps TTL DAC TEST LEVEL CODES All electrical characteristics are subject to the following conditions: TEST LEVEL I II All parameters having min/max specifications are guaranteed. The Test Level column indicates the specific device testing actually performed during production and Quality Assurance inspection. Any black section in the data column indicates that the specification is not tested at the specified condition. III IV V VI TEST PROCEDURE 100% production tested at the specified temperature. 100% production tested at TA = +25°C, and sample tested at the specified temperatures. QA sample tested only at the specified temperatures. Parameter is guaranteed (but not tested) by design and characterization data. Parameter is a typical value for information purposes only. 100% production tested at TA = +25°C. Parameter is guaranteed over specified temperature range. Pin Description PIN NAME 1–10 D2–D11 11 D12 (LSB) Digital Input Bit 12 (LSB) 12, 21 Digital VEE Digital Negative Supply (-5.2V) 13 Analog Return Analog Return Ground 14 IOUT Analog Current Output 15, 25 Analog VEE 16 I OUT Complementary Analog Current Output 17 Ref In Voltage Reference Input 18 Control Amp Out 19 Control Amp In 20 Ref Out _ 22 Ref GND 23 Digital VCC 24 RSET* 26 Latch Enable 27 DGND 28 D1 (MSB) FUNCTION Digital Input Bits 2–11 Analog Negative Supply (-5.2V) Output of Internal Control Amplifier. Control Amp Out is normally connected to Ref In. Normally connected to Ref Out if not connected to external reference. Internal Voltage Reference Output. Ref Out is normally connected to Control Amp In. Ground return for internal voltage reference and amplifier. Digital Positive Supply (+5.0V) Connection for external resistance reference when using internal amplifier (nominally 7.5kΩ). Latch-Control Line Digital Ground Return Digital Input Bit 1 (MSB) *Full-Scale Current Out = 128 (Control Amp In / RSET). 4 _______________________________________________________________________________________ 12-Bit, 100Msps TTL DAC MAX5013 Figure 1. Timing Diagram MAX5013 Figure 2. Typical Interface Circuit _______________________________________________________________________________________ 5 12-Bit, 100Msps TTL DAC 4 25 D6 5 24 RSet D7 6 23 D8 7 PDIP MAX5013 Ref GND D9 8 21 Digital VEE D10 9 20 Ref Out 13 16 IOut 14 15 IOut Analog VEE 8 9 21 D11 10 20 Ref Out (LSB) D12 11 19 Control Amp In MAX5013 Control Amp Out Analog Return Ref GND Digital VEE D9 Ref In Ref In PLCC 22 D10 18 17 Digital VCC 17 12 23 IOut Analog VEE Digital VEE 7 16 Control Amp Out D8 15 18 RSet IOut 11 6 Analog Return (LSB) D12 D7 14 Control Amp In Analog VEE 24 13 19 25 Digital VEE 10 5 D6 12 D11 DIP 6 Digital VCC 22 26 D5 27 Latch Enable Analog VEE DGND 26 Latch Enable 3 1 D4 28 DGND D2 27 (MSB) D1 2 2 D3 3 D1 (MSB) D3 28 D4 1 4 D2 D5 MAX5013 Pin Configurations PLCC _______________________________________________________________________________________ 12-Bit, 100Msps TTL DAC 28L Plastic DIP K 28 I 1 J H G A B F C D SYMBOL A B C E INCHES MIN MAX 0.120 0.200 0.135 0.020 MILLIMETERS MIN MAX 3.05 5.08 3.43 0.51 D E 0.100 0.067 2.54 1.70 F G H 0.013 0.180 0.622 0.33 4.57 15.80 I J K 0.170 0.555 1.460 0.085 4.32 14.10 37.08 2.16 _______________________________________________________________________________________ 7 MAX5013 ________________________________________________________Package Information MAX5013 12-Bit, 100Msps TTL DAC ___________________________________________Package Information (continued) 28L PLCC C Pin 1 Pin 28 H TOP TO P VIEW Pin 1 B O TTO M BOTTOM VIEW VIEW G VIEW I F E A B D INCHES SYMBOL MIN MILLIMETERS MAX MIN MAX A B 0.450 0.485 0.456 0.495 11.43 12.32 11.58 12.57 C D 45° 0.165 0.175 45° 4.19 4.45 E F G 0.022 typ 0.18 typ .56 typ 4.57 typ 0.25 0.00 0.00 H I 0.05 typ 0.039 1.27 typ 0.99 0.00 10.92 0.010 0.430 8 __________________________________________________________________________________________________