ETC 2.25506E+11

ADVANCED CERAMICS AND MODULES
DATA SHEET
Class 2, X7R 16 V, 25 V and 50 V
Low Inductance
Surface mount ceramic
multilayer capacitors
Product specification
Supersedes data of February 1999
File under Advanced Ceramics and Modules, ACM2
1999 Aug 24
Philips Components
Product specification
Surface mount ceramic
multilayer capacitors
FEATURES
Class 2, X7R 16 V, 25 V and 50 V
Low Inductance
QUICK REFERENCE DATA
• Two standard sizes
VALUE
DESCRIPTION
• For high frequency applications
• Supplied in tape on reel
• Nickel-barrier end terminations.
APPLICATIONS
Consumer electronics, for example:
• High speed IC packages
• Processor package decoupling
• AC noise reduction in multi-chip
modules.
Rated voltage UR (DC)
0508
0612
16 V; 25 V
50 V
Capacitance range (E6 series); note 1
16 V
100 to 220 nF
25 V
10 to 100 nF
50 V
10 to 100 nF
±10%; note 2
Tolerance on capacitance
after 1000 hours
2.5 × UR
Test voltage (DC) for 1 minute
Equivalent series inductance (ESL)
16 V
600 pH
DESCRIPTION
25 V
600 pH
The capacitor consists of a
rectangular block of ceramic dielectric
in which a number of interleaved
metal electrodes are contained.
This structure gives rise to a high
capacitance per unit volume.
50 V
The inner electrodes are connected to
the two terminations and finally
covered with a layer of plated tin
(Nickel-barrier). A cross section of the
structure is shown in Fig.1.
500 pH
Sectional specifications
IEC 60384-10, second edition
1989-04; also based on
CECC 32 100
Detailed specification
based on CECC 32 101-801
End terminations
NiSn
Climatic category (IEC 60068)
55/125/56
Notes
1. Other values on request.
2. Special tolerance values available on request.
terminations
,
,
,
electrodes
MLB457
ceramic material
Fig.1 Construction of a ceramic multilayer capacitor.
1999 Aug 24
2
Philips Components
Product specification
Surface mount ceramic
multilayer capacitors
Class 2, X7R 16 V, 25 V and 50 V
Low Inductance
MECHANICAL DATA
W
T
L2
L3
L4
CCB397
L1
For dimensions see Table 1.
Fig.2 Component outline.
Physical dimensions
Table 1
Capacitor dimensions in mm; see Fig.2
CASE SIZE
L2 and L3
T
L4
MIN.
L1
W
0508
1.25 ±0.20
2.00 ±0.20
0.85 ±0.10
0.13
0.46
0.38
0612
1.60 ±0.20
3.20 ±0.20
0.85 ±0.10
0.13
0.46
0.50
MIN.
Footprint
Table 2
MAX.
Footprint dimensions; see Fig.3
FOOTPRINT DIMENSIONS
(mm)
CASE SIZE
C
A
A
C
olumns
B
CCB408
For dimensions see Table 2.
Fig.3 Footprint dimensions.
1999 Aug 24
3
B
C
0508
0.50
2.00
1.0
0612
0.760
3.05
0.89
Philips Components
Product specification
Surface mount ceramic
multilayer capacitors
Class 2, X7R 16 V, 25 V and 50 V
Low Inductance
SELECTION CHART
C
(nF)
16 V
LAST TWO DIGITS
OF 12NC
10
36
12
37
15
38
18
39
22
41
27
42
33
43
39
44
47
45
56
46
68
47
82
48
100
49
120
51
150
52
180
53
220
54
25 V
50 V
0508
0612
0.85 ±0.10
0.85 ±0.10
0.85 ±0.10
Thickness classification and packaging quantities
8 mm TAPE WIDTH
AMOUNT PER REEL
THICKNESS
CLASSIFICATION
(mm)
0.85 ±0.10
1999 Aug 24
∅180 mm; 7"
∅330 mm; 13"
PAPER
BLISTER
PAPER
BLISTER
4000
4000
15000
10000
4
Philips Components
Product specification
Surface mount ceramic
multilayer capacitors
Class 2, X7R 16 V, 25 V and 50 V
Low Inductance
ORDERING INFORMATION
Components may be ordered by using either a simple 15-digit clear text code or Philips unique 12NC.
Clear text code
EXAMPLE: 06122R103K9BB0L
SIZE
CODE
0508
0612
TEMP.
CHAR.
2R = X7R
CAPACITANCE
TOL.
103 = 10000 pF;
the third digit
signifies the
multiplying factor:
3 = × 1000
4 = × 10000
K = ±10%
VOLTAGE
TERMINATION
7 = 16 V
8 = 25 V
9 = 50 V
B = Ni-barrier
PACKAGING
2 = 180 mm; 7" paper
MARKING
0 = no marking
3 = 330 mm; 13" paper
B = 180 mm; 7" blister
F = 330 mm; 13" blister
Ordering code 12NC
handbook, full pagewidth
2 2 X X
X X X
X 6 X X X
Capacitance value(1)
Carrier type
50 blister
55 paper tape
56 bulk
Tolerance
6 ±10%
Rated voltage - Termination
06 50 V; Ni-barrier
07 25 V; Ni-barrier
08 16 V; Ni-barrier
Size
0 0612 low inductance
1 0508 low inductance
CCB398
Packaging(2)
1 reel: ∅180 mm; 7"
5 reel: ∅330 mm; 13"
9 specials
(1) Refer to chapter “Selection chart”.
(2) Amount on reel depends on thickness classification, see section “Thickness classification and packaging quantities”.
1999 Aug 24
5
SERIES
L = low
inductance
Philips Components
Product specification
Surface mount ceramic
multilayer capacitors
Class 2, X7R 16 V, 25 V and 50 V
Low Inductance
ELECTRICAL CHARACTERISTICS
Class 2 capacitors; low inductance; NiSn terminations
Unless otherwise stated all electrical values apply at an ambient temperature of 23 ±3 °C, an atmospheric pressure of
86 to 105 kPa, and a relative humidity of 63 to 67%.
VALUE
DESCRIPTION
0508
0612
Capacitance range (E6 series); note 1
16 V
100 to 220 nF
25 V
10 to 100 nF
50 V
10 to 100 nF
±10%
Tolerance on capacitance after 1000 hours
Tan δ; note 1:
16 V
≤3.5%
25 V and 50 V
≤2.5%
Rins × C ≥ 1000 seconds
Insulation resistance after 1 minute at UR (DC)
±15%
Typical capacitance change as a function of temperature
Ageing
typical 1% per time decade
260 °C; 10 seconds
Resistance to soldering heat
Note
1. Measured at 20 °C, 1 V and 1 kHz, using a four-gauge method.
MGA488 - 1
handboo, halfpage
∆C
C
(%)
15
10
5
0
−5
−10
−15
−40
Fig.4
1999 Aug 24
0
40
80
120
T (oC)
Typical capacitance change as
a function of temperature.
6
Philips Components
Product specification
Surface mount ceramic
multilayer capacitors
Class 2, X7R 16 V, 25 V and 50 V
Low Inductance
TESTS AND REQUIREMENTS
Table 3
Test procedures and requirements
IEC
IEC
60384-10/
60068-2
CECC 32 100
TEST
CLAUSE
METHOD
TEST
PROCEDURE
REQUIREMENTS
4.4
mounting
the capacitors may be mounted
no visible damage
on printed-circuit boards or
ceramic substrates by applying
wave soldering, reflow soldering
(including vapour phase
soldering) or conductive adhesive
4.5
visual inspection and any applicable method using
dimension check
×10 magnification
in accordance with specification
4.6.1
capacitance
f = 1 kHz; measuring voltage
1 Vrms at 20 °C
measured 1000 hours after
date of manufacture
4.6.2
tan δ
f = 1 kHz; measuring voltage
1 Vrms at 20 °C
in accordance with specification
4.6.3
insulation resistance at UR (DC) for 1 minute
in accordance with specification
4.6.4
voltage proof
2.5 × UR for 1 minute
no breakdown or flashover
4.7.1
temperature
characteristic
between minimum and
maximum temperature
in accordance with specification
4.8
adhesion
a force of 5 N applied for 10 s to
the line joining the terminations
and in a plane parallel to the
substrate
no visible damage
4.9
bond strength of
plating on end face
mounted in accordance with
CECC 32 100, paragraph 4.4
no visible damage
conditions: bending
1 mm at a rate of 1 mm/s,
radius jig 340 mm
∆C/C: ±10%
resistance to
soldering heat
precondition:
120 to 150 °C for 1 minute;
260 ±5 °C for 10 ±0.5 s
in a static solder bath
the terminations shall be well
tinned after recovery
resistance to
leaching
260 ±5 °C for 30 ±1 s
in a static solder bath
using visual enlargement of
×10, dissolution of the
terminations shall not
exceed 10%
solderability
zero hour test, and test after
storage (20 to 24 months) in
original packing in normal
atmosphere;
unmounted chips completely
immersed for 2 ±0.5 s in a solder
bath at 235 ±5 °C
the terminations shall be well
tinned
4.10
4.11
1999 Aug 24
Tb
Ta
7
Philips Components
Product specification
Surface mount ceramic
multilayer capacitors
IEC
IEC
60384-10/
60068-2
CECC 32 100
TEST
CLAUSE
METHOD
4.12
4.14
Na
Ca
Class 2, X7R 16 V, 25 V and 50 V
Low Inductance
TEST
rapid change of
temperature
damp heat,
PROCEDURE
REQUIREMENTS
preconditioning; 5 cycles in the
following sequence:
30 minutes at −55 °C, change
within 30 minutes to +125 °C
no visible damage after
24 hours recovery:
preconditioning
(thermal treatment):
56 days at 40 °C;
90 to 95% RH; UR applied
no visual damage
∆C/C: ±15%
after 24 hours recovery:
∆C/C: ±15%
tan δ: ≤7%
Rins: 1000 MΩ or RiCR ≥ 25 s,
whichever is less
4.15
1999 Aug 24
endurance
preconditioning
(thermal treatment):
1000 hours at 125 °C and
2 × UR applied
8
after 24 hours recovery:
∆C/C: ±20%
tan δ: ≤7%
Rins: 2000 MΩ or RiCR ≥ 50 s,
whichever is less