PI90LVB010 Single Bus LVDS Transceiver Features Description • • • • • • • • The PI90LVB010 is a differential line driver and receiver (transceiver) that is similar to the IEEE1596.3 SCI and ANSI/TIA/EIA644LVDS standards, the difference is that the driver output current is higher. This modification enables true half-duplex operation with more than one LVDS driver or with two line transmission resistors over a 50Ω differential transmission line. To minimize bus loading, the driver outputs and receiver inputs are internally connected. The logic interface provides maximum flexibility resulting from four separate lines that are provided: DIN, DE, RE, and ROUT. • • • • Bus LVDS Signaling (BLVDS) Designed for Double Termination Applications Balanced Output Impedance Light Bus Loading: 5pF typical Glitch-free power up/down (Driver Disabled) Operates from a 3.3V supply High Signaling Rate Capability: >100Mbps Driver: – ±250mV Differential Swing into a 27Ω load – Propagation Delay of 1.5ns typ. – Low Voltage TTL (LVTTL) Inputs are 5V Tolerant – Driver is High Impedance when disabled or VCC <1.5V Receiver: – Accepts ±50mV (min.) Differential Swing with up to 2.0V ground potential difference – Propagation Delay of 3.3ns typical – Low Voltage TTL (LVTTL) Outputs – Open, Short, and Terminated Fail Safe Bus terminal ESD exceeds 10kV Industrial Temperature Operation (–40°C to +85°C) Packaging (Pb-free & Green available): – 8-lead SOIC (W) – 8-lead MSOP (U) This device also feature flow-through which allows easy PCB routing for short stubs between the bus pins and the connector. The driver has 10mA drive capability, allowing it to drive heavily loaded backplanes, with impedance as low as 27Ω. The driver translates between TTL levels (single-ended) to Low Voltage Differential Signaling levels. This allows for high-speed operation, while consuming minimal power with reduced EMI. In addition the differential signaling provides common mode noise rejection of ±1V. Pin Configuration Block Diagram D0+/RI+ DIN D0–/RI– DE RE DE 1 8 VCC DIN 2 7 DO+/RI+ ROUT 3 6 DO–/RI– GND 4 5 RE ROUT 1 PS8662A 09/03/04 PI90LVB010 Single Bus LVDS Transceiver Absolute Maximum Ratings(1,2) Supply Voltage (VCC) ...........................................................6.0V Enable Input Voltage (DE, RE)..................–0.3V to (VCC +0.3V) Driver Input Voltage (DIN)........................–0.3V to (VCC +0.3V) Receiver Output Voltage (ROUT) ...............–0.3V to (VCC +0.3V) Bus Pin Voltage (DO/RI±) ................................... –0.3V to +3.9V Driver Short Circuit .................................................... Continuous ESD (HBM 1.5kΩ, 100pF)................................................ >10kV Maximum Package Power Dissipation at 20°C SOIC ............................................................................1025mW Derate SOIC Package ............................................... 8.2mW/°C Storage Temperature Range ...............................–65°C to +150°C Lead Temperature Range (Soldering, 4s) ......................... +260°C Recommended Operating Conditions Supply Voltage (VCC) Receiver Input Voltage Operating Free-Air Temperature Min. 3.0 0.0 –40 Max. 3.6 2.9 +85 Units V V °C Note: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Functional Mode Transmitter Mode Mode Select DE RE Inputs Driver Mode H H DE DI DO+ DO- Receiver Mode L L H L L H 3-State Mode L H H H H L Loop Back Mode H L H 2 > & > 0.8 X X L X Z Z H Open L H Receiver Mode RE L L L H Inputs (RE+) - (RI-) L (< -100mV) H (> + 100mV) 100mV > & >-100mV X Outputs Pin Description Outputs ROUT L H ? Z Notes: 1. H = High, L = Low, Z = High Impedance, X = High or Low 2 Pin Name DIN DO± RI± ROUT Pin# RE 5 DE 1 GND VCC 4 8 2 6, 7 3 Inputs/ Description Outputs I TTL Driver Input LVDS Driver Outputs/ I/O LVDS Receiver Inputs O TTL Receiver Outputs Receiver Enable TTL Input I (Active Low) Driver Enable TTL Input I (Active High) NA Ground NA Power Supply PS8662A 09/03/04 PI90LVB010 Single Bus LVDS Transceiver DC Electrical Characteristics(2,3) (TA = –40°C to +85°C, unless otherwise noted. VCC = 3.3V ±0.3V) Symbol Parameter VOD Output Differential Voltage ∆VOD VOD Magnitude Change VOS Offset Voltage ∆VOS Offset Magnitude Change IOSD Output Short Circuit Current VOH Voltage Output High Test Condition RL = 27Ω, See figure 1 Pin DO+/RI+ DO-/RI- Min. Typ. Max. 140 250 360 3 30 1.25 1.65 V 5 50 mV -12 -20 mA 1 VO = 0V, DE = VCC VID = +100mV 2.8 3 Inputs Open 2.8 3 2.8 3 2.8 3 IOH = -400 Inputs Shorted ROUT Inputs Terminated, RL = 27Ω Voltage Output Low IOL = 2.0mA, VID = -100mV IOS Output Short Circuit Curretn VOUT = 0V, VID = 100V VTH Input Threshold High DE = 0V VTL Input Threshold Low IIN Input Current VIH Minimum Input High Voltage VIL Minimum Input Low Voltage IIH Input High Current VIN = VCC or 2.4V ±1 10 IIL Input Low Current VIN = GND or 0.4V ±1 10 VCL Input Diode Clamp Voltage ICLAMP = -18mA ICCD ICCR ICCZ ICC COUTPUT DE = 0V, VIN = 2.4V or 0V VCC = 0V, VIN = 2.4V or 0V IN, DE, RE 0.4 -35 -85 -100 -20 ±1 20 -20 ±1 20 2.0 VCC GND 0.8 -1.5 DE = RE = VCC, RL = 27Ω Power Supply Current 0.1 100 DO+/RI+ DO-/RI- VCC -0.8 20 DE = RE = 0V 5 8 DE = 0V, RE = VCC 3 7.5 DE = VCC, RE - 0V, RL = 27Ω 16 22 DO+/RI+ DO-/RI- mA mV µA V µA V 13 Bus Pin Capacitance mV V VOL -5 Units 5 mA pF Notes: 1. “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation. 2. All currents into device pins are positive, all currents out of device pins are negative. All voltages are referenced to ground except: VOD, VID, VTH, and VTL, unless otherwise specified. 3. All typicals are given for VCC = +3.3V or 5.0V and TA = +25°C unless otherwise stated. 4. ESD Rating: HBM (15kΩ, 100pF) > 2.0kV EAT (0Ω, 200pF) >300V. 5. CL includes probe and jig capacitance. 6. Generator waveforms for all tests unless otherwise specified: f = 1MHz, ZO = 50Ω, tr, tf ≤ 6.0ns (0% - 100%) on control pins and ≤ 1.0ns for RI inputs. 7. The PI90LVB010 is a current mode device and only functions with datasheet specification when a resistive load is appplied between the driver outputs. 8. For receiver disable delays, the switch is set to VCC for tPZL, and tPLZ and to GND for tPZH and tPHZ. 3 PS8662A 09/03/04 PI90LVB010 Single Bus LVDS Transceiver AC Electrical Characteristics (TA = –40°C to +85°C, VCC = 3.3V ±0.3V) Symbol Paramter Test Conditions Min. Typ. Max. 0.7 1.5 2.7 0.7 1.5 2.7 0.2 1.0 0.3 0.9 0.3 0.9 0.5 2.6 3.3 0.5 2.6 3.3 0.5 2.6 3.3 0.5 2.6 3.3 1.3 2.1 3.2 1.3 2.1 3.2 0.5 2.0 0.8 1.4 1.8 1.4 1.5 4.0 6.0 5.0 4.0 7.0 0.5 2.5 7.0 0.5 2.5 6.0 Units Differential Driver Timing Requirement tPHLD Differenital Propagation Delay High to Low tPLHD Differential Propagation Delay Low to High tSKD Differential Skew | tPHLD - tPLHD | tTLH Transition Time Low to High tTHL Transition Time High to Low tPHZ Disable Time High to Z tPLZ Disable Time Low to Z tPZH Enable Time Z to High tPZL Enable Time Z to Low RL = 27Ω Figures 2 & 3 CL = 10pF RL = 27Ω Figures 4 & 5 CL = 10pF ns Differential Receicer Timing Requirements tPHLD Differential Propagation Delay High to Low tPLHD Differenital Propagation Delay Low to High tSKD Differential Skew | tPHLD - tPLHD | tR Rise Time tF Fall Time tPHZ Disable Time High to Z tPLZ Disable Time Low to Z tPZH Enable Time Z to High tPZL Enable Time Z to Low Figures 6 & 7 CL = 10pF RL = 500Ω Figures 8 & 9 CL = 10pF(8) 4 PS8662A ns 09/03/04 PI90LVB010 Single Bus LVDS Transceiver Test Circuits and Timing Waveforms DO+ 2V 0.8V RL/2 = 13.5Ω or 50Ω DIN VOS S1 VOD RL/2 = 13.5Ω or 50Ω Driver Enabled DO– Figure 1. Differential Driver DC Test Circuit CL DO+ DIN Pulse Generator RL DO– CL 50Ω Driver Enabled Figure 2. Differential Driver Propagation Delay and Transition Time Test Circuit 3V DIN 1.5V 0V 1.5V tPHLD DOUT+,DOUT- tPLHD 0V 0V (Differential) DO+ 0V DO– 80% (DO+) - (DO–) 80% 0V 0V 20% 20% tTLH tTHL tDIFF = (DO+) - (DO–) Figure 3. Driver Propagation Delay and Transition Time Waveforms 5 PS8662A 09/03/04 PI90LVB010 Single Bus LVDS Transceiver Test Circuits and Timing Waveforms (continued) DO+ RL/2 CL 2.0 DIN 0.8 +1.2V RL/2 DE Pulse Generator DO– 50Ω CL Figure 4. Driver Three-State Delay Test Circuit 3V 1.5V DE 1.5V 0V tPHZ DO – (DI=L) VOH DO + (DI=H) tPZH 50% 50% 1.2V tPLZ DO – (DI=H) DO + (DI=L) 1.2V VOH 50% 50% VOL tPZL Figure 5. Driver Three-State Delay Waveforms RI+ Pulse Generator RI– 50Ω + – RO CL 50Ω Figure 6. Receiver Propagation Delay and Transistion Time Test Circuit RI+ +1.3V 0V (Differential) RI– tPLH 1.5V VO (1.2V CM) VID = 200mV +1.1V tPHL 80% 80% 1.5V 20% 20% tTLH tTHL Figure 7. Receiver Propagation Delay and Transistion Time Waveforms 6 PS8662A 09/03/04 PI90LVB010 Single Bus LVDS Transceiver Test Circuits and Timing Waveforms (continued) RI+ + R RI– – RL CL RE Pulse Generator VCC 50Ω Figure 8. Receiver Three-State Delay Test Circuit RE 3V 1.5V 0V 1.5V tPHZ VOH tPZH 50% VOH –0.5 VOH GND ROUT tPZL tPLZ VOH 50% VOL +0.5 VOL VCC VOL Figure 9. Receiver Three-State Delay Waveforms Typical Bus Application Configurations DO+ DO+ 54Ω DIN DIN 54Ω DO– DO– DE DE RE RE ROUT + – RI+ RI+ RI– RI– + ROUT – Figure 10. Bidirectional Half-Duplex Point-to-Point Applications DIN /ROUT DIN /ROUT DIN /ROUT DIN /ROUT 54Ω 54Ω DIN /ROUT DIN /ROUT DIN /ROUT Figure 11. Multipoint Bus Applications 7 PS8662A 09/03/04 PI90LVB010 Single Bus LVDS Transceiver Packaging Mechanical: 8-Pin SOIC (W) 8 .149 .157 3.78 3.99 1 .189 .196 .016 .026 0.406 0.660 .0099 .0196 0.25 x 45˚ 0.50 .0075 .0098 0-8˚ 4.80 5.00 0.19 0.25 0.40 .016 1.27 .050 .053 .068 .2284 .2440 5.80 6.20 1.35 1.75 SEATING PLANE REF .050 BSC 1.27 .0040 0.10 .0098 0.25 .013 0.330 .020 0.508 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS Packaging Mechanical: 8-Pin MSOP (U) .003 .012 0.07 0.30 15˚ Max. .003 .012 0.07 0.30 Gauge Plane .010 0.25 .016 .028 0.40 0.70 15˚ Max. .037 0.95 REF 0˚- 6˚ Detail A .112 2.85 .120 3.05 Detail A 15˚ MAX .114 2.90 .122 3.10 15˚ MAX .114 2.90 .122 3.10 8 PS8662A 09/03/04 PI90LVB010 Single Bus LVDS Transceiver Ordering Information Ordering Code Package Code Package Description PI90LVB010W W 8-pin, SOIC PI90LVB010WE W Pb-free & Green, 8-pin, SOIC PI90LVB010U U 8-pin MSOP PI90LVB010UE U Pb-free & Green, 8-pin MSOP Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com 9 PS8662A 09/03/04