19-1140; Rev 0; 9/96 Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in µMAX The MAX550B serial, 8-bit, voltage-output, digital-toanalog converter (DAC) operates on a single +2.5V to +5.5V supply. Its ±1LSB TUE specification is guaranteed over temperature. Operating current (supply current plus reference current) is typically 75µA with VDD = 2.5V and less than 1µA in shutdown mode. The reference input is disconnected from the REF pin during shutdown. The serial interface operates at clock rates up to 10MHz and is compatible with 3-wire SPI™, QSPI™, and Microwire™ interface standards. The MAX550B’s ultra-low power consumption and small µMAX package make it ideal for portable and batterypowered applications. ____________________________Features ♦ +2.5V to +5.5V Single-Supply Operation ♦ ±1LSB (max) TUE ♦ Low 75µA Operating Current (VDD = +2.5V) ♦ 1µA Shutdown Mode ♦ µMAX Package—50% Smaller than 8-Pin SO ♦ 10MHz, 3-Wire Serial Interface ♦ Internal Power-On Reset Clears All Registers to Zero _______________Ordering Information ________________________Applications PART MAX550BCPA MAX550BCUA MAX550BC/D MAX550BEPA MAX550BEUA VCXO Control Comparator Level Settings GaAs Amp Bias Control Digital Gain and Offset Control TEMP. RANGE PIN-PACKAGE 0°C to +70°C 0°C to +70°C 0°C to +70°C -40°C to +85°C -40°C to +85°C 8 Plastic DIP 8 µMAX Dice* 8 Plastic DIP 8 µMAX *Dice are specified at TA = +25°C, DC parameters only. ________________Functional Diagram VDD1 __________________Pin Configuration VDD2 REF TOP VIEW DIN SCLK INPUT SHIFT REGISTER 8 DAC REGISTER DAC R-2R LADDER OUT GND 1 8 VDD1 7 REF CS 3 6 VDD2 DIN 4 5 SCLK CS OUT 2 MAX550B MAX550B GND DIP/µMAX SPI and QSPI are registered trademarks of Motorola, Inc. Microwire is a registered trademark of National Semiconductor Corp. ________________________________________________________________ Maxim Integrated Products 1 For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800 MAX550B _______________General Description MAX550B Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in µMAX ABSOLUTE MAXIMUM RATINGS VDD1, VDD2, SCLK, DIN, CS, OUT to GND ...............-0.3V to +6V REF ...........................................................-0.3V to (VDD_ + 0.3V) Maximum Current (any pin) ...............................................50mA Continuous Power Dissipation (TA = +70°C) Plastic DIP (derate 9.1mW/°C above +70°C) ..............727mW µMAX (derate 4.1mW/°C above +70°C) ......................330mW Operating Temperature Ranges MAX550BBC_A ...................................................0°C to +70°C MAX550BBE_A ................................................-40°C to +85°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10sec) .............................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD1 = VDD2 = +2.5V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC PERFORMANCE Resolution N Differential Nonlinearity DNL Total Unadjusted Error TUE Zero-Code Error ZCE Full-Scale Error FSE 8 Guaranteed monotonic Bits MAX550BBC_A/MAX550BBE ±0.9 MAX550BBEUA (Note 1) ±0.9 MAX550BBC_A/MAX550BBE ±1 MAX550BBEUA (Note 1) ±1 TA = +25°C LSB LSB ±1 LSB ±1 LSB VDD V REFERENCE INPUT Reference Input Voltage VREF For specified performance Reference Input Resistance (Note 2) RREF DAC code = 55 hex Reference Input Current (Note 3) IREF DAC code = 55 hex 2.5 32 kΩ VDD_ = VREF = 5.5V 160 275 VDD_ = VREF = 2.5V 75 125 µA DAC OUTPUT (OUT) DAC Output Voltage Swing DAC Output Resistance DIGITAL INPUTS (CS, SCLK, DIN) 0 ROUT Input High Voltage VIH Input Low Voltage VIL Input Current IIN Input Capacitance (Note 4) CIN 2 VREF 32 0.7VDD_ VIN = 0V or VDD_ _______________________________________________________________________________________ V kΩ V 0.3VDD_ V ±1 µA 10 pF Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in µMAX (VDD1 = VDD2 = +2.5V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DYNAMIC PERFORMANCE Digital Feedthrough and Crosstalk CS = high, all digital inputs from 0V to VDD_ 50 nV-sec Voltage-Output Settling Time To ±1/2LSB, CL = 20pF 4 µs Voltage-Output Slew Rate SR Wake-Up Time CL = 20pF VDD_ = 2.5V 1.4 VDD_ = 5.5V 3.1 CLOAD = 20pF V/µs 4 µs POWER SUPPLIES Supply Voltage Range VDD_ Output unloaded, all inputs = GND or VDD Supply Current IDD1 + IDD2 VDD_ = 5.5V, output unloaded, all inputs = GND or VDD_ 0.3 Shutdown mode 0.3 Shutdown Current Note 1: Note 2: Note 3: Note 4: 2.5 5.5 V 10 µA µA 0°C to -40°C testing guaranteed by design using six sigma design limits. Worst-case input resistance at REF occurs at DAC code 55 hex. Worst-case reference input current occurs at DAC code 55 hex. Guaranteed by design. Not production tested. TIMING CHARACTERISTICS (Note 5) (VDD1 = VDD2 = +2.5V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Digital inputs switching from 0V to VDD_.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SCLK Pulse Width High tCH 40 ns SCLK Pulse Width Low tCL 40 ns DIN to SCLK High Setup tDS 30 ns DIN to SCLK High Hold tDH VDD_ = 2.5V 0 VDD_ = 5.5V 10 ns CS Low to SCLK High Setup tCSS0 30 ns CS High to SCLK High Setup tCSS1 30 ns SCLK High to CS Low Hold tCSH0 20 ns VDD_ = 2.5V 10 VDD_ = 5.5V 20 Delay, SCLK High to CS High tCSH1 CS Pulse Width High tCSW 40 tCP 80 SCLK Period VDD_ High to CS Low Power-on reset delay ns ns ns 5 µs Note 5: Guaranteed by design. Not production tested. _______________________________________________________________________________________ 3 MAX550B ELECTRICAL CHARACTERISTICS (continued) __________________________________________Typical Operating Characteristics (VDD1 = VDD2 = 2.5V, VREF = VDD_, RL = 1MΩ, CL = 15pF, TA = +25°C, unless otherwise noted.) OPERATING CURRENT vs. TEMPERATURE RELATIVE OUTPUT (dB) -10 VDD_ = 5V VREF = 2Vp-p SINE WAVE -20 150.2 OPERATING CURRENT (µA) VDD_ = 2.5V VREF = 100mVp-p SINE WAVE 0 -30 MAX550 TOC-02 10 MAX550B-01 REFERENCE FREQUENCY RESPONSE VDD_ = VREF = 5.0V 149.8 149.4 75.4 75.0 -40 VDD_ = VREF = 2.5V 74.6 DAC CODE = FF hex -50 1k 10k 100k 1M -60 10M -20 SHUTDOWN CURRENT vs. TEMPERATURE 60 100 REFERENCE AC FEEDTHROUGH vs. FREQUENCY RELATIVE OUTPUT (dB) 200 VDD_ = VREF = 5.0V 120 40 36 MAX550 TOC-04 0 MAX550 TOC-03 240 160 20 TEMPERATURE (°C) FREQUENCY (Hz) OPERATING CURRENT (nA) MAX550B Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in µMAX -20 -40 -60 -80 32 VREF = 1Vp-p SINE WAVE DAC CODE = 00 hex VDD_ = VREF = 2.5V 28 -100 -60 -20 20 60 TEMPERATURE (°C) 4 100 10 100 1k 10k 100k 1M FREQUENCY (Hz) _______________________________________________________________________________________ Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in µMAX (VDD1 = VDD2 = 2.5V, VREF = VDD_, RL = 1MΩ, CL = 15pF, TA = +25°C, unless otherwise noted.) DIGITAL FEEDTHROUGH VREF = 2.5V DAC CODE FF hex to 00 hex VREF = 2.5V MAX550 TOC-08 MAX550 TOC-07 NEGATIVE SETTLING TIME SCLK, 5V/div OUT, 1V/div OUT, 50mV/div 2µs/div OUTPUT GLITCH FILTERING POSITIVE SETTLING TIME MAX550 TOC-05 200ns/div CODE = 00 hex VDD_ = VREF = 2.5V DAC CODE 00 hex to FF hex VREF = 2.5V MAX550 TOC-06 CS, 5V/div OUT, 1V/div OUT, 50mV/div, CL = 0pF OUT, 50mV/div, CL = 100pF OUT, 50mV/div, CL = 220pF OUT, 50mV/div, CL = 1000pF CS, 5V/div CS, 5V/div 5µs/div 2µs/div _______________________________________________________________________________________ 5 MAX550B _____________________________Typical Operating Characteristics (continued) MAX550B Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in µMAX ______________________________________________________________Pin Description PIN NAME FUNCTION 1 GND Ground 2 OUT DAC Output Voltage 3 CS Chip-Select Input. A logic low on CS enables serial data to be clocked into the input shift register. Programming commands are executed at CS’s rising edge. 4 DIN Serial Data Input. Data is clocked into the 16-bit input shift register on SCLK’s rising edge. 5 SCLK Serial Clock Input. Data is clocked in on SCLK’s rising edge. 6 VDD2 Connect to VDD1 7 REF External Reference Voltage Input for DAC (2.5V to VDD_) 8 VDD1 Positive Power Supply (+2.5V to +5.5V) R 2R 2R 2R 2R R R R R 2R 2R R R 2R 2R 2R REF OUT GND GND LSB MSB DAC REGISTER NOTE: SWITCH POSITIONS SHOWN FOR DAC CODE FF HEX. Figure 1. DAC Simplified Circuit Diagram _______________Detailed Description Analog Section The MAX550B is an 8-bit, voltage-output digital-to-analog converter (DAC). The DAC consists of an R-2R ladder network that converts 8-bit digital inputs into equivalent analog output voltages in proportion to the applied reference voltage (Figure 1). The MAX550B’s output is unbuffered and has a typical output resistance of 32kΩ. The power-supply range is from +2.5V to +5.5V. 6 Reference Input The voltage applied at REF sets the full-scale output for the DAC and may range from 2.5V to VDD_. The REF input resistance is code-dependent, with the lowest value (typically 32kΩ) occurring when the DAC register is loaded with a code of 01010101 (55 hex). To minimize INL errors, the reference voltage source should have less than 6Ω output impedance. _______________________________________________________________________________________ Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in µMAX MAX550B INSTRUCTION EXECUTED CS OPTIONAL PAUSE SCLK DIN UB1 UB2 UB3 C2 C1 C0 AB1 AB2 D7 D6 D5 D4 D3 D2 D1 D0 Figure 2. Serial-Interface Timing Diagram DAC Output The MAX550B’s output is unbuffered; it connects directly to the R-2R ladder. This configuration minimizes power consumption and reduces offset errors. For highest accuracy, apply high resistive loads (1MΩ and up). Lower resistive loads can be driven, but output loading increases full-scale error. The magnitude of the expected error is the ratio of the DAC output resistance to the DC load resistance at the output. Typically, an energy pulse is coupled into the DAC output on the rising edge of CS. Since the MAX550B’s output is unbuffered (connected directly to the R-2R ladder), connecting a small capacitor (200pF to 1000pF) from the output to ground creates a lowpass filter that effectively suppresses the pulse for sensitive applications (see Output Glitch Filtering graph in the Typical Operating Characteristics). Shutdown Mode When the MAX550B is in shutdown mode, REF becomes high impedance. The supply current is unchanged, but the REF input current decreases to less than 1µA. This allows the system reference to remain active with minimal power consumption. When exiting shutdown mode, the output recovery time is equivalent to the DAC settling time. on rising edges of the serial clock signal (SCLK). The clock frequency can be as high as 10MHz. When writing to the DAC, transmit data MSB first in one 16-bit word or two 8-bit bytes. The write cycle can be segmented when CS is kept active (low) to allow two 8-bit-wide transfers. After clocking all 16 bits into the input shift register, a rising edge on CS programs the DAC. The DAC output reflects the data stored in the DAC register. Figure 3 gives detailed timing information. Initialization The MAX550B has an internal power-on reset. At power-up, all internal registers are reset to zero; therefore, an initialization write is not necessary. Serial Input Data Format and Control Codes The control byte programs the DAC (Table 1). Table 2 lists the MAX550B’s serial-input command format. The 16-bit input word consists of an 8-bit control byte and an 8-bit data byte. The 8-bit control byte is not decoded internally; every control bit performs one function. Data is clocked in starting with unassigned bit 1 (UB1), followed by the remaining control bits and the DAC data byte. The LSB (D0) of the data byte is the last bit clocked into the input shift register (Figure 2). Serial Interface Table 3 is an example of a 16-bit word. It performs the following functions: The MAX550B interface is compatible with 3-wire SPI™, QSPI™, and Microwire™ microprocessor (µP) interface standards. An active-low chip select (CS) enables the input shift register to receive data from the serial input, DIN (Figure 2). Data is clocked into the input shift register 1) Load 80 hex (128 decimal) into the DAC register. 2) Update the DAC output on CS’s rising edge. Table 4 shows how to calculate the output voltage based on the input code. _______________________________________________________________________________________ 7 MAX550B Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in µMAX CS tCSH0 tCSW tCSS0 tCSH1 tCH SCLK tCL tDS tCSS1 tDH DIN Figure 3. Detailed Serial-Interface Timing Diagram Table 1. Control-Byte/Input-Word Bit Definitions UB1* X Unassigned Bit 1 UB2 X Unassigned Bit 2 UB3 X Unassigned Bit 3 C2 0 Power-Up Mode C2 1 Power-Down Mode C1 0 DAC Register Load Operation Disabled C1 1 DAC Register Load Operation Enabled C0 0 DAC Output Updated on Rising Edge of CS C0 1 Unassigned Operation AB1 0 Assigned Bit 1 AB2 1 Assigned Bit 2 D7 X DAC Data Bit 7 (MSB) D6 X DAC Data Bit 6 D5 X DAC Data Bit 5 D4 X DAC Data Bit 4 D3 X DAC Data Bit 3 D2 X DAC Data Bit 2 D1 X DAC Data Bit 1 D0** X DAC Data Bit 0 (LSB) Control Byte Data Byte Microprocessor Interfacing The MAX550B serial interface is compatible with Microwire, SPI, and QSPI interface standards. For SPI, clear the CPOL and CPHA bits (CPOL = 0 and CPHA = 0). CPOL = 0 sets the idle clock state to zero and CPHA = 0 changes data at SCLK’s falling edge. This setting allows SPI to run at full clock speeds (1.5MHz). If a serial port is not available on your µP, three bits of a parallel port can be used to emulate a serial port by bit manipulation. Minimize digital feedthrough at the DAC output by operating the serial clock only when necessary. ––––––––––––––Applications Information Power-Supply and Ground Considerations Connect GND to the highest-quality ground available. Bypass VDD with a 0.1µF to 0.22µF capacitor to GND. The reference input can be used without bypassing. However, for optimum line/load-transient response and noise performance, bypass the reference input with a 0.1µF to 4.7µF capacitor to GND. Careful PC board layout minimizes crosstalk between the DAC output, the reference, and the digital inputs. Separate analog traces by running ground traces between them. Make sure high-frequency digital lines are not routed parallel to analog lines. X = Don’t care *Clocked in first **Clocked in last 8 _______________________________________________________________________________________ Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in µMAX MAX550B Table 2. Serial-Interface Programming Commands CONTROL BYTE DATA BYTE Loaded First COMMAND Loaded Last UB1 UB2 UB3 C2 C1 C0 AB1 AB2 D7 D6 D5 D4 D3 D2 D1 D0 X X X 0 0 0 0 1 X X X X X X X X On CS’s rising edge, wake up DAC. DAC register unchanged. X X X X X 1 X X X X X X X X X X Unassigned command X X X 0 1 0 0 1 X X X 1 0 0 0 1 X X X 1 1 0 0 1 On CS’s rising edge, load DAC register. Wake up DAC (if previously powered down). 8-bit DAC data X X X X X X X X On CS’s rising edge, power down DAC. DAC output goes to zero. DAC register unchanged. On CS’s rising edge, power down DAC and update DAC register. DAC output goes to zero. 8-bit DAC data X = Don’t Care Table 3. Example Input Word Loaded First Loaded Last UB1 UB2 UB3 C2 C1 C0 AB1 AB2 D7 D6 D5 D4 D3 D2 D1 D0 X X X 0 1 0 0 1 1 0 0 0 0 0 0 0 X = Don’t Care Table 4. Analog Output vs. Code DAC REGISTER CONTENTS ANALOG OUTPUT (V) D7 D6 D5 D4 D3 D2 D1 D0 1 1 1 1 1 1 1 1 +VREF x (255/256) 1 0 0 0 0 0 0 1 +VREF x (129/256) 1 0 0 0 0 0 0 0 +VREF x (128/256) = +VREF/2 0 1 1 1 1 1 1 1 +VREF x (127/256) 0 0 0 0 0 0 0 1 +VREF x (1/256) 0 0 0 0 0 0 0 0 0 Note: 1LSB = VREF x 2-8 = VREF(1/256) ANALOG OUTPUT = +VREF(I/256), where I = Integer Value of Digital Input and wake up DAC (if previously powered down) _______________________________________________________________________________________ 9 MAX550B Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in µMAX AC Considerations Digital Feedthrough High-speed data at any of the digital input pins may couple through the DAC’s internal stray capacitance and cause noise (digital feedthrough) at the DAC output, even though CS is held high. This digital feedthrough is tested by holding CS high and toggling the digital inputs from all 1s to all 0s. ___________________Chip Information TRANSISTOR COUNT: 1562 Analog Feedthrough Due to internal stray capacitance, higher-frequency analog input signals at REF may couple to the output, even when the input digital code is all 0s. Test analog feedthrough by setting the DAC output to 0V and sweeping REF. ________________________________________________________Package Information D E DIM E1 A A1 A2 A3 B B1 C D1 E E1 e eA eB L A3 A A2 L A1 0° - 15° C e B1 B eA eB D1 Plastic DIP PLASTIC DUAL-IN-LINE PACKAGE (0.300 in.) INCHES MAX MIN 0.200 – – 0.015 0.175 0.125 0.080 0.055 0.022 0.016 0.065 0.045 0.012 0.008 0.080 0.005 0.325 0.300 0.310 0.240 – 0.100 – 0.300 0.400 – 0.150 0.115 PKG. DIM PINS P P P P P N D D D D D D 8 14 16 18 20 24 INCHES MIN MAX 0.348 0.390 0.735 0.765 0.745 0.765 0.885 0.915 1.015 1.045 1.14 1.265 MILLIMETERS MIN MAX – 5.08 0.38 – 3.18 4.45 1.40 2.03 0.41 0.56 1.14 1.65 0.20 0.30 0.13 2.03 7.62 8.26 6.10 7.87 2.54 – 7.62 – – 10.16 2.92 3.81 MILLIMETERS MIN MAX 8.84 9.91 18.67 19.43 18.92 19.43 22.48 23.24 25.78 26.54 28.96 32.13 21-0043A 10 ______________________________________________________________________________________ Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in µMAX DIM C α A 0.101mm 0.004 in e B A1 L A A1 B C D E e H L α INCHES MAX MIN 0.044 0.036 0.008 0.004 0.014 0.010 0.007 0.005 0.120 0.116 0.120 0.116 0.0256 0.198 0.188 0.026 0.016 6° 0° MILLIMETERS MIN MAX 0.91 1.11 0.10 0.20 0.25 0.36 0.13 0.18 2.95 3.05 2.95 3.05 0.65 4.78 5.03 0.41 0.66 0° 6° 21-0036D E H 8-PIN µMAX MICROMAX SMALL-OUTLINE PACKAGE D ______________________________________________________________________________________ 11 MAX550B ___________________________________________Package Information (continued) MAX550B Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in µMAX NOTES Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 © 1996 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.