Features • High Sensitivity and High SNR Performance Linear CCD • Resolution: • • • • • • • • • – 2048 Pixels with 14 µm Square Pixels – 6144 or 8192 Pixels with 7 µm Square Pixels 100% Aperture, Built-in Antiblooming, No Lag CameraLink Data Format (Medium Configuration) High Data Rate: – 2048 Pixels: 120 Mpixels/s – 6144 and 8192 Pixels: 160 Mpixels/s Flexible and Easy to Operate Via Serial Control Lines (CameraLink) – Integration Time – Gain: 0dB to 30 dB by Steps of 0.04dB – Output Format: 8 or 10 Bits Data – Offset (for Contrast Expansion) – Trigger Mode: Free Run or External Trigger Modes Multi-camera Synchronization Single Power Supply: 12 to 24V DC Provided on Hirose-6 Connector Compact Mechanical Design: – 2048: 56 x 60 x 54 mm (W, H, L) – 6144 and 8192: 82 x 60 x 54 mm (W, H, L) High Reliability – CE and FCC Compliant Available Lens Adapter (Lens Not Supplied): – F Mount or T2 Mount for 2048 and 6144 Pixels – M72 x 0.75 for 8192 Pixels CameraLink™ Linescan Camera 120 MHz AViiVA™ M4 CL Preliminary Description This camera has been designed with three concepts in mind: compactness, accuracy and versatility. • Atmel manages the entire process, from the sensor to the camera. The result is a camera able to work in 8 or 10 bits, with dedicated electronics offering an excellent signal to noise ratio. • The programmable settings let the user work in different illumination conditions: integration time, gain and offset. Applications The high speed, high resolution, performance and reliability of this camera make it well suited for the most demanding industrial applications. • OCR and barcode reading: postal and parcel sorting, document scanning • Inspection and metrology: PCB, CD, DVD, display, semiconductor and electronics • Web inspection: ceramic, printing, currency, textile, wood, paper Rev. 5330A–IMAGE–05/03 1 Typical Performances Table 1. 2k Pixel Cameras Typical Performances Parameter Value Unit 2048 pixels Pixel size (square) 14 µm Max Line rate 52 kHz Peak data rate 4 x 30 MHz Antiblooming x 100 – Output format 8 or 10 bit Spectral range 250 – 1100 nm Linearity 2 % PRNU ±6 % Sensitivity output matching 10 % Offset output matching(1) 10 LSB Sensor Characteristics at Maximum Pixel Rate Resolution Radiometric Performances at Maximum Pixel Rate Gain range (steps of 0.035 dB) Peak response SEE (1)(2) SNR at 25°C NEE Gmin 0 Gnom 18 Gmax 30 dB 7 38.5 53 4.84 210 1.22 LSB/(nJ/cm2) nJ/cm2 42 30 dB – – pJ/cm2 58 50 TBC (3) Dark signal at 25°C(1) 260 2100 8500 LSB/s DSNU at 25°C(1) 200 1600 6500 LSB/s Mechanical and Electrical Interface Size (w x h x l) Lens mount Sensor alignment Power supply Power dissipation Operating temperature Storage temperature Notes: 2 56 x 60 x 54 mm No optical mount or F mount or T2 mount – ∆x,y = ±50 ∆z = 0 – 60 ∆θx,y = ±0.2 ∆tiltz = 0 – 35 µm µm ° µm DC, single 12 to 24 V < 10 W 0 to 55 (non-condensing) °C -40 to 85 (non-condensing) °C 1. LSB are given for 8 bit of resolution 2. nJ/cm² 4 front face temperature 3. In this specification TBD stands for To Be Defined, TBC for To Be Confirmed AViiVA M4 CL 5330A–IMAGE–05/03 AViiVA M4 CL Table 2. 6k and 8k Pixel Cameras Typical Performances Parameter Value Sensor Characteristics at Maximum Pixel Rate Resolution Unit 6K 8K 6144 8192 pixels 7 7 µm 18.5 14 kHz Pixel size (square) Max Line rate Peak data rate 4 x 40 MHz Antiblooming x 100 – Output format 8 or 10 bit Spectral range 250 – 1100 nm Linearity 2 % PRNU ±6 % 10 % 10 LSB Radiometric Performances at Maximum Pixel Rate Sensitivity output matching Offset output matching (1) Gain range (steps of 0.035 dB) Peak response SEE (1)(2) SNR at 25°C Gmin 0 Gnom 18 Gmax 30 dB 4 60 34 7.6 135 1.9 LSB/(nJ/cm2) nJ/cm2 42 30 dB – – pJ/cm2 450 3500 14000 LSB/s 350 2700 11000 LSB/s 58 (4) NEE 75 TBC Dark signal at 25°C(1) (1) DSNU RMS at 25°C Mechanical and Electrical Interface Size (w x h x l) 82 x 60 x 54 mm Lens mount M72 x 0.75 – ∆x,y = ±50 ∆z = 0 – 60 ∆θx,y = ±0.2 ∆tiltz = 0 – 35 µm µm ° µm DC, single 12 to 24V V < 10 W 0 to 55 (non-condensing) °C -40 to 85 (non-condensing) °C Sensor alignment Power supply Power dissipation (3) Operating temperature Storage temperature Notes: 1. 2. 3. 4. LSB are given for 8 bit of resolution nJ/cm² measured on the sensor Front face temperature In this specification TBD stands for To Be Defined, TBC for To Be Confirmed 3 5330A–IMAGE–05/03 Figure 1. Spectral Response Response (%) 100% 80% 60% 40% 20% 0% 200 400 600 800 1000 Wavelength (nm) Description CCD The CCD uses 4 taps. Figure 2. CCD Architecture CCD Register 2 VOS2 CCD Register 4 VOS4 Antiblooming location 1 2 3 Photodiode area N-1 N Antiblooming location VOS1 CCD Register 1 4 prescan elements Note: 4 VOS3 CCD Register 3 N useful pixels 4 prescan elements The prescan pixels are not output from the camera. AViiVA M4 CL 5330A–IMAGE–05/03 AViiVA M4 CL Camera Figure 3. Camera Synoptic Power supplies DC power CameraLinkTM transceiver DATA 4 Taps STROBE, LVAL pixels analog chain PGA, CDS, ADC 10 bits at 30 or 40 Mpixels/s Sequencer controller TX Linear CCD 4 taps TRIG1, TRIG2 CameraLinkTM I/F Medium RX Ext CLK CCD Drivers Serial line Microcontroller The AViiVA M4 cameras are based on four taps linear CCDs. Therefore, four analog chains process pixels of the linear sensor. The analog chains perform the CCD output processing. It encompasses the correlated double sampling (CDS), the dark level correction (dark pixel clamping), the gain (PGA) and offset correction and finally the analog to digital conversion on 10 bits (8- or 10-bit output). Note: PGA stands for programmable gain array • A single DC power voltage from 12 to 24 V supplies the camera. • The functional interface (data and control) is provided by the CameraLink™ interface. • The camera uses the medium configuration of CameraLink™ standard. • Note: FVAL=0 • The camera can be used with an external trigger. The camera uses TRIG1 and TRIG2 signals in the different external trigger modes, (refer to “Camera configuration is set by the serial interface. Please refer to “Serial Communication” on page 13 for the detailed protocol of the serial line.” on page 7). The camera can be clocked externally, allowing system synchronization and/or multi-camera synchronization. The camera configuration and settings are performed via a serial line. This interface is used for: • Gain, offset setting • Dynamic range, data rate setting • Trigger mode setting: free running or external trigger modes • Integration time setting: in free running and external trigger mode 5 5330A–IMAGE–05/03 Standard Conformity The cameras have been tested in the following conditions: • Shielded power supply cable. • Two CameraLink data transfer cables ref. 14B26-SZLB-500-OLC (3M). We recommend the use of the same configuration to ensure compliance with the following standards. CE Conformity AViiVA M4 Cameras comply with the requirements of the EMC (European) directive 89/336/CEE (EN 50081-2, EN 61000-6-2). FCC Conformity AViiVA M4 Cameras comply with Part 15 of FCC rules. Operation is subject to the following two conditions: • This device may not cause harmful interference, and • This device must accept any interference received, including interference that may cause undesired operation. This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense. Warning: Changes or modifications to this unit not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment. 6 AViiVA M4 CL 5330A–IMAGE–05/03 AViiVA M4 CL Camera Commands and Controls Camera configuration is set by the serial interface. Please refer to “Serial Communication” on page 13 for the detailed protocol of the serial line. Table 3. Camera Settings Functionalities Range/Values/Remarks Common gain Camera gain adjustment 2 to 35 dB Channel 1 gain Fine gain adjustment for balance Channel 2 gain Fine gain adjustment for balance Channel 3 gain Fine gain adjustment for balance Channel 4 gain Fine gain adjustment for balance Channel 1 offset Channel offset adjustment Channel 2 offset Channel offset adjustment Channel 3 offset Channel offset adjustment Channel 4 offset Channel offset adjustment Contrast expansion Channel 1 256 steps Contrast expansion Channel 2 256 steps Contrast expansion Channel 3 256 steps Contrast expansion Channel 4 256 steps Table 4. Camera Configuration Functionalities Range/Values/Remarks Output mode (TBC) 2, or 4 outputs Automatic offset compensation Allows automatic digital offset compensation Master clock 30 MHz Clock source selection Internal or external Rising or falling edge selection Integration time 1 to 32000 steps Each step = 1.00 µs Trigger mode Free run Integration time set by serial line External trigger mode One signal integration time control Two signals integration time control Output data rate Master clock period Master clock period/2 Master clock period/4 Data size output 8 or 10 bits Output signal Pattern Integration time and readout time controlled by one or two external signals Data valid is used Raw video 7 5330A–IMAGE–05/03 Table 5. Configuration Settings Storage/Restoration Functionalities Range/Values/Remarks One factory settings and four customer settings The maximum number of write cycles allowed by the EEPROM is 100,000 Functionalities Range/Values/Remarks Table 6. Camera Readout Camera status Camera gives information on an external clock or trigger presence Factory ID readout Allows ID and serial number readout Customer ID readout/storage Allows customer ID readout Timing Synchronization Mode Free Run Mode Four different modes may be used under user control. • The TRIG1 and TRIG2 signals may be used to trigger an external event and control the integration time. • The Master clock is either external or internal. • Times are given in seconds or in number of master clock periods (MCP). M.C.P is 33 nsecs when master clock frequency is 30 MHz Integration time is set by the serial line. The integration and readout periods start automatically and immediately after the previous period. The readout time depends on the pixel number and pixel rate. Table 7. Timing Specification Label Description Min Typ Max – 32 ms ti Integration time duration (1) tt Integration period to readout delay at master clock H – 21 MCP – tt Integration period to readout delay at master clock H/2 – 44 MCP – tt Integration period to readout delay at master clock H/4 – 90 MCP – Note: 1. The Integration time is set by the serial line and should be higher than the readout time + tt (otherwise it is adjusted to the readout time + tt). Figure 4. Timing Diagram tt Readout N-1 Integration N Readout N Integration N+1 ti Trigger Mode 8 The integration period starts immediately after the rising edge of TRIG1 input signal. The integration time is set by the serial line. This integration period is immediately followed by a readout period. The readout time depends on the pixel number and the pixel rate. AViiVA M4 CL 5330A–IMAGE–05/03 AViiVA M4 CL A 270 ns jitter may occur between the rising edge of TRIG1 and the beginning of real integration time. Table 8. Timing Specification: Selected output data rate = master clock Label Description Min Typ Max 1,9 µs – 32 ms ti Integration time duration td TRIG1 rising to integration period delay – 21 MCP – tt Integration period stop to readout delay – See Table 7 – ts Integration period to TRIG1 rising set-up time 80 MCP – – th TRIG1 hold time (pulse high duration) 8 MCP – – Figure 5. Timing Diagram ti ts td th tt TRIG1 Integration N Integration N+1 Readout N ITC Mode (One Signal) In the Integration Time Control (ITC) mode, the integration period starts immediately after the falling edge of TRIG1 input signal and stops immediately after the rising edge of TRIG1 input signal. It is immediately followed by a readout period. The readout time depends on the pixel number and pixel rate. Table 9. Timing Specification: Selected output data rate period = Master Clock Label ti Description Integration time duration Min Typ Max 1,9 µs – – td1 TRIG1 falling to starting integration period delay – 21 MCP – td2 TRIG1 rising to ending integration period delay – 39 MCP – tt Integration period to readout delay – See Table 7 – th TRIG1 hold time (pulse high duration) 8 MCP – – Figure 6. Timing Diagram th ti TRIG1 td1 td2 Readout N-1 Readout N Integration N tt Integration N+1 9 5330A–IMAGE–05/03 ITC Mode (Two Signals) The TRIG2 rising edge starts the integration period. The TRIG1 rising edge stops the integration period. This period is immediately followed by a readout period. Table 10. Timing Specification : Selected Output Data Rate = Master Clock Label ti Description Integration time duration Min Typ Max 1,9 µs – – td1 TRIG2 rising to starting integration period delay – 21 MCP – td2 TRIG1 rising to ending integration period delay – 39 MCP – tt Integration period to readout delay – See Table 7 – th TRIG1 and TRIG2 hold time (pulse high duration) 8 MCP – – Figure 7. Timing Diagram th ti TRIG2 td1 td2 TRIG1 Integration N Integration N+1 Readout N-1 Readout N tt 10 AViiVA M4 CL 5330A–IMAGE–05/03 AViiVA M4 CL Output Data Timing Table 11. Timing Specification Label Description Min Typ Max tp Input to output clock propagation delay – 5 µs – td STROBE to synchronize signal delay – 1.8 µs – Figure 8. Timing Diagram Internal Clock or CLOCK_IN tp td td LVAL td STROBE DATA First valid pixel Note: Last valid pixel DVAL, as defined in the CameraLink standard is active at high level 11 5330A–IMAGE–05/03 Electrical Interface Power Supply It is recommended to insert a 1A fuse between the power supply and the camera. The voltage ripple of the power supply should be below ±50 mVp-p at BW = 50MHz for full camera performance. Table 12. Power Supply Signal Name I/O Type PWR P – DC power input: +12 to +24V GND P – Electrical and mechanical ground Note: Command and Control Description I = input, O = output, IO = bi-directional signal, P = power/ground, NC = not connected The CameraLink interface provides four LVDS signals dedicated to camera control (CC1 to CC4). On the AViiVA, three of them are used to synchronize the camera on external events. 1. FVAL, as defined in the CameraLink standard, is not used. FVAL is permanently tied to 0 (low) level. 2. CC3 is not used Table 13. Signal Definitions I/O(2) Type TRIG1 I RS644 CC1 – Synchronization input(1) TRIG2 I RS644 CC2 – Start Integration period in dual synchro mode(1) CLOCK_IN I RS644 CC4 – External clock for (multi-) camera synchronization(1) Signal Name Notes: Description 1. Refer to “Synchronization Mode” on page 8. 2. I = input, O = output, IO = bi-directional signal, P = power/ground, NC = not connected 12 AViiVA M4 CL 5330A–IMAGE–05/03 AViiVA M4 CL Video Data Data and enable signals are provided on the CameraLink interfaces. 1. FVAL, as defined in the CameraLink standard, is not used. FVAL is permanently tied to 0 (low) level. 2. DVAL, as defined in the CameraLink standard, when used is active at high level. Table 14. Video Data Signal Name I/O(2) Type OUT1-D[9-0] O RS644 Out 1 pixel data, OUT1-0 = LSB, OUT1-9 = MSB(1) OUT2-D[9-0] O RS644 Out 2 pixel data, OUT2-0 = LSB, OUT2-9 = MSB(1) OUT3-D[9-0] O RS644 Out 3 pixel data, OUT3-0 = LSB, OUT3-9 = MSB(1) OUT4-D[9-0] O RS644 Out 4 pixel data, OUT4-0 = LSB, OUT4-9 = MSB(1) STROBE O RS644 Output data clock, data valid on the rising edge(1) LVAL O RS644 Line valid or line enable, active high signal(1) DVAL O RS644 Data valid, active high signal Notes: Serial Communication Description 1. Refer to “Output Data Timing” on page 11 2. I = input, O = output, IO = bi-directional signal, P = power/ground, NC = not connected The CameraLink interface provides two LVDS signal pairs for the communication between the camera and the frame grabber. This is an asynchronous serial communication based on the RS-232 protocol. The configuration of the serial line is: • Full duplex/without handshaking • 9600 bauds, 8-bit data, no parity, 1 stop bit. Table 15. Signal Definition Signal Name I/O Type Description SerTFG O RS644 Differential pair for serial communication to the frame grabber SerTC I RS644 Differential pair for serial communication from the frame grabber The camera will be delivered with: • Software dedicated to camera control. • .dll and .h files to allow camera control in a customer development software. 13 5330A–IMAGE–05/03 Connector Description All connectors are on the rear panel. Better results are obtained by using shielded cables (foil and braid). CameraLink Connector Standard CameraLink cables should be used to ensure the full electrical compatibility. Camera connector type: 2 x MDR-26 (female) ref. 10226-2210VE Cable connector type: Standard CameraLink cable should be used (ex. 3M™ – 14B26-SZLBx00-OLC) Table 16. CameraLink Connector Signal Bit Assignment 14 Pin Signal Pin GND 1 GND 14 X0- 2 X0+ 15 X1- 3 X1+ 16 X2- 4 X2+ 17 Xclk- 5 Xclk+ 18 X3- 6 X3+ 19 SerTC+ 7 SerTC- 20 SerTFG- 8 SerTFG+ 21 CC1- 9 CC1+ 22 CC2+ 10 CC2- 23 CC3- 11 CC3+ 24 CC4+ 12 CC4- 25 GND 13 GND 26 This bit assignment is compliant with CameraLink specifications in the Medium Configuration with two cables (see AIA CameraLink documentation). AViiVA M4 CL 5330A–IMAGE–05/03 AViiVA M4 CL Power Supply Camera connector type: Hirose HR10A-7R-6PB (male) Cable connector type: Hirose HR10A-7P-6S (female), one connector is delivered with each camera. Table 17. Power Connector J01 Signal Pin Signal Pin PWR 1 GND 4 PWR 2 GND 5 PWR 3 GND 6 Figure 9. Receptacle Viewed from the Rear of the Camera 1 6 2 5 3 4 15 5330A–IMAGE–05/03 Ordering Codes Table 18. Cameras Item Part Number AVIIVA M4 CameraLink 2048 pixels 14 µm AT71XM4CL2014-BA0 AVIIVA M4 CameraLink 6144 pixels 7 µm AT71XM4CL6007-BA0 AVIIVA M4 CameraLink 8192 pixels 7 µm AT71XM4CL8007-BA0 Note: The cameras are delivered with a power supply connector. Table 19. Optical Mount Item Part Number F Mount for Aviiva M4 2k or 6k AT71-AVIIVAX4-F T2 Mount for Aviiva M4 2k or 6k AT71-AVIIVAX4-T2 M72 x 0.75 Mount for Aviiva M4 8k AT71-AVIIVAX4-M72 Note: The cameras are delivered without an optical mount. Table 20. BG38 Filters Item Part Number Kit BG38 for 2k and 6k AT71ABG38AVIVX4-6K Kit BG38 for 8k AT71ABG38AVIVX4-8K Note: Filters are held by an optical mount Table 21. Accessories 16 Item Part Number 2 CameraLink cables (5 meters long) AT71KAVIIVA-X4-CL Optional heatsink Please contact factory AViiVA M4 CL 5330A–IMAGE–05/03 AViiVA M4 CL Mechanical Characteristics Weight The camera typical weight (without lens) is 500g (TBC). Dimensions Figure 10. 2k 48 60 ±0.2 5.6 4 holes M3 dpt:6 C = 32 ±0.2 = B 6 ±0.2 Y 56 ±0.2 = 48 ±0.2 = = 18 ±0.2 = = = F = 30 ±0.2 = ∅54H8 1 hole 1/4 UNC dpt:5 4x2 holes M4 dpt:6 2.8 ±0.2 4 holes M3 dpt:6 1st pixel Z = 30 ±0.2 = = 52 ±0.2 = A X Figure 11. 6k and 8k 48 60 ±0.2 5.6 6 ±0.2 = 32 ±0.2 = B 4 holes M3 dpt:6 C Y 4x2 holes M4 dpt:6 82 ±0.2 = 74 ±0.2 = = 18 ±0.2 = = = F = 30 ±0.2 = ∅54H8 1 hole 1/4 UNC dpt:5 4 holes M3 dpt:6 2.8 ±0.2 = 30 ±0.2 = Z 1st pixel A = 52 ±0.2 = X 17 5330A–IMAGE–05/03 Figure 12. Rear Face F 19 31 DC 12-24V 23.5 61 + CL2 + + 23.5 CL1 14.5 Note: 18 The 2k rear face doesn’t have the two heat sinks. AViiVA M4 CL 5330A–IMAGE–05/03 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131 Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 Microcontrollers 2325 Orchard Parkway San Jose, CA 95131 Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60 ASIC/ASSP/Smart Cards RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom Avenue de Rochepleine BP 123 38521 Saint-Egreve Cedex, France Tel: (33) 4-76-58-30-00 Fax: (33) 4-76-58-34-80 Zone Industrielle 13106 Rousset Cedex, France Tel: (33) 4-42-53-60-00 Fax: (33) 4-42-53-60-01 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland Tel: (44) 1355-803-000 Fax: (44) 1355-242-743 e-mail [email protected] Web Site http://www.atmel.com Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems. © Atmel Corporation 2003. All rights reserved. Atmel ® and combinations thereof, are the registered trademarks of Atmel Corporation or its subsidiaries. AViiVA ™ is the trademark of Atmel Corporation. CameraLink ™ is a trademark of the AIA (Automated Imaging Association). Other terms and product names may be the trademarks of others. Printed on recycled paper. 5330A–IMAGE–05/03 0M