ETC SY10/100E451

SY10E451
SY100E451
FINAL
6-BIT REGISTER
DIFFERENTIAL DATA CLOCK
FEATURES
DESCRIPTION
■
■
■
■
■
■
1100MHz min. toggle frequency
Extended 100E VEE range of –4.2V to –5.5V
Differential inputs: data and clock
VBB output for single-ended use
Asynchronous Master Reset
Fully compatible with industry standard 10KH,
100K ECL levels
■ Internal 75KΩ input pulldown resistors
■ Fully compatible with Motorola MC10E/100E451
■ Available in 28-pin PLCC package
The SY10/100E451 offer six D-type flip-flops with singleended outputs and differential data and clock inputs,
designed for use in new, high-performance ECL systems.
The registers are triggered by the rising edge of the CLK
input.
A logic HIGH on the Master Reset (MR) input resets all
outputs to a logic LOW. The VBB output is provided for use
as a reference voltage for single-ended reception of ECL
signals to that device only. When used for this purpose, it
is recommended that VBB is decoupled to V CC via a 0.01µF
capacitor.
R
R
D3
/D3
15
VCC
Q3
16
TOP VIEW
PLCC
J28-1
1
Q5
Q4
14
VCCO
3
13
4
12
Q2
Q1
2
5
6
7
8
9
10 11
Q3
D
R
D4
/D4
28
VCCO
Q0
MR
NC
D0
Q2
D
17
D2
D2
/D2
18
27
/D2
/CLK
VEE
R
26
/D1
Q1
D
VCCO
25 24 23 22 21 20 19
CLK
VBB
D1
D1
/D1
/D3
D3
/D5
Q0
D
/D0
D0
/D0
D5
/D4
D4
PIN CONFIGURATION
BLOCK DIAGRAM
Q4
D
R
D5
/D5
Q5
D
PIN NAMES
R
CLK
/CLK
Pin
Function
MR
D0–D5
+ Data Input
VBB
/D0–/D5
– Data Input
CLK
+ Clock Input
/CLK
– Clock Input
Q0–Q5
Data Outputs
MR
Master Reset Input
VBB
VBB Output
VCCO
VCC to Output
Rev.: D
1
Amendment: /0
Issue Date: Feb. 19, 2001
SY10E451
SY100E451
Micrel
DC ELECTRICAL CHARACTERISTICS
VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND
TA = –40°C
Symbol
Parameter
Min.
VBB
Output Reference 10E
Voltage
100E
IIH
Input HIGH Current
IEE
Power Supply
Current
VCMR
Common Mode Range(1)
Typ.
Max.
10E
100E
TA = 0°C
TA = 25°C
Max.
Min.
Typ.
TA = +85°C
Min.
Typ.
–1.38
–1.38
—
—
—
—
150
—
—
150
—
—
84
84
101
101
—
—
84
84
–2.0
—
–0.4
–2.0
—
–1.27 –1.35
–1.26 –1.38
—
—
Max.
Min.
Typ.
Max.
Unit
—
—
–1.19
–1.26
V
—
—
150
µA
101
101
—
—
84
97
101
116
mA
–0.4
–2.0
—
–0.4
V
–1.25 –1.31
–1.26 –1.38
NOTE:
1. VCMR is referenced to the most psitive side of the differential input signal. Normal operation is obtained when the “HIGH” input is within the VCMR range
and the input swing is greater than VPP (min) and < 1V.
AC ELECTRICAL CHARACTERISTICS
VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND
TA = –40°C
Symbol
Parameter
Min.
Typ.
Max.
TA = 0°C
TA = 25°C
TA = +85°C
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
MHz
fMAX
Max. Toggle Frequency
1100
1400
—
1100
1400
—
1100
1400
—
tPLH
tPHL
Propagation Delay to
Output
CLK (Diff)
CLK (SE)
MR
475
425
425
650
650
600
800
850
850
475
425
425
650
650
600
800
850
850
475
425
425
650
650
600
800
850
850
tS
Set-up Time
D
150
–100
—
150
–100
—
150
–100
—
ps
tH
Hold Time
D
250
100
—
250
100
—
250
100
—
ps
150
—
—
150
—
—
150
—
—
mV
VPP (AC)
Minimum Input
ps
Swing(1)
tRR
Reset Recovery Time
750
600
—
750
600
—
750
600
—
ps
tPW
Minimum Pulse Width
CLK, MR
400
—
—
400
—
—
400
—
—
ps
tskew
Within-Device Skew(2)
—
100
—
—
100
—
—
100
—
ps
tr
tf
Rise/Fall Time
20% to 80%
275
450
800
275
450
800
275
450
800
ps
NOTES:
1. Minimum input voltage for which AC parameters are guaranteed.
2. Within-device skew is defined as identical transitions on similar paths through a device.
PRODUCT ORDERING CODE
Ordering
Code
SY10E451JC
Package
Type
Operating
Range
J28-1
Commercial
Ordering
Code
Package
Type
Operating
Range
SY10E451JI
J28-1
Industrial
J28-1
Industrial
SY10E451JCTR
J28-1
Commercial
SY10E451JITR
SY100E451JC
J28-1
Commercial
SY100E451JI
J28-1
Industrial
SY100E451JCTR
J28-1
Commercial
SY100E451JITR
J28-1
Industrial
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SY10E451
SY100E451
Micrel
28 LEAD PLCC (J28-1)
Rev. 03
MICREL-SYNERGY
TEL
3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA
+ 1 (408) 980-9191
FAX
+ 1 (408) 914-7878
WEB
http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
© 2001 Micrel Incorporated
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