SuperLite™ SY55851 SY55851A FINAL 2.5V/3V, 3.0GHz CML AnyGate™ANY LOGIC w/50Ω or 100Ω OUTPUTS DESCRIPTION FEATURES ■ Guaranteed AC parameters over temperature: • fMAX > 3.0GHz (SY55851A) • tr / tf < 100ps • Propagation delay < 280ps ■ Guaranteed operation over –40°C to +85°C temperature range ■ Wide supply voltage range: 2.3V to 3.6V ■ Single IC provides 8 logic functions ■ 2:1 MUX capability ■ Fully differential I/O ■ Source terminated CML outputs for fast edge rates: • SY55851 for 100Ω load • SY55851A for 50Ω load ■ Guaranteed matched propagation delays: • Select (S)-to-out: < 280ps • Input (A and B)-to-out: < 280ps ■ Accepts PECL, LVPECL, CML input signals ■ Functions as a PECL/LVPECL-to-CML translator ■ Available in a 10-pin (3mm × 3mm) MSOP package The SY55851 and SY55851A are highly flexible, universal logic gates capable of up to 3.0GHz operation (SY55851A). These AnyGate differential logic devices will produce all possible logic functions of two Boolean variables. They can be configured as any of the following gates: AND, NAND, OR, NOR, XOR, XNOR, DELAY, NEGATION (NOT). The SY55851 and SY55851A can also function as a 2-input multiplexer. The SY55851 has an output stage optimized for 100Ω loads, and the SY55851A is optimized for 50Ω loads. The differential inputs for both devices are normally terminated with a single resistor (100Ω) between the true and complement pins. APPLICATIONS ■ ■ ■ ■ PIN CONFIGURATION S 1 Port bypass Data communication systems Wireless communication systems Telecom systems FUNCTIONAL BLOCK DIAGRAM 10 VCC 2 S /S 2 A 3 /A 4 GND 5 9 /B MSOP 8 B 2 A 7 Q 2 B 6 /Q 0 S 2 Q 1 SY55851 and SY55851A PIN NAMES Pin Function A, /A CML, PECL, LVPECL Input B, /B CML, PECL, LVPECL Input Q, /Q Differential CML Output S, /S CML, PECL, LVPECL Input Selector GND Ground VCC VCC AnyGate and SuperLite are trademarks of Micrel, Inc. Rev.: A 1 Amendment: /2 Issue Date: October 2001 SuperLite™ SY55851 SY55851A Micrel PIN DESCRIPTIONS A, /A – CML Input (Differential) This is one of the differential inputs to the logic block. For a 2-variable logic function, it is either a constant value or a Boolean input. For a 2-input mux, this signal represents the output when S is set to logic zero. Q, /Q – CML Output (Differential) This is the differential CML output for the logic block. For termination guidelines, see Figure 3. S, /S – CML Input (Differential) This differential CML input is one of the inputs to the logic block. It represents either one Boolean input for a 2-variable logic function, or the select input for a 2-input mux. B, /B – CML Input (Differential) This is one of the differential inputs to the logic block. For a 2-variable logic function, it is either a constant value or a Boolean input. For a 2-input mux, this signal represents the output when S is set to logic one. FUNCTIONAL DESCRIPTION input at static logic zero at VCC ≥ 3.0V, leave both inputs unconnected or tie the complement input to VCC. For VCC < 3.0V applications, connect the complement input to VCC and leave the true input unconnected. To make an input static logic one, connect the true input to VCC, and leave the complement input unconnected. These are the only safe ways to cause inputs to be at a static value. In particular, no input pin should be directly connected to ground. All NC (no connect) pins should be unconnected. Establishing Static Logic Inputs The true pin of an input pair is internally biased to ground through a 75kΩ resistor. The complement pin of an input pair is internally biased to VCC/2 through an internal voltage divider consisting of two 75kΩ resistors. Since some logic functions necessitate an output to be connected to two inputs, SY55851/A inputs have no internal terminations. Typically, one resistor between the true and complement input is all that is required, as per Figure 3. To keep an VCC Input NC /Input NC Input NC /Input For VCC > 3.0V Applications Figure 1. Hard Wiring A Logic “1” (1) NOTE: 1. Input is either A, B, S input, and /Input is either /A, /B, /S input. NC Input VCC /Input For VCC < 3.0V Applications Figure 2. Hard Wiring A Logic “0” (1) 2 SuperLite™ SY55851 SY55851A Micrel TRUTH TABLES AND/NAND β A S A /S /A B /B NC VCC α VCC NC S A /S /A B /B S A /S /A B /B α L L L H /Q (α ⋅ β) H L L H L L H L H L H H H L α A B β S α+β Q (α + β) /Q OR/NOR Q α+β /Q (α + β) β S A /S /A B /B L H L L H H H L H L L H H H L H H H H L α A B β S α⊕β Q (α ⊕ β) /Q L H L L H L H H H L H L L H L H L H L H XOR/XNOR Q α⊕β /Q (α ⊕ β) DELAY/NEGATION S A /S /A B /B VCC (α⋅β) /Q L VCC NC α⋅β Q L β α β S Q α⋅β β α α B Q α /Q α α A B S α Q α /Q L X L L H H X L H L A β B S β Q β /Q X L H L H X H H H L NC Q β /Q β S 2:1 MUX A S 0 Q B 1 3 Q H B L A SuperLite™ SY55851 SY55851A Micrel CML TERMINATION AND TTL INTERFACE All inputs accept the output from any other member of this family. All outputs are source terminated 100Ω or 50Ω CML differential drivers as shown in Figure 3. All inputs to the SY55851/A must be externally terminated. SY55851/A inputs are designed to accept a termination resistor between the true and complement inputs of a differential pair. 0402 form factor chip resistors will fit with some trace fanout. VCC 100Ω VCC 100Ω 50Ω 100Ω Q 50Ω 50Ω Q 100Ω 200Ω /Q /Q 100Ω 16mA 8mA SY55851A SY55851 Figure 3b. Differentially Terminated SY55851A (50Ω Load CML Output) Figure 3a. SY55851 100Ω Load CML Output VCC 100Ω 50Ω VCC 100Ω 100Ω Q 100Ω 50Ω 100Ω /Q VCC VCC VCC VCC ≥ VCC (TTL Driver) 50Ω 1k TTL Driver 8mA 549Ω SY55851 SY55851A 1k S /S 1.47k SY55851 Figure 4. Interfacing TTL-to-CML Select Inputs Figure 3c. Differentially Terminated SY55851 (50Ω Load CML Output) 4 SuperLite™ SY55851 SY55851A Micrel ABSOLUTE MAXIMUM RATINGS(1) Symbol Rating Value Unit –0.5 to +6.0 V –0.5 to VCC +0.5 V VCC –1.0 to VCC +0.5 V VCC Power Supply Voltage VIN Input Voltage VOUT CML Output Voltage TA Operating Temperature Range –40 to +85 °C Tstore Storage Temperature Range –65 to +150 °C θJA Package Thermal Resistance (Junction-to-Ambient) 113 96 °C/W °C/W θJC Package Thermal Resistance (Junction-to-Case) 42 °C/W –Still-Air (multi-layer PCB) –500lfpm (multi-layer PCB) NOTE: 1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATlNG conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS TA = –40°C to +85°C(1) Symbol Parameter Min. Typ. Max. Unit Condition VCC Power Supply Voltage 2.3 — 3.6 V ICC Power Supply Current SY55851 SY55851A — — — 46 40 60 mA mA No Load No Load Condition CML DC ELECTRICAL CHARACTERISTICS VCC = 2.3V to 3.6V; GND = 0V; TA = –40°C to +85°C(1) Symbol Parameter Min. Typ. Max. Unit VID Differential Input Voltage 100 — — mV VIH Input HIGH Voltage 1.6 — VCC V VIL Input LOW Voltage 1.5 — VCC – 0.1 V VOH Output HIGH Voltage VCC – 0.040 VCC – 0.010 VCC V No Load VOL Output LOW Voltage VCC – 1.00 VCC – 0.800 VCC – 0.65 V No Load VOUT Output Voltage Swing(2) 0.650 0.800 1.00 V No Load SY55851 — — 0.400 0.200 — — V V 100Ω Load(3) 50Ω Load(4) (SY55851) SY55851A — 0.400 — V 50Ω Load(5) (SY55851A) Output Source Impedance SY55851 SY55851A 80 40 100 50 120 60 Ω Ω ROUT NOTES: 1. The DC parameters are guaranteed after thermal equilibrium has been established. 2. Actual voltage levels and differential swing will depend on customer termination scheme. Refer to the “CML Termination” diagram for more details. 3. Applies to SY55851: 200Ω termination resistor across Q and /Q. See Figure 3a. 4. Applies to the SY55851. See Figure 3c. 5. Applies to the SY55851A: 100Ω termination resistor across Q and /Q. See Figure 3b. 5 SuperLite™ SY55851 SY55851A Micrel AC ELECTRICAL CHARACTERISTICS(1) VCC = 2.3V to 3.6V; GND = 0V; TA = –40°C to +85°C Symbol Min. Typ. Max. Unit Max. Operating Frequency SY55851 SY55851A 2.5 3.0 — — — — GHz GHz tPD(S-Q) Propagation Delay SY55851 (S to Q) SY55851A — 130 — — 350 280 ps ps tPD (A-Q and B-Q) Propagation Delay (A-Q and B-Q) SY55851 SY55851A — 130 — — 350 280 ps ps tr tf CML Output Rise/Fall Times (20% to 80%) SY55851 SY55851A — — — 65 110 100 ps ps fMAX(2) Parameter NOTES: 1. SY55851: outputs terminated to 50Ω equivalent load. See Figure 3c. SY55851A: outputs terminated to 50Ω load. See Figure 3b 2. fMAX represents a maximum toggle rate in which the output still meets CML logic swing. PRODUCT ORDERING CODE Ordering Code Package Type Operating Range Package Marking Description SY55851UKI K10-1 Industrial 851U 100Ω Load SY55851UKITR* K10-1 Industrial 851U 100Ω Load SY55851AUKI K10-1 Industrial 851A 50Ω Load SY55851AUKITR* K10-1 Industrial 851A 50Ω Load *Tape and Reel. 6 Condition SuperLite™ SY55851 SY55851A Micrel 10 LEAD MSOP (K10-1) Rev. 00 MICREL-SYNERGY 3250 SCOTT BOULEVARD TEL + 1 (408) 980-9191 FAX + 1 (408) 914-7878 WEB SANTA CLARA CA 95054 USA http://www.synergysemi.com http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. © 2001 Micrel Incorporated 7