SuperLite™ Micrel DUAL CML/PECL/LVPECL-to-LVDS TRANSLATOR SuperLite™ SY55855V SY55855V FINAL FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ Guaranteed fMAX >750MHz over temperature 1.5Gbps throughput capability 3.0V to 5.7V power supply Guaranteed <700ps propagation delay over temperature Guaranteed <50ps within-device skew over temperature LVDS compatible outputs Fully differential I/O architecture Wide operating temperature range: –40°C to +85°C Available in a tiny 10-pin MSOP package SuperLite™ DESCRIPTION The SY55855V is a fully differential, CML/PECL/ LVPECL-to-LVDS translator. It achieves LVDS signaling up to 1.5Gbps, depending on the distance and the characteristics of the media and noise coupling sources. LVDS is intended to drive 50Ω impedance transmission line media such as PCB traces, backplanes, or cables. SY55855V inputs can be terminated with a single resistor between the true and the complement pins of a given input. The SY55855V is a member of Micrel’s new SuperLite™ family of high-speed logic devices. This family features very small packaging, high signal integrity, and operation at many different supply voltages. PIN CONFIGURATION D0 1 10 VCC /D0 2 9 Q0 D1 3 8 /Q0 /D1 4 7 Q1 GND 5 6 /Q1 APPLICATIONS ■ ■ ■ ■ 10-Pin MSOP High-speed logic Data communications systems Wireless communications systems Telecom systems PIN NAMES FUNCTIONAL BLOCK DIAGRAM Pin D0 Q0 /D0 /Q0 D1 Q1 /D1 /Q1 Function D0, /D0 CML/PECL/LVPECL Input Data D1, /D1 CML/PECL/LVPECL Input Data Q0, /Q0 LVDS Output Data Q1, /Q1 LVDS Output Data GND Ground VCC VCC SuperLite is a trademark of Micrel, Inc. Rev.: C 1 Amendment: /0 Issue Date: March 2003 SuperLite™ SY55855V Micrel PIN DESCRIPTIONS D0, /D0 – CML/PECL/LVPECL Input (Differential) This is one of the inputs. It is converted to LVDS onto the Q0 and /Q0 outputs. Q0, /Q0 – LVDS Output (Differential) This is one LVDS output. It buffers the CML input that appears at D0, /D0. D1, /D1 – CML/PECL/LVPECL Input (Differential) This is the other input. It is converted to LVDS onto the Q1 and /Q1 outputs. Q1, /Q1 – LVDS Output (Differential) This is the other LVDS output. It buffers the CML input that appears at D1, /D1. FUNCTIONAL DESCRIPTION unconnected. For VCC ≤ 3.0V, connect the complement input to VCC and leave the true input unconnected. To make an input static logic one, connect the true input to VCC, leave the complement input unconnected. These are the only two safe ways to cause inputs to be at a static value. In particular, no input pin should be directly connected to ground. All NC (no connect) pins should be unconnected. Establishing Static Logic Inputs The true pin of an input pair is internally biased to ground through a 75kΩ resistor. The complement pin of an input pair is internally biased halfway between VCC and ground by a voltage divider consisting of two 75kΩ resistors. In this way, unconnected inputs appear as logic zeros. To keep an input at static logic zero at VCC > 3.0V, leave both inputs VCC X NC X NC /X NC /X VCC > 3.0V Figure 1. Hard Wiring a Logic “1” (1) Note 1. X is either D0 or D1 input. /X is either /D0 or /D1 input. TRUTH TABLE D0 D1 Q0 /Q0 Q1 /Q1 0 0 0 1 0 1 0 1 0 1 1 0 1 0 1 0 0 1 1 1 1 0 1 0 NC X VCC /X VCC ≤ 3.0V Figure 2. Hard Wiring a Logic “0” (1) Note 1. 2 X is either D0 or D1 input. /X is either /D0 or /D1 input. SuperLite™ SY55855V Micrel LVDS OUTPUTS LVDS stands for Low Voltage Differential Swing. LVDS specifies a small swing of 350mV typical, on a nominal 1.25V common mode above ground. The common mode voltage has tight limits to permit large variations in ground between an LVDS driver and receiver. Also, change in common mode voltage, as a function of data input, is also kept tight, to keep EMI low. 50Ω 50Ω 100Ω ±1% vOD vOH, vOL vOH, vOL GND Figure 3. LVDS Differential Measurement 49.9Ω, ±1% 49.9Ω, ±1% vOCM, ∆vOCM GND Figure 4. LVDS Common Mode Measurement 50Ω 100Ω 50Ω Figure 5. LVDS Output Termination 3 SuperLite™ SY55855V Micrel ABSOLUTE MAXIMUM RATINGS(1) Symbol Rating Value Unit –0.5 to +6.0 V –0.5 to VCC +0.5 V ±10% mA VCC Power Supply Voltage VIN Input Voltage IOUT LVDS Output Current TA Operating Temperature Range –40 to +85 °C Tstore Storage Temperature Range –65 to +150 °C Note 1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATlNG conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS(1) VCC = 3.0V to 5.7V; GND = 0V; TA = –40°C to +85°C(2) TA = –40°C Symbol Parameter TA = +25°C TA = +85°C Min. Max. Min. Typ. Max. Min. Max. Unit V VCC Power Supply Voltage 3.0 5.7 3.0 — 5.7 3.0 5.7 ICC Power Supply Current 3.6V <VCC <5.7V VCC ≤3.6V — — 80 50 — — — 30 80 50 — — 80 50 Note 1. Specification for packaged product only. Note 2. Equilibrium temperature. mA CML DC ELECTRICAL CHARACTERISTICS(1) VCC = 3.0V to 5.7V; GND = 0V; TA = –40°C to +85°C(2) Symbol Parameter Min. Typ. Max. Unit VID Differential Input Voltage 100 — — mV VIH Input HIGH Voltage 1.6 — VCC V Input LOW Voltage 1.5 — VCC – 0.1 V Min. Typ. Max. Unit Condition 250 — 450 mV 100Ω Termination 1.125 — 1.375 V VIL Note 1. Specification for packaged product only. Note 2. Equilibrium temperature. Condition LVDS DC ELECTRICAL CHARACTERISTICS(1) VCC = 3.0V to 5.7V; GND = 0V; TA = –40°C to +85°C(2) Symbol Parameter Voltage(4) VOD Differential Output VOCM Output Common Mode Voltage(3) ∆VOCM Change in Common Mode Voltage(3) –50 — +50 mV VOH Output HIGH Voltage(4), (5) — — 1.474 V IOH = –4.0mA VOL Voltage(4), (5) 0.925 — — V IOL = 4.0mA Output LOW Note 1. Specification for packaged product only. Note 2. Equilibrium temperature. Note 3. Measured as per Figure 4. Note 4. Measured as per Figure 3. Note 5. Do not short output to GND. 4 SuperLite™ SY55855V Micrel AC ELECTRICAL CHARACTERISTICS(1) VCC = 3.0V to 5.7V; GND = 0V; TA = –40°C to +85°C(2) Symbol Parameter Min. Typ. Max. Unit fMAX Maximum Operating Frequency 750 — — MHz tPLH tPHL Propagation Delay D0 to Q0, D1 to Q1 300 — 700 ps tSKEW Within-Device Skew(3) Part-to-Part Skew (Diff.) — — — — 50 250 ps tr tf LVDS Output Differential Rise/Fall Times (20% to 80%) 100 — 300 ps Note 1. Specification for packaged product only. Note 2. Equilibrium temperature. Note 3. Worst case difference between Q0 and Q1 from either D0 or D1, when both outputs have the same transition. PRODUCT ORDERING CODE Ordering Code Package Type Operating Range Package Marking SY55855VKI K10-1 Industrial 855V 5 Condition SuperLite™ SY55855V Micrel EYE DIAGRAMS(1) Note 1. 622Mbps 3.3V LVPECL-to-LVDS 1.25Gbps 3.3V LVPECL-to-LVDS 1.5Gbps 3.3V LVPECL-to-LVDS 622Mbps 3.3V CML-to-LVDS 1.25Gbps 3.3V CML-to-LVDS 1.5Gbps 3.3V CML-to-LVDS 223–1 pattern. 6 SuperLite™ SY55855V Micrel 10 LEAD MSOP (K10-1) Rev. 00 MICREL, INC. TEL 1849 FORTUNE DRIVE SAN JOSE, CA 95131 + 1 (408) 944-0800 FAX + 1 (408) 944-0970 WEB USA http://www.micrel.com The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2003 Micrel, Incorporated. 7