CS8363 3.3 V Dual Micropower Low Dropout Regulator with ENABLE and RESET The CS8363 is a precision micropower dual voltage regulator with ENABLE and RESET. The 3.3 V standby output is accurate within ±2% while supplying loads of 100 mA. Quiescent current is low, typically 140 µA with a 300 µA load. The active RESET output monitors the 3.3 V standby output and is low during power–up and regulator dropout conditions. The RESET circuit includes hysteresis and is guaranteed to operate correctly with 1.0 V on the standby output. The second output tracks the 3.3 V standby output through an external adjust lead, and can supply loads of 250 mA with a typical dropout voltage of 400 mV. The logic level lead ENABLE is used to control this tracking regulator output. Both outputs are protected against overvoltage, short circuit, reverse battery and overtemperature conditions. The robustness and low quiescent current of the CS8363 makes it not only well suited for automotive microprocessor applications, but for any battery powered microprocessor applications. http://onsemi.com 1 7 D2PAK 7–PIN DPS SUFFIX CASE 936H MARKING DIAGRAM CS8363 AWLYWW Features • 2 Regulated Outputs – Standby Output 3.3 V ± 2%; 100 mA – Adjustable Tracking Output; 250 mA • Low Dropout Voltage • RESET for VSTBY • ENABLE for VTRK • Low Quiescent Current • Protection Features – Independent Thermal Shutdown – Short Circuit – 60 V Load Dump – Reverse Battery Semiconductor Components Industries, LLC, 2001 March, 2001 – Rev. 8 Pin 1. VSTBY 2. VIN 3. VTRK 4. GND 5. Adj 6. ENABLE 7. RESET A WL, L YY, Y WW, W 1 = Assembly Location = Wafer Lot = Year = Work Week ORDERING INFORMATION* Device Package Shipping CS8363YDPS7 D2PAK, 7–PIN 50 Units/Rail CS8363YDPSR7 D2PAK, 7–PIN 750 Tape & Reel *Contact your local sales representative for SO–16L package option. 1 Publication Order Number: CS8363/D CS8363 VSTBY 3.3 V, 100 mA, 2.0% VIN Overvoltage Shutdown Current Limit Bandgap RESET BG + OVSD BG – TSD OVSD VIN VTRK 250 mA Current Limit Thermal Shutdown TSD – Adj + ENABLE VSTBY – + TSD OVSD BG RESET + GND – RESET Figure 1. Block Diagram. Consult Your Local Sales Representative for Positive ENABLE Option ABSOLUTE MAXIMUM RATINGS* Rating Value Unit –16 to 26 V Positive Transient Input Voltage, tr > 1.0 ms 60 V Negative Transient Invput Voltage, T < 100 ms, 1.0 % Duty Cycle –50 V –0.3 to 10 V Junction Temperature –40 to +150 °C Storage Temperature Range –55 to +150 °C 2.0 kV 260 peak 230 peak °C °C Supply Voltage, VIN Input Voltage Range (ENABLE, RESET) ESD Susceptibility (Human Body Model) Lead Temperature Soldering Wave Solder (through hole styles only) Note 1. Reflow (SMD styles only) Note 2. 1. 10 seconds max. 2. 60 seconds max above 183°C *The maximum package power dissipation must be observed. http://onsemi.com 2 CS8363 ELECTRICAL CHARACTERISTICS (6.0 V ≤ VIN ≤ 26 V, IOUT1 = IOUT2 = 100 µA, –40°C ≤ TA ≤ +125°C; unless otherwise stated.) Characteristic Test Conditions Min Typ Max Unit –25 – +25 mV Tracking Output (VTRK) VTRK Tracking Error (VSTBY – VTRK) 6.0 V ≤ VIN ≤ 26 V, 100 µA ≤ ITRK ≤ 250 mA. Note 3. Adjust Pin Current, IAdj Loop in Regulation – 1.5 5.0 µA Line Regulation 6.0 V ≤ VIN ≤ 26 V. Note 3. – 5.0 50 mV Load Regulation 100 µA ≤ ITRK ≤ 250 mA. Note 3. – 5.0 50 mV Dropout Voltage (VIN – VTRK) ITRK = 100 µA. ITRK = 250 mA – – 100 400 150 700 mV mV Current Limit VIN = 12 V, VTRK = 3.0 V 275 500 – mA Quiescent Current VIN = 12 V, ITRK = 250 mA, No Load on VSTBY VIN = 12 V, ITRK = 500 µA, ISTBY = 100 µA – – 25 145 50 220 mA µA Reverse Current VTRK = 3.3 V, VIN = 0 V – 200 1500 µA Ripple Rejection f = 120 Hz, ITRK = 250 mA, 7.0 V ≤ VIN ≤ 17 V 60 70 – dB Output Voltage, VSTBY 4.5 V ≤ VIN ≤ 26 V, 100 µA ≤ ISTBY ≤ 100 mA. 3.234 3.3 3.366 V Line Regulation 6.0 V ≤ VIN ≤ 26 V. – 5.0 50 mV Load Regulation 100 µA ≤ ISTBY ≤ 100 mA. – 5.0 50 mV Dropout Voltage (VIN – VSTBY) ISTBY = 100 µA, VIN = 4.2 V ISTBY = 100 mA, VIN = 4.2 V – – – – 1.0 1.0 V V Current Limit VIN = 12 V, VSTBY = 3.0 V 125 200 – mA Short Circuit Current VIN = 12 V, VSTBY = 0 V 10 100 – mA Quiescent Current VIN = 12 V, ISTBY = 100 mA, ITRK = 0 mA VIN = 12 V, ISTBY = 300 µA, ITRK = 0 mA – – 10 140 20 200 mA µA Reverse Current VSTBY = 3.3 V, VIN = 0 V – 100 200 µA Ripple Rejection f = 120 Hz, ISTBY = 100 mA, 7.0 V ≤ VIN ≤ 17 V 60 70 – dB – 0.8 1.2 2.0 V –10 0 10 µA 10 50 100 mV 92.5 95 97.5 %VSTBY – – 25 µA Standby Output (VSTBY) RESET ENABLE Functions ENABLE Input Threshold ENABLE Input Bias Current VENABLE = 0 V to 10 V RESET Hysteresis RESET Threshold Low (VRL) – VSTBY Decreasing, VIN > 4.5 V RESET Leakage – Output Voltage, Low (VRLO) 1.0 V ≤ VSTBY ≤ VRL, RRST = 10 kΩ – 0.1 0.4 V Output Voltage, Low (VRPEAK) VSTBY, Power Up, Power Down – 0.6 1.0 V VIN (VRST Low) VSTBY = 3.3 V – 4.0 4.5 V 150 150 180 165 – – °C °C 30 34 38 V Protection Circuitry (Both Outputs) Independent Thermal Shutdown Overvoltage Shutdown VSTBY VTRK – 3. VTRK connected to Adj lead. VTRK can be set to higher values by using an external resistor divider. http://onsemi.com 3 CS8363 PACKAGE PIN DESCRIPTION PACKAGE PIN # D2PAK PIN SYMBOL 1 VSTBY 2 VIN 3 VTRK Tracking output voltage controlled by ENABLE delivering 250 mA. 4 GND Reference ground connection. 5 Adj 6 ENABLE 7 RESET FUNCTION Standby output voltage delivering 100 mA. Input voltage. Resistor divider from VTRK to Adj. Sets the output voltage on VTRK. If tied to VTRK, VTRK will track VSTBY. Provides on/off control of the tracking output, active LOW. CMOS compatible output lead that goes low whenever VSTBY falls out of regulation. CIRCUIT DESCRIPTION ENABLE Function VTRK Output Voltage The ENABLE function switches the output transistor for VTRK on and off. When the ENABLE lead voltage exceeds 1.4 V (typ), VTRK turns off. This input has several hundred millivolts of hysteresis to prevent spurious output activity during power–up or power–down. This output uses the same type of output device as VSTBY, but is rated for 250 mA. The output is configured as a tracking regulator of the standby output. By using the standby output as a voltage reference, giving the user an external programming lead (Adj lead), output voltages from 3.3 V to 20 V are easily realized. The programming is done with a simple resistor divider, and following the formula: RESET Function The RESET is an open collector NPN transistor, controlled by a low voltage detection circuit sensing the VSTBY (3.3 V) output voltage. This circuit guarantees the RESET output stays below 1.0 V (0.1 V typ) when VSTBY is as low as 1.0 V to ensure reliable operation of microprocessor–based systems. VTRK VSTBY (1 R1R2) IAdj R1 If another 3.3 V output is needed, simply connect the Adj lead to the VTRK output lead. 3.3 V, 100 mA B+ C1* 0.1 µF VSTBY VIN CS8363 C2** 10 µF ESR < 8.0 Ω R3 RESET VDD MCU RESET I/O ENABLE R2 Adj R1 GND SW 5.0 V, 250 mA C3** 10 µF ESR < 8.0 Ω VTRK VTRK ∼ VSTBY(1 + R1/R2) For VTRK ∼ 5.0 V, R1/R2 ∼ 0.5 *C1 is required if regulator is located far from power supply filter. **C2 and C3 are required for stability. Figure 2. Test and Application Circuit, 3.3 V, 5.0 V Regulator http://onsemi.com 4 GND CS8363 3.3 V, 100 mA B+ C1* 0.1 µF VSTBY VIN CS8363 VDD C2** 10 µF ESR < 8.0 Ω R3 RESET MCU RESET I/O ENABLE Adj GND SW 3.3 V, 250 mA C3** 10 µF ESR < 8.0 Ω VTRK GND *C1 is required if regulator is located far from power supply filter. **C2 and C3 are required for stability. Figure 3. Test and Application Circuit, Dual 3.3 V Regulator APPLICATION NOTES External Capacitors IOUT2(max) is the maximum output current, for the application, and IQ is the quiescent current the regulator consumes at both IOUT1(max) and IOUT2(max). Once the value of PD(max) is known, the maximum permissible value of RΘJA can be calculated: Output capacitors for the CS8363 are required for stability. Without them, the regulator outputs will oscillate. Actual size and type may vary depending upon the application load and temperature range. Capacitor effective series resistance (ESR) is also a factor in the IC stability. Worst–case is determined at the minimum ambient temperature and maximum load expected. Output capacitors can be increased in size to any desired value above the minimum. One possible purpose of this would be to maintain the output voltages during brief conditions of negative input transients that might be characteristic of a particular system. Capacitors must also be rated at all ambient temperatures expected in the system. To maintain regulator stability down to –40°C, capacitors rated at that temperature must be used. More information on capacitor selection for SMART REGULATORs is available in the SMART REGULATOR application note, “Compensation for Linear Regulators,” document number SR003AN/D, available through the Literature Distribution Center or via our website at http://www.onsemi.com. RJA 150°C TA PD (2) The value of RΘJA can be compared with those in the package section of the data sheet. Those packages with RΘJA’s less than the calculated value in equation 2 will keep the die temperature below 150°C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required. IIN VIN SMART REGULATOR Control Features Calculating Power Dissipation in a Dual Output Linear Regulator The maximum power dissipation for a dual output regulator (Figure 4) is IOUT1 VOUT1 IOUT2 VOUT2 IQ PD(max) VIN(max) VOUT1(min)IOUT1(max) VIN(max) VOUT2(min)IOUT2(max) VIN(max)IQ (1) Figure 4. Dual Output Regulator With Key Performance Parameters Labeled. where: VIN(max) is the maximum input voltage, VOUT1(min) is the minimum output voltage from VOUT1, VOUT2(min) is the minimum output voltage from VOUT2, IOUT1(max) is the maximum output current, for the application, Heat Sinks A heat sink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. http://onsemi.com 5 CS8363 RΘCS = the case–to–heatsink thermal resistance, and RΘSA = the heatsink–to–ambient thermal resistance. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RΘJA: RJA RJC RCS RSA RΘJC appears in the package section of the data sheet. Like RΘJA, it too is a function of package type. RΘCS and RΘSA are functions of the package type, heatsink and the interface between them. These values appear in heat sink data sheets of heat sink manufacturers. (3) where: RΘJC = the junction–to–case thermal resistance, http://onsemi.com 6 CS8363 PACKAGE DIMENSIONS D2PAK 7–PIN DPS SUFFIX CASE 936H–01 ISSUE O –T– SEATING PLANE B M NOTES: 1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS B AND M. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH OR GATE PROTRUSIONS. MOLD FLASH AND GATE PROTRUSIONS NOT TO EXCEED 0.025 (0.635) MAX. U C E 8 V DIM A B C D E F G H J K M N U V A 1 2 34 5 6 7 K F G D H 7 PL 0.13 (0.005) M T B J M INCHES MIN MAX 0.326 0.336 0.396 0.406 0.170 0.180 0.026 0.036 0.045 0.055 0.058 0.078 0.050 BSC 0.100 0.110 0.018 0.025 0.204 0.214 0.055 0.066 0.000 0.004 0.256 REF 0.305 REF N PACKAGE THERMAL DATA Parameter D2PAK, 7–Pin Unit RΘJC Typical 3.5 °C/W RΘJA Typical 10–50* °C/W *Depending on thermal properties of substrate. RΘJA = RΘJC + RΘCA. http://onsemi.com 7 MILLIMETERS MIN MAX 8.28 8.53 10.05 10.31 4.31 4.57 0.66 0.91 1.14 1.40 1.41 1.98 1.27 BSC 2.54 2.79 0.46 0.64 5.18 5.44 1.40 1.68 0.00 0.10 6.50 REF 7.75 REF CS8363 SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLIC). ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. 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