CS8321 Micropower 5.0 V, 150 mA Low Dropout Linear Regulator The CS8321 is a precision 5.0 V micropower voltage regulator with very low quiescent current (140 µA typ at 1.0 mA load). The 5.0 V output is accurate within ±2% and supplies 150 mA of load current with a typical dropout voltage of only 300 mV. This combination of low quiescent current and outstanding regulator performance makes the CS8321 ideal for any battery operated equipment. The regulator is protected against reverse battery and short circuit conditions. The device can withstand 45 V load dump transients making it suitable for use in automotive environments. http://onsemi.com TO–220 THREE LEAD T SUFFIX CASE 221A 1 Features • 5.0 V ± 2% Output • Low 140 µA (typ) Quiescent Current • 150 mA Output Current Capability • Fault Protection – –15 V Reverse Voltage Output Current Limit • Low Reverse Current (Output to Input) 12 2 Pin 1. VIN 2. GND 3. VOUT 3 D2PAK 3–PIN DP SUFFIX CASE 418E 3 MARKING DIAGRAMS VOUT D2PAK TO–220 VIN Current Source (Circuit Bias) CS8321 AWLYWW QP R CS8321 AWLYWW QN 1 Current Limit Sense 1 VOUTSENSE* A WL, L YY, Y WW, W + – Error Amplifier = Assembly Location = Wafer Lot = Year = Work Week R1 Bandgap Reference ORDERING INFORMATION* Device R2 GND *Lead Shorted to VOUT in 3–Pin Applications Figure 1. Block Diagram Package Shipping CS8321YT3 TO–220 THREE LEAD 50 Units/Rail CS8321YDP3 D2PAK, 3–PIN 50 Units/Rail CS8321YDPR3 D2PAK, 3–PIN 750 Tape & Reel *Contact your local sales representative for SO–16, DIP–16, SO–8, and DIP–8 package options. Semiconductor Components Industries, LLC, 2001 March, 2001 – Rev. 3 1 Publication Order Number: CS8321/D CS8321 ABSOLUTE MAXIMUM RATINGS* Rating Value Unit –15, 45 V Internally Limited – 2.0 kV Junction Temperature –40 to 150 °C Storage Temperature –65 to 150 °C 260 peak 230 peak °C °C Transient Input Voltage Output Current ESD Susceptibility (Human Body Model) Lead Temperature Soldering Wave Solder (through hole styles only) Note 1. Reflow (SMD styles only) Note 2. 1. 10 seconds max. 2. 60 seconds max above 183°C *The maximum package power dissipation must be observed. ELECTRICAL CHARACTERISTICS (6.0 V < VIN < 26 V, IOUT = 1.0 mA, –40°C ≤ TA ≤ 125°C, –40°C ≤ TJ ≤ 150°C; unless otherwise specified.) Characteristic Test Conditions Min Typ Max Unit 4.9 5.0 5.1 V Output Stage Output Voltage, VOUT 9.0 V < VIN 16 V, 100 mA ≤ IOUT ≤ 150 mA Dropout Voltage (VIN – VOUT) IOUT = 150 mA, –40°C ≤ TA ≤ 85°C IOUT = 150 mA, TA = 125°C – – 0.3 – 0.5 0.6 V V Quiescent Current, (IQ) IOUT = 1.0 mA @ VIN = 13 V IOUT < 50 mA @ VIN = 13 V IOUT < 150 mA @ VIN = 13 V – – – – 4.0 15 200 6.0 25 µA mA mA Load Regulation VIN = 14 V, 100 µA < IOUT < 150 mA – 5.0 50 mV Line Regulation 6.0 V ≤ V ≤ 26 V, IOUT = 1.0 mA – 5.0 50 mV Ripple Rejection 7.0 ≤ VIN ≤ 17 V, IOUT = 150 mA, f = 120 Hz 60 75 – dB 175 250 – mA Current Limit – Short Circuit Output Current VOUT = 0 V 60 200 – mA Reverse Current VOUT = 5.0 V, VIN = 0 V – 140 200 µA PACKAGE PIN DESCRIPTION PACKAGE PIN # TO–220 D2PAK PIN SYMBOL 1 1 VIN 2 2 GND Ground. All GND leads must be connected to ground. 3 3 VOUT 5.0 V, ±2%, 150 mA Output. FUNCTION Input voltage. http://onsemi.com 2 CS8321 CIRCUIT DESCRIPTION AND APPLICATION NOTES VOLTAGE REFERENCE AND OUTPUT CIRCUITRY 0.34257 The CS8321 is a series pass voltage regulator. It consists of an error amplifier, bandgap voltage reference, PNP pass transistor with antisaturation control, and current limit. As the voltage at the input, VIN, is increased (Figure 1), QN is forward biased via R. QN provides base drive for QP. As QP becomes forward biased, the output voltage, VOUT, begins to rise as QP’s output current charges the output capacitor. Once VOUT rises to a certain level, the error amplifier becomes biased and provides the appropriate amount of base current to QP. The error amplifier monitors the scaled output voltage via an internal voltage divider, R1 and R2, and compares it to the bandgap voltage reference. The error amplifier’s output is a current which is equal to the error amplifier’s differential input voltage times its transconductance. Therefore, the error amplifier varies the base drive current to QN, which provides bias to QP, based on the difference between the reference voltage and the scaled output voltage, VOUT. 0.30831 0.27405 Load Current 0.23980 0.17128 0.13703 0.10277 0.06851 0.03426 Curve will vary with temperature and process variation. 0.0 0.0 0.51 1.02 1.52 2.03 2.54 3.05 3.56 4.06 4.57 5.08 Output Voltage Figure 3. Typical Current Limit and Fold Back Waveform The capacitor value and type should be based on cost, availability, size and temperature constraints. A tantalum or aluminum electrolytic capacitor is best, since a film or ceramic capacitor with almost zero ESR can cause instability. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (–25°C to –40°C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturers data sheet usually provides this information. The value for the output capacitor COUT shown in Figure 4 should work for most applications, however it is not necessarily the best solution. Antisaturation Protection An antisaturation control circuit has also been added to prevent the pass transistor from going into deep saturation, which would cause excessive power dissipation due to large bias currents lost to the substrate via a parasitic PNP transistor, as shown in Figure 2. VIN QP QParasitic 0.20554 VIN VOUT VOUT CIN* 0.1 µF Substrate CS8312 COUT** 0.1 µF VOUTSense† Figure 2. The Parasitic PNP Transistor Which Is Part of the Pass Transistor (QP) Structure Current Limit Limit The output stage is protected against short circuit conditions. As shown in Figure 3, the output current will fold back when the faulted load is continually increased. This technique has been incorporated to limit the total power dissipation across the device during a short circuit condition, since the device does not contain overtemperature shutdown. *CIN required if regulator is located far from the power supply filter. **COUT required for stability. Capacitor must operate at minimum temperature expected. †Pin internally shorted to VOUT in 3–pin applications. Figure 4. Test and Application Circuit Showing Output Compensation STABILITY CONSIDERATIONS The output or compensation capacitor helps determine three main characteristics of a linear regulator: start–up delay, load transient response and loop stability. To determine an acceptable value for COUT for a particular application, start with a tantalum capacitor of the http://onsemi.com 3 CS8321 recommended value and work towards a less expensive alternative part. Step 1: Place the completed circuit with a tantalum capacitor of the recommended value in an environmental chamber at the lowest specified operating temperature and monitor the outputs with an oscilloscope. A decade box connected in series with the capacitor will simulate the higher ESR of an aluminum capacitor. Leave the decade box outside the chamber, the small resistance added by the longer leads is negligible. Step 2: With the input voltage at its maximum value, increase the load current slowly from zero to full load while observing the output for any oscillations. If no oscillations are observed, the capacitor is large enough to ensure a stable design under steady state conditions. Step 3: Increase the ESR of the capacitor from zero using the decade box and vary the load current until oscillations appear. Record the values of load current and ESR that cause the greatest oscillation. This represents the worst case load conditions for the regulator at low temperature. Step 4: Maintain the worst case load conditions set in step 3 and vary the input voltage until the oscillations increase. This point represents the worst case input voltage conditions. Step 5: If the capacitor is adequate, repeat steps 3 and 4 with the next smaller valued capacitor. A smaller capacitor will usually cost less and occupy less board space. If the output oscillates within the range of expected operating conditions, repeat steps 3 and 4 with the next larger standard capacitor value. Step 6: Test the load transient response by switching in various loads at several frequencies to simulate its real working environment. Vary the ESR to reduce ringing. Step 7: Raise the temperature to the highest specified operating temperature. Vary the load current as instructed in step 5 to test for any oscillations. Once the minimum capacitor value with the maximum ESR is found, a safety factor should be added to allow for the tolerance of the capacitor and any variations in regulator performance. Most good quality aluminum electrolytic capacitors have a tolerance of ±20% so the minimum value found should be increased by at least 50% to allow for this tolerance plus the variation which will occur at low temperatures. The ESR of the capacitor should be less than 50% of the maximum allowable ESR found in step 3 above. VIN(max) is the maximum input voltage, VOUT(min) is the minimum output voltage, IOUT(max) is the maximum output current for the application, and IQ is the quiescent current the regulator consumes at IOUT(max). Once the value of PD(max) is known, the maximum permissible value of RΘJA can be calculated: RJA 150°C TA PD The value of RΘJA can then be compared with those in the package section of the data sheet. Those packages with RΘJA’s less than the calculated value in equation 2 will keep the die temperature below 150°C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required. IIN VIN IOUT VOUT CS8312 IQ Figure 5. Single Output Regulator with Key Performance Parameters Labeled HEATSINKS A heatsink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RΘJA: RJA RJC RCS RSA (3) where: RΘJC = the junction–to–case thermal resistance, RΘCS = the case–to–heatsink thermal resistance, and RΘSA = the heatsink–to–ambient thermal resistance. RΘJC appears in the package section of the data sheet. Like RΘJA, it too is a function of package type. RΘCS and RΘSA are functions of the package type, heatsink and the interface between them. These values appear in heatsink data sheets of heatsink manufacturers. CALCULATING POWER DISSIPATION IN A SINGLE OUTPUT LINEAR REGULATOR The maximum power dissipation for a single output regulator (Figure 5) is: PD(max) (VIN(max) VOUT(min))IOUT(max) VIN(max)IQ (2) (1) where: http://onsemi.com 4 CS8321 PACKAGE DIMENSIONS TO–220 THREE LEAD T SUFFIX CASE 221A–09 ISSUE AA SEATING PLANE –T– B C F T S 4 DIM A B C D F G H J K L N Q R S T U V Z A Q 1 2 3 U H K Z L R V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. J G D N INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.018 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ----0.080 MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.46 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ----2.04 D2PAK 3–PIN DP SUFFIX CASE 418E–01 ISSUE O –T– SEATING PLANE B M C E NOTES: 1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 4 DIM A B C D E F G H J K L M N A 1 2 3 K F H G D 0.13 (0.005) M 3 PL T B J L M N http://onsemi.com 5 INCHES MIN MAX 0.326 0.336 0.396 0.406 0.170 0.180 0.026 0.036 0.045 0.055 0.090 0.110 0.100 BSC 0.098 0.108 0.018 0.025 0.204 0.214 0.045 0.055 0.055 0.066 0.000 0.004 MILLIMETERS MIN MAX 8.28 8.53 10.05 10.31 4.31 4.57 0.66 0.91 1.14 1.40 2.29 2.79 2.54 BSC 2.49 2.74 0.46 0.64 5.18 5.44 1.14 1.40 1.40 1.68 0.00 0.10 CS8321 PACKAGE THERMAL DATA Parameter TO–220 D2PAK Unit RΘJC Typical 3.5 1.0* °C/W RΘJA Typical 50 10–50† °C/W *Depending on die area. †Depending on thermal properties of substrate. RΘJA = RΘJC + RΘCA. http://onsemi.com 6 CS8321 Notes http://onsemi.com 7 CS8321 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: [email protected] Fax Response Line: 303–675–2167 or 800–344–3810 Toll Free USA/Canada N. American Technical Support: 800–282–9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor – European Support German Phone: (+1) 303–308–7140 (Mon–Fri 2:30pm to 7:00pm CET) Email: ONlit–[email protected] French Phone: (+1) 303–308–7141 (Mon–Fri 2:00pm to 7:00pm CET) Email: ONlit–[email protected] English Phone: (+1) 303–308–7142 (Mon–Fri 12:00pm to 5:00pm GMT) Email: [email protected] CENTRAL/SOUTH AMERICA: Spanish Phone: 303–308–7143 (Mon–Fri 8:00am to 5:00pm MST) Email: ONlit–[email protected] Toll–Free from Mexico: Dial 01–800–288–2872 for Access – then Dial 866–297–9322 ASIA/PACIFIC: LDC for ON Semiconductor – Asia Support Phone: 1–303–675–2121 (Tue–Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001–800–4422–3781 Email: ONlit–[email protected] JAPAN: ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031 Phone: 81–3–5740–2700 Email: [email protected] ON Semiconductor Website: http://onsemi.com EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781 *Available from Germany, France, Italy, UK, Ireland For additional information, please contact your local Sales Representative. http://onsemi.com 8 CS8321/D