19-1720; Rev 0; 4/00 Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SOT23 The MAX5222’s ultra-low power consumption and tiny 8-pin SOT23 package make it ideal for portable and battery-powered applications. Supply current is less than 1mA and drops below 1µA in shutdown mode. In addition, the reference input is disconnected from the REF pin during shutdown, further reducing the system’s total power consumption. Features ♦ Operates from a Single +2.7V to +5.5V Supply ♦ Tiny 8-Pin SOT23 Package (3mm ✕ 3mm) ♦ Dual Buffered Voltage Output ♦ Low Power Consumption 0.4mA Operating Current <1µA Shutdown Current ♦ Programmable Shutdown Mode ♦ 25MHz, 3-Wire Serial Interface ♦ SPI, QSPI, and MICROWIRE Compatible Ordering Information PART MAX5222EKA-T TEMP. RANGE -40°C to +85°C PIN-PACKAGE 8 SOT23-8 Functional Diagram ________________________Applications Digital Gain and Offset Adjustment Programmable Current Source Programmable Voltage Source 0.22µF 0.1µF (OPTIONAL) Power-Amp Bias Control 8 DIN VCO Tuning 3 VDD 7 REF SCLK 4 OUTA VOUTA TOP VIEW CS 1 8 DIN 7 REF VDD 3 6 OUTB SCLK 4 5 OUTA GND 2 MAX5222 CS 1 16-BIT SHIFT REGISTER CONTROL (8) DATA (8) Pin Configuration DAC LATCH A 5 DAC A DAC LATCH B OUTB VOUTB 6 DAC B MAX5222 2 GND SOT23-8 SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. ________________________________________________________________ Maxim Integrated Products 1 For free samples and the latest literature, visit www.maxim-ic.com or phone 1-800-998-8800. For small orders, phone 1-800-835-8769. MAX5222 General Description The MAX5222 contains two 8-bit, buffered, voltage-output digital-to-analog converters (DAC A and DAC B) in a small 8-pin SOT23 package. Both DAC outputs can source and sink 1mA to within 100mV of ground and VDD. The MAX5222 operates with a single +2.7V to +5.5V supply. The device uses a 3-wire serial interface, which operates at clock rates up to 25MHz and is compatible with SPI™, QSPI™, and MICROWIRE™ interface standards. The serial input shift register is 16 bits long and consists of 8 bits of DAC input data and 8 bits for DAC selection and shutdown control. DAC registers can be loaded independently or in parallel at the positive edge of CS. MAX5222 Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SOT23 ABSOLUTE MAXIMUM RATINGS VDD to GND ............................................................. -0.3V to +6V All Other Pins to GND (Note 1).................. -0.3V to (VDD + 0.3V) Continuous Power Dissipation (TA = +70°C) 8-Pin SOT23 (derate 8.7mW/°C above +70°C)............696mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Note 1: The outputs may be shorted to VDD or GND if the package power dissipation is not exceeded. Typical short-circuit current to GND is 70mA. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD = +2.7V to +5.5V, REF = VDD, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC PERFORMANCE Resolution N 8 Bits Differential Nonlinearity DNL Guaranteed monotonic ±0.3 ±1 LSB Integral Nonlinearity INL (Note 2) ±0.3 ±1 LSB Total Unadjusted Error TUE (Note 2) ±1 LSB Zero-Code Offset VZS 10 mV Zero-Code Temperature Coefficient TCVZS 100 µV/°C Power-Supply Rejection Ratio PSRR 4.5V ≤ VDD ≤ 5.5V, VREF = 4.096V 0.15 2.7V ≤ VDD ≤ 3.6V, VREF = 2.4V 0.5 mV/V REFERENCE INPUT Reference Input Voltage Range GND Reference Input Capacitance Reference Input Resistance RREF (Note 3) 8 Reference Input Resistance (Shutdown Mode) VDD V 25 pF 16 kΩ 2 MΩ DAC OUTPUTS Output Voltage Range 0 Capacitive Load at OUT_ Output Resistance REF V 100 pF Ω 50 DIGITAL INPUTS Input High Voltage VIH Input Low Voltage VIL Input Current IIN VIN = 0 or VDD Input Capacitance CIN (Note 4) 2 0.7 x VDD V 0.3 x VDD 0.1 _______________________________________________________________________________________ V ±10 µA 10 pF Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SOT23 MAX5222 ELECTRICAL CHARACTERISTICS (continued) (VDD = +2.7V to +5.5V, REF = VDD, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DYNAMIC PERFORMANCE Voltage-Output Slew Rate CL = 100pF 1 V/µs Voltage-Output Settling Time SR To ±1⁄2LSB, CL = 100pF 10 µs Digital Feedthrough and Crosstalk All 0s to all 1s 0.25 nV-s POWER SUPPLY Supply Voltage Range VDD Supply Current IDD Shutdown Supply Current 2.7 All inputs = 0 5.5 VDD = 5.5V 0.55 1 VDD = 3.6V 0.38 0.8 VDD = 5.5V 0.1 V mA µA TIMING CHARACTERISTICS (Figure 3, VDD = +2.7V to +5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 4) PARAMETER SERIAL INTERFACE TIMING –—– CS Fall to SCLK Rise Setup Time –—– SCLK Rise to CS Rise Setup Time SYMBOL CONDITIONS MIN TYP MAX UNITS tCSS 50 ns tCSH 50 ns DIN to SCLK Rise Setup Time tDS 20 ns DIN to SCLK Rise Hold Time tDH 20 ns SCLK Pulse Width High tCH 20 ns SCLK Pulse Width Low –—– CS Pulse Width High tCL 20 ns tCSPWH 50 ns Note 2: Reduced digital code range (code 24 through code 232) is due to swing limitations of the output amplifiers. See Typical Operating Characteristics. Note 3: Reference input resistance is code dependent. The lowest input resistance occurs at code 55hex. See the Reference Input section. Note 4: Guaranteed by design. Not production tested. _______________________________________________________________________________________ 3 __________________________________________Typical Operating Characteristics (VDD = +3V, TA = +25°C, unless otherwise noted.) 3.0 OUTPUT VOLTAGE vs. OUTPUT SINK CURRENT 800 MAX5222-02 6 MAX5222-01 3.5 OUTPUT VOLTAGE vs. OUTPUT SOURCE CURRENT (VDD = 5V) 5 MAX5222-03 OUTPUT VOLTAGE vs. OUTPUT SOURCE CURRENT (VDD = 3V) 700 2.0 1.5 1.0 OUTPUT VOLTAGE (mV) 2.5 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 600 4 3 2 500 400 300 200 100 1 0.5 0 0.01 0.1 1 10 0 0.0001 100 0.01 1 -100 0.0001 100 0.001 0.01 0.1 1 10 OUTPUT SOURCE CURRENT (mA) OUTPUT SOURCE CURRENT (mA) OUTPUT SINK CURRENT (mA) INTEGRAL NONLINEARITY vs. DIGITAL CODE DIFFERENTIAL NONLINEARITY vs. DIGITAL CODE POSITIVE SUPPLY CURRENT vs. SUPPLY VOLTAGE 0.2 0.6 0.15 MAX5222-06 0.20 MAX5222-04 0.3 MAX5222-05 0 0.001 0.5 0.10 0.4 0 IDD (mA) 0.05 DNL (LSB) INL (LSB) 0.1 0 -0.05 -0.1 0.3 0.2 -0.10 -0.2 0.1 -0.15 -0.20 -0.3 50 100 150 200 250 0 0 300 100 50 150 200 250 300 4 5 VDD (V) POSITIVE SUPPLY CURRENT vs. TEMPERATURE SHUTDOWN SUPPLY CURRENT vs. SUPPLY VOLTAGE REFERENCE SMALL-SIGNAL FREQUENCY RESPONSE IDD (µA) 0.50 0.3 0.2 0.45 0.1 0.40 50 TEMPERATURE (°C) 100 -5 -10 -15 -20 0 0 0 RELATIVE OUTPUT (dB) 0.5 0.4 0.55 5 MAX5222-09 MAX5222-07 0.6 0.60 4 3 CODE 0.65 -50 2 CODE MAX5222-08 0 IDD (mA) MAX5222 Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SOT23 -25 2 3 4 SUPPLY VOLTAGE (V) 5 6 0.1 1 10 100 FREQUENCY (kHz) _______________________________________________________________________________________ 1000 10,000 Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SOT23 LARGE-SIGNAL OUTPUT STEP RESPONSE CLOCK FEEDTHROUGH MAX5222-10 MAX5222-11 VREF = VDD = 3V, RL = 10kΩ, CL = 100pF CH1 CH1 SCLK, 5MHz 0 TO 2.9V 5V/div CH2 OUT_ 10mV/div AC-COUPLED CS 2V/div CH2 OUT_ 1V/div CS = HIGH, SCLK = 5MHz 2µs/div 50ns/div POWER-UP OUTPUT GLITCH POWER-UP OUTPUT GLITCH MAX5222-12 MAX5222-13 CH1 VDD 1V/div CH1 VDD 1V/div CH2 OUT_ 50mV/div CH2 OUT_ 50mV/div 100µs/div 2ms/div VDD = CHANGES BETWEEN 0 AND 5V RAMP TIME IS 10µs VDD = CHANGES BETWEEN 0 AND 5V RAMP TIME IS 1ms _______________________________________________________________________________________ 5 MAX5222 Typical Operating Characteristics (continued) (VDD = +3V, TA = +25°C, unless otherwise noted.) MAX5222 Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SOT23 Typical Operating Characteristics (continued) (VDD = +3V, TA = +25°C, unless otherwise noted.) NEGATIVE SETTLING TIME POSITIVE SETTLING TIME MAX5222-14 MAX5222-15 VDD = 3V, REF = VDD, RL = 10kΩ, CL = 100pF ALL BITS OFF TO ALL BITS ON CH1 OUT_ 200mV/div AC-COUPLED CH2 CS 2V/div CH1 CS 2V/div CH2 OUT_ 200mV/div VDD = 3V, REF = VDD, RL = 10kΩ, CL = 100pF ALL BITS OFF TO ALL BITS ON 1µs/div 1µs/div OUTPUT VOLTAGE NOISE (DC TO 1MHz) MAX5222-16 OUTA 2mV/div AC-COUPLED CH1 VDD = 3V, REF = VDD, NO LOAD, DIGITAL CODE = FF 2ms/div 6 _______________________________________________________________________________________ Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SOT23 PIN NAME FUNCTION 1 –—– CS Chip Select, Active Low. Enables data to be shifted into the 16-bit shift register. Programming commands –—– are executed at the rising edge of C S. 2 GND Ground 3 VDD Positive Power Supply (+2.7V to +5.5V). Bypass with 0.22µF to GND. 4 SCLK Serial Clock Input. Data is clocked in on the rising edge of SCLK. 5 OUTA DAC A Output Voltage (Buffered) 6 OUTB DAC B Output Voltage (Buffered) 7 REF Reference Input for DAC A and DAC B 8 DIN Serial Data Input of the 16-bit Shift Register. Data is clocked into the register on the rising edge of SCLK. Detailed Description Analog Section The MAX5222 contains two 8-bit, voltage-output DACs. The DACs are “inverted” R-2R ladder networks using complementary switches that convert 8-bit digital inputs into equivalent analog output voltages in proportion to the applied reference voltage. The MAX5222 has one reference input that is shared by DAC A and DAC B. The device includes output buffer amplifiers for both DACs and input logic for simple microprocessor (µP) and CMOS interfaces. The power-supply range is from +5.5V down to +2.7V. Reference Input and DAC Output Range The voltage at REF sets the full-scale output of the DACs. The input impedance of the REF input is code dependent. The lowest value, approximately 8kΩ, occurs when the input code is 01010101 (55hex). The maximum value of infinity occurs when the input code is zero. In shutdown mode, the selected DAC output is set to zero, while the value stored in the DAC register remains unchanged. This removes the load from the reference input to save power. Bringing the MAX5222 out of shutdown mode restores the DAC output voltage. Because the input resistance at REF is code dependent, the DAC’s reference source should have an output impedance of no more than 5Ω. The input capacitance at the REF pin is also code dependent and typically does not exceed 25pF. The reference voltage on REF can range anywhere from GND to VDD. See the Output Buffer Amplifier section for more information. Figure 1 is the DAC simplified circuit diagram. Output Buffer Amplifiers DAC A and DAC B voltage outputs are internally buffered. The buffer amplifiers have a Rail-to-Rail ® (GND to VDD) output voltage range. Both DAC output amplifiers can source and sink up to 1mA of current. See the INL vs. Digital Code graph in the Typical Operating Characteristics. The amplifiers are unity-gain stable with a capacitive load of 100pF or smaller. The slew rate is typically 1V/µs. Shutdown Mode When programmed to shutdown mode, the outputs of DAC A and DAC B are passively pulled to GND with a series 5kΩ resistor. In shutdown mode, the REF input is high impedance (2MΩ typical) to conserve current drain from the system reference; therefore, the system reference does not have to be powered down. Coming out of shutdown, the DAC outputs return to the values kept in the registers. The recovery time is equivalent to the DAC settling time. Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd. _______________________________________________________________________________________ 7 MAX5222 ______________________________________________________________Pin Description MAX5222 Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SOT23 R 2R 2R R 2R R 2R OUT 2R DATA BITS Table 1. Input Shift Register SHOWN FOR ALL 1s ON DAC Figure 1. DAC Simplified Circuit Diagram Serial Interface –—– An active-low chip select (CS) enables the shift register to receive data from the serial data input. Data is clocked into the shift register on every rising edge of the serial clock signal (SCLK). The clock frequency can be as high as 25MHz. Data is sent most significant bit (MSB) first and can be transmitted in one 16-bit word. The write cycle can be –—– segmented when CS is kept active (low) to allow, for example, two 8-bit-wide transfers. After clocking all –16 —– bits into the input shift register, the rising edge of CS updates the DAC outputs and the shutdown status. Because of their single buffered structure, DACs cannot be simultaneously updated to different digital values. 8 CONTROL BITS REF GND B0* DAC Data Bit 0 (LSB) B1 DAC Data Bit 1 B2 DAC Data Bit 2 B3 DAC Data Bit 3 B4 DAC Data Bit 4 B5 DAC Data Bit 5 B6 DAC Data Bit 6 B7 DAC Data Bit 7 (MSB) LA Load Reg DAC A, Active High LB Load Reg DAC B, Active High UB4 Uncommitted Bit 4 SA Shut Down, Active High SB Shut Down, Active High UB3 Uncommitted Bit 3 UB2 Uncommitted Bit 2 UB1** Uncommitted Bit 1 *Clocked in last. **Clocked in first. Serial-Input Data Format and Control Codes Table 2 lists the serial-input data format. The 16-bit input word consists of an 8-bit control byte and an 8-bit data byte. The 8-bit control byte is not decoded internally. Every control bit performs one function. Data is clocked in starting with UB1 (uncommitted bit), followed by the remaining control bits and the data byte. The least significant bit (LSB) of the data byte (B0) is the last bit clocked into the shift register (Figure 2). Table 3 is an example of a 16-bit input word. It performs the following functions: • 80 hex (128 decimal) loaded into DAC registers A and B. • DAC A and DAC B are active. _______________________________________________________________________________________ Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SOT23 MAX5222 CS INSTRUCTION EXECUTED SCLK OPTIONAL DIN UB1 UB2 UB3 SB SA UB4 LB LA D7 D6 D5 (CONTROL BYTE) D4 D3 D2 D1 D0 (DATA BYTE) Figure 2. 3-Wire Serial-Interface Timing Diagram Table 2. Serial-Interface Programming Commands CONTROL UB1 UB2 UB3 SB X X 1 X X 1 X X 1 X X 1 X X X X DATA SA UB4 LB LA B7 B6 MSB X X B5 B4 B3 B2 B1 B0 LSB X X X X X X FUNCTION * * * * * 0 0 0 0 0 0 0 1 0 8-Bit DAC Data Load Register to DAC B 0 0 1 8-Bit DAC Data Load Register to DAC A 1 * * * * * No Operation to DAC Registers 0 1 1 8-Bit DAC Data Load Both DAC Registers X 1 0 0 0 X 1 0 0 0 X X 1 1 0 0 X X 1 0 1 0 X X 1 1 1 0 * * * * * * * * * * Unassigned Command X X X X X X X X All DACs Active X X X X X X X X Unassigned Command X X X X X X X X Shut Down X X X X X X X X Shut Down X X X X X X X X Shut Down X = Don’t care. * = Not shown, for the sake of clarity. The functions of loading and shutting down the DACs and programming the logic can be combined in a single command. Table 3. Example of a 16-Bit Input Word LOADED IN FIRST LOADED IN LAST UB1 UB2 UB3 SB SA UB4 LB LA B7 B6 B5 B4 B3 B2 B1 B0 X X 1 0 0 0 1 1 1 0 0 0 0 0 0 0 _______________________________________________________________________________________ 9 MAX5222 Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SOT23 CS tCSPWH tCSS tCSH tCH SCLK tCL tDS tDH DIN Figure 3. Detailed Serial-Interface Timing Diagram Digital Inputs The digital inputs are compatible with CMOS logic. Supply current increases slightly when toggling the logic inputs through the transition zone between 0.3 ✕ VDD and 0.7 ✕ VDD. Microprocessor Interfacing The MAX5222 serial interface is compatible with MICROWIRE, SPI, and QSPI. For SPI, clear the CPOL and CPHA bits (CPOL = 0 and CPHA = 0). CPOL = 0 sets the inactive clock state to zero, and CPHA = 0 changes data at the falling edge of SCLK. This setting allows SPI to run at full clock speeds. If a serial port is not available on your µP, 3 bits of a parallel port can be used to emulate a serial port by bit manipulation. Minimize digital feedthrough at the voltage outputs by operating the serial clock only when necessary. Table 4. Code Table DAC CONTENTS ANALOG OUTPUT B7 B6 B5 B4 B3 B2 B1 B0 1 1 1 1 1 1 1 1 255 +REF × 256 1 0 0 0 0 0 0 1 129 +REF × 256 1 0 0 0 0 0 0 0 128 REF +REF × = + 2 256 0 1 1 1 1 1 1 1 127 +REF × 256 0 0 0 0 0 0 0 1 1 +REF × 256 0 0 0 0 0 0 0 0 0V Note: 1 1LSB = REF × 2−8 = REF × 256 D where D = decimal ANALOG OUTPUT = REF × 256 value of digital input 10 ______________________________________________________________________________________ Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SOT23 MAX5222 Applications Information The MAX5222 is specified for single-supply operation with VDD ranging from 2.7V to 5.5V, covering all commonly used supply voltages in 3V and 5V systems. Initialization An internal power-on reset circuit forces the outputs to zero scale and initializes all external registers to zero. This is equivalent to being in the shutdown state. Therefore, at power-up, perform an initial write operation to set the outputs to the desired voltage. Power-Supply and Ground Management GND should be connected to the highest quality ground available. Bypass VDD with a 0.1µF to 0.22µF capacitor to GND. The reference input can be used without bypassing. For optimum line/load-transient response and noise performance, bypass the reference input with 0.1µF to 4.7µF to GND. Careful PC board layout minimizes crosstalk among DAC outputs, the reference, and digital inputs. Separate analog lines with ground traces between them. Make sure that highfrequency digital lines are not routed in parallel to analog lines. Chip Information TRANSISTOR COUNT: 1480 PROCESS TECHNOLOGY: BiCMOS ______________________________________________________________________________________ 11 ________________________________________________________Package Information SOT23, 8L.EPS MAX5222 Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SOT23 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2000 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.