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PART
TEMP RANGE
PIN-PACKAGE
DS2482S-100+
-40°C to +85°C
8 SO (150 mils)
DS2482S-100+T&R
-40°C to +85°C
8 SO (150 mils)
DS2482X-100+T
-40°C to +85°C
9 WLP (2.5k pieces)
+ܭာᇄ)Qc*0९SpITܪᓰࡼॖᓤă
U0U'S! >! ௳ࡒ۞ᓤă
୭ᒙᏴၫᓾ೯ࡼᔢઁ߲ă
````````````````````````````````````````````````````````````````````````` ࢜ቯᔫ࢟വ
VCC
CURRENT-LIMITING
RESISTOR
REFER TO APPLICATION
NOTE 4206
OPTIONAL
CIRCUITRY
RP*
(I2C PORT)
μC
SDA
SCL
PCTLZ
DS2482-100
AD0
AD1
1-Wire LINE
IO
1-Wire
DEVICE
1-Wire
DEVICE
1-Wire
DEVICE
*RP = I2C PULLUP RESISTOR (SEE THE APPLICATIONS INFORMATION SECTION FOR RP SIZING).
2.XjsfဵNbyjn! Joufhsbufe! Qspevdut-! Jod/ࡼᓖݿܪă
________________________________________________________________ Maxim Integrated Products
1
ET3593.211
___________________________________ গၤ
ET3593.211
ᄰࡸ2.Xjsfᓍ఼ᒜ
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Any Pin Relative to Ground.........-0.5V to +6V
Maximum Current into Any Pin..........................................±20mA
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-55°C to +125°C
Soldering Temperature...........................Refer to the IPC/JEDEC
J-STD-020 Specification.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = 2.9V to 5.5V, TA = -40°C to +85°C.)
PARAMETER
SYMBOL
Supply Voltage
VCC
Operating Current
ICC
MIN
TYP
MAX
3.3V
CONDITIONS
2.9
3.3
3.7
5V
4.5
5.0
5.5
(Note 1)
1.9
5V
3.4
1-Wire Input High (Notes 2, 3)
VIH1
1-Wire Input Low (Notes 2, 3)
VIL1
1-Wire Weak Pullup Resistor
RWPU
(Note 4)
1-Wire Output Low
VOL1
At 4mA load
Active Pullup On Time
(Notes 4, 5)
Strong Pullup Voltage Drop
Pulldown Slew Rate (Note 6)
tAPUOT
VSTRPU
PDSRC
Pullup Slew Rate (Note 6)
PUSRC
Power-On Reset Trip Point
VPOR
0.75
3.3V
UNITS
V
mA
V
3.3V
0.9
5V
1.2
1000
V
1675
0.4
V
Standard
2.3
2.5
2.7
Overdrive
0.4
0.5
0.6
VCC 3.2V, 1.5mA load
0.3
VCC 5.2V, 3mA load
0.5
Standard (3.3V ±10%)
1
4.2
Overdrive (3.3V ±10%)
5
22.1
Standard (5.0V ±10%)
2
6.5
Overdrive (5.0V ±10%)
10
40
Standard (3.3V ±10%)
0.8
4
Overdrive (3.3V ±10%)
2.7
20
Standard (5.0V ±10%)
1.3
6
Overdrive (5.0V ±10%)
3.4
μs
V
V/μs
V/μs
31
2.2
V
1-Wire TIMING (Note 5) (See Figures 4, 5, and 6)
Write-One/Read Low Time
tW1L
Read Sample Time
tMSR
1-Wire Time Slot
t SLOT
2
Standard
7.6
8
8.4
Overdrive
0.9
1
1.1
Standard
13.3
14
15
Overdrive
1.4
1.5
1.8
Standard
65.8
69.3
72.8
Overdrive
9.9
10.5
11.0
_______________________________________________________________________________________
μs
μs
μs
ᄰࡸ2.Xjsfᓍ఼ᒜ
(VCC = 2.9V to 5.5V, TA = -40°C to +85°C.)
PARAMETER
Fall Time High-to-Low
(Notes 6, 7)
Write-Zero Low Time
SYMBOL
tF1
tW0L
Write-Zero Recovery Time
tREC0
Reset Low Time
tRSTL
Presence-Detect Sample Time
tMSP
Sampling for Short and Interrupt
tSI
Reset High Time
tRSTH
CONDITIONS
MIN
TYP
MAX
Standard (3.3V to 0V)
0.54
3.0
Overdrive (3.3V to 0V)
0.10
0.59
Standard (5.0V to 0V)
0.55
2.2
Overdrive (5.0V to 0V)
0.09
UNITS
μs
0.44
Standard
60
64
68
Overdrive
7.1
7.5
7.9
Standard
5.0
5.3
5.6
Overdrive
2.8
3.0
3.2
Standard
570
600
630
Overdrive
68.4
72
75.6
Standard
66.5
70
73.5
Overdrive
7.1
7.5
7.9
Standard
7.6
8
8.4
Overdrive
0.7
0.75
0.8
Standard
554.8
584
613.2
Overdrive
70.3
74
77.7
μs
μs
μs
μs
μs
μs
CONTROL PIN (PCTLZ)
Output Low Voltage
VOLP
VCC = 2.9V, 1.2mA load current
Output High Voltage
VOHP
0.4mA load current
0.4
VCC 0.5V
V
V
I2C PINS (SCL, SDA, AD0, AD1) (Note 8) (See Figure 9)
VCC = 2.9V to 3.7V
-0.5
0.25 ×
VCC
VCC = 4.5V to 5.5V
-0.5
0.22 ×
VCC
VIH
0.7 ×
VCC
VCC +
0.5V
Hysteresis of Schmitt Trigger
Inputs
VHYS
0.05 ×
VCC
Low-Level Output Voltage at
3mA Sink Current
VOL
Output Fall Time from VIH(MIN) to
VIL(MAX) with a Bus Capacitance
from 10pF to 400pF
t OF
Pulse Width of Spikes That Are
Suppressed by the Input Filter
t SP
Input Current Each Input/Output
Pin with an Input Voltage
Between 0.1 x VCC(MAX) and
0.9 x VCC(MAX)
II
Low-Level Input Voltage
High-Level Input Voltage
VIL
60
SDA and SCL pins only
(Notes 9, 10)
-10
V
V
V
0.4
V
250
ns
50
ns
+10
μA
_______________________________________________________________________________________
3
ET3593.211
ELECTRICAL CHARACTERISTICS (continued)
ET3593.211
ᄰࡸ2.Xjsfᓍ఼ᒜ
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 2.9V to 5.5V, TA = -40°C to +85°C.)
PARAMETER
Input Capacitance
SCL Clock Frequency
SYMBOL
CI
CONDITIONS
MIN
TYP
(Note 9)
MAX
UNITS
10
pF
400
kHz
f SCL
0
tHD:STA
0.6
μs
Low Period of the SCL Clock
tLOW
1.3
μs
High Period of the SCL Clock
tHIGH
0.6
μs
Setup Time for a Repeated
START Condition
t SU:STA
0.6
μs
Data Hold Time
tHD:DAT
(Notes 11, 12)
Data Setup Time
t SU:DAT
(Note 13)
Setup Time for STOP Condition
Hold Time (Repeated) START
Condition (After this period, the
first clock pulse is generated.)
0.9
μs
250
ns
t SU:STO
0.6
μs
Bus Free Time Between a STOP
and START Condition
tBUF
1.3
μs
Capacitive Load for Each Bus
Line
CB
(Note 14)
400
pF
t OSCWUP
(Note 15)
100
μs
Oscillator Warmup Time
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
Note 12:
Note 13:
Note 14:
Note 15:
4
Operating current with 1-Wire write-byte sequence followed by continuously reading the Status Register at 400kHz in overdrive.
With standard speed, the total capacitive load of the 1-Wire bus should not exceed 1nF. Otherwise, the passive pullup on
threshold VIL1 may not be reached in the available time. With overdrive speed, the capacitive load on the 1-Wire bus must
not exceed 300pF.
Active pullup guaranteed to turn on between VIL1(MAX) and VIH1(MIN).
Active or resistive pullup choice is configurable.
Except for tF1, all 1-Wire timing specifications and tAPUOT are derived from the same timing circuit. Therefore, if one of
these parameters is found to be off the typical value, it is safe to assume that all these parameters deviate from their typical value in the same direction and by the same degree.
These values apply at full load, i.e., 1nF at standard speed and 0.3nF at overdrive speed. For reduced load, the pulldown
slew rate is slightly faster.
Fall time high-to-low (tF1) is derived from PDSRC, referenced from 0.9 x VCC to 0.1 x VCC.
All I2C timing values are referred to VIH(MIN) and VIL(MAX) levels.
Applies to SDA, SCL, AD0 and AD1.
The input/output pins of the DS2482-100 do not obstruct the SDA and SCL lines if VCC is switched off.
The DS2482-100 provides a hold time of at least 300ns for the SDA signal (referred to the VIH(MIN) of the SCL signal) to
bridge the undefined region of the falling edge of SCL.
The maximum tHD:DAT need only be met if the device does not stretch the low period (tLOW) of the SCL signal.
A fast-mode I2C bus device can be used in a standard-mode I2C bus system, but the requirement tSU:DAT ≥ 250ns must
then be met. This is automatically the case if the device does not stretch the low period of the SCL signal. If such a device
does stretch the low period of the SCL signal, it must output the next data bit to the SDA line tR(MAX) + tSU:DAT = 1000 +
250 = 1250ns (according to the standard-mode I2C bus specification) before the SCL line is released.
CB—Total capacitance of one bus line in pF. If mixed with high-speed-mode devices, faster fall times according to I2CBus Specification Version 2.1 are allowed.
I2C communication should not take place for the max tOSCWUP time following a power-on reset.
_______________________________________________________________________________________
ᄰࡸ2.Xjsfᓍ఼ᒜ
୭
SO
WLP
1
B3
ถ
߂
VCC
࢟Ꮞ࢟ኹၒྜྷ࣡ă
2.Xjsfၒྜྷ0ၒ߲དࣅă
2
C3
IO
3
C2
GND
ݬఠă
4
B1
SCL
J3Dࠈቲဟᒩၒྜྷăܘኍᄰਭ౯࢟ᔜೌᒗWDDă
5
B2
SDA
J3Dࠈቲၫၒྜྷ0ၒ߲ăܘኍᄰਭ౯࢟ᔜೌᒗWDDă
6
A1
PCTLZ
7
A2
AD1
8
A3
AD0
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ୈဟᄋৎࡍࡼ࢟ഗă
J3Dᒍၒྜྷ࣡ăܘኍೌᒗWDD HOEăᑚቋၒྜྷཀྵࢾকୈࡼJ3D࠭ᒍ)ݬᅄ9*ă
CONFIGURATION
REGISTER
SDA
SCL
I2C
INTERFACE
CONTROLLER
T-TIME OSC
INPUT/OUTPUT
CONTROLLER
IO
PCTLZ
STATUS
REGISTER
AD0
AD1
LINE
XCVR
READ DATA
REGISTER
DS2482-100
ᅄ2/! ऱౖᅄ
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_______________________________________________________________________________________
5
ET3593.211
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)TQV*ݝॊă
ᒙࡀᆡॊ
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
1WS
SPU
1
APU
1WS
SPU
0
APU
VCC
APU = 1
APU = 0
VIH1(MIN)
VIL1(MAX)
0V
tAPUOT
1-Wire BUS IS DISCHARGED
t1
t2
t3
ᅄ3/! ဍዘ౯
6
_______________________________________________________________________________________
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ࣅআᆡᒗ1ăݧ༓౯ถ્ݙখܤᒙࡀᒦBQV
ᆡࡼᓨზă
2.XjsfႥൈ)2XT*
2XTᆡࢾET3593.211ޘညࡼྀፀ2.XjsfᄰቧࡼࢾဟăჅ
ᎌࡼ2.Xjsf࠭ୈ࣒ᑽߒܪᓰႥൈ)2XT > 1*LjᒦᏴ76μt
ดᅲ߅ৈᆡ)ᅄ4ᒦࡼuTMPU*ࡼࠅၒăࣶୈጐถጲ୷
ࡼႥൈቲᄰቧLj߂ᒄᆐႥෝါăᆐ೫࠭ܪᓰෝါ༤
ધࡵႥෝါLj2.Xjsfୈᐌኊገ၊Pwfsesjwf.Tljq! SPN
Pwfsesjwf.Nbudi SPNෘഎLjྙᏴ2.Xjsfୈၫᓾ೯ᒦ
ႁීࡼกዹă2.Xjsfୈ၊Ⴅൈখܤෘഎࡔ൩ઁLjႥൈ
ܤધݷᔫೂ૾ఎဪăET3593.211ܘኍݬᎧᑚৈႥൈܤછጲ
ۣߒᄴݛăᏴ2.Xjsfᔊஂෘഎ ᒄઁೂ૾ ᒙࡀᒦ
2XTᆡቖᆐ2Ljဣሚ2.XjsfୈႥൈࡼখܤăᒙ
ࡀᒦࡼ2XTᆡቖᆐ1Ljஜᓹख႙2.Xjsf! SftfuෘഎLjᐌ
খܤET3593.211ਜ਼ኡᄰ2.Xjsfᔐሣࡼྀੜ2.Xjsfୈ
ऩૄᒗܪᓰႥൈă
ྙਫTQVᆐ2LjET3593.211Ᏼ༓౯ఎဪࡼกৈဟᇺࡼ
ဍዘဗଝᎌᏎ౯ăऎLjᎧᎌᏎ౯ሤ܈Lj༓౯
)ಿྙLjดݝ౯ᄏ*ۣߒࡴᄰLjྙᅄ4ჅာLjᒇࡵख
ညሆྯᒬ༽ౚࡼྀፀጙᒬǖET3593.211 ၃ࡵޘည
2.Xjsfᄰቧࡼෘഎ)࢜ቯ༽ౚ*ĂᒙࡀᒦࡼTQVᆡᒙ
LAST BIT OF 1-Wire WRITE BYTE OR 1-Wire SINGLE BIT FUNCTION
VCC
WRITE-ONE CASE
WRITE-ZERO CASE
NEXT
TIME SLOT
OR 1-Wire
RESET
0V
tSLOT
PCTLZ
DS2482-100 RESISTIVE PULLUP
DS2482-100 PULLDOWN
DS2482-100 STRONG PULLUP
ᅄ4/! ࢅ࢟ᔜ౯ဟኔ
_______________________________________________________________________________________
7
ET3593.211
༓౯)TQV*
TQVᆡ᎖Ᏼ2.Xjsf Xsjuf Czufෘഎ2.Xjsf Tjohmf Cjuෘ
എᒄ༄૮༓౯ถăᏴ࣪2.Xjsf! FFQSPNୈᒊቲআ
ᒜࡀၫࡵᓍࡀถቲTIB.2ႯजဟLjጲૺ
࣪ည࢟ࡼᆨࣞࠅঢB0EᓞધݷᔫဟLjᄰޟኊገ
༓౯ᄂቶăᏴ࣪።ࡼୈၫᓾ೯ᒦਖࢾ೫Ᏼᄰቧፇ
ᒦ༓౯ࡼᆡᒙă࣪᎖กቋ2.Xjsfୈᒙ᎖ገཇऄ
ᅪ࢟ᏎᓨზࡼෘഎLjᐌܘኍᏴख߲ෘഎᒄ༄ೂ૾ᒙTQV
ᆡă༓౯ᎧᎌᏎ౯ݧሤᄴࡼดݝ౯ᄏă࣪᎖
ดݝ༓౯ᇄज൸ᔗኊཇࡼ༽ౚLjభQDUM[୭఼ᒜᅪ
ݝqࡸNPTGFULjጲܣᆐ2.Xjsfᔐሣᄋި߲ET3593.211
དࣅቶถࡼऄᅪ࢟Ꮞăো Fmfdusjdbm! Dibsbdufsjtujdt ܭᒦ
߲ࡼΔWTUSQV ݬၫLjࣥดݝ༓౯ဵ॥ᔗጲདࣅୈ
ࡼ࢟വঌᏲă
ET3593.211
ᄰࡸ2.Xjsfᓍ఼ᒜ
ᓨზࡀᆡॊ
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
DIR
TSB
SBR
RST
LL
SD
PPD
1WB
ᓨზࡀ
ᒑࣗᓨზࡀ᎖ET3593.211ሶᓍࠀಯۨস2.Xjsfᔐ
ሣࡼၫᆡಢቯĂ2.Xjsfංᓨზਜ਼ᔈআᆡᓨზࢀቧᇦă
Ⴥᎌࡼ2.Xjsfᄰቧෘഎਜ਼Efwjdf Sftfuෘഎ࣒ࣗᒎᑣᒎሶ
ᓨზࡀLjጲܣᓍ૦ࠀಯጲᔢቃࡼፇఎሾቲࣗནă
ஞᏴᒊቲ෭ቋෘഎဟLjݣৎቤᓨზࡀᒦࡼดྏăሮᇼ
ࡼดྏ༿ݬሆෂ߲ࡼৈᓨზᆡႁීă
2.Xjsfං)2XC*
2XC ᆡসᒀᓍࠀಯ 2.Xjsf ᔐሣဵ॥ࠀ᎖ංᓨზăᏴ
2.XjsfᄰቧဟLj2XCᆐ2ǗጙࡡෘഎᒊቲᅲLj2XCऩ
ૄ෦ཱྀᒋ1ă2XCᏴੜဟখܤᓨზጲૺۣߒᆐ2ᓨზࡼ
ဟମభሮᇼݬถෘഎݝॊă
።ࡊ൴ߡଶ)ހQQE*
Ᏼඛࠨ2.Xjsf! SftfuෘഎᒄઁৎቤQQEᆡăྙਫᏴ።ࡊ
ଶހᒲ໐ᒦLjET3593.211ᏴuNTQ ဟరଶࡵހ2.Xjsfୈࡼ
።ࡊ൴ߡLjQQEᆡۻᒙᆐ2ăྙਫᏴႲઁࡼ2.Xjsf! Sftfu
ෘഎᒦLjᎌ።ࡊ൴ߡ2.XjsfᔐሣۻവLjকᆡᐌऩૄ
ᆐ෦ཱྀᒋ1ă
വଶ)ހTE*
Ᏼඛࠨ 2.Xjsf! SftfuෘഎᒄઁৎቤTEᆡă።ࡊ൴ߡଶހ
ᒲ໐ᒦLjᏴuTJ ဟరLjྙਫET3593.211Ᏼ2.Xjsfᔐሣଶހ
ᆐ൝1LjTEᆡᐌۻᒙᆐ2ăྙਫᇄവࡀᏴLjႲઁࡼ
2.Xjsf Sftfuෘഎభဧকᆡऩૄᒗ෦ཱྀᒋ1ăྙਫTEᆐ2ဟLj
กඐQQEᐌᆐ1ăET3593.211ᇄजཌॊവਜ਼ET2::5
ET3515ख႙ࡼ2.Xjsfᒦࣥቧăᎅ᎖ᑚৈᏇፐLjྙਫᏴᑚ
ৈ።ᒦݧET3515ET2::5LjᒦࣥถܘኍணᒏăᏴ
ሤ።ࡼ2.Xjsfୈၫᓾ೯ᒦ೫ख႙ᒦࣥቧă
8
൝࢟ຳ)MM*
MM ᆡᒎာᏴᎌቲྀੜ 2.Xjsf ᄰቧࡼ༽ౚሆLjኡᄰ
2.Xjsfᔐሣࡼ൝ᓨზăඛࠨࣗནᓨზࡀLj2.Xjsfᔐ
ሣᓨზݧۻዹăࡩᓍ૦ࠀಯጲࣗෝါኰᒍET3593.211
ဟ)Ᏼ።ࡊᒲ໐ด*Ljݧዹਜ਼ৎቤMMᆡLj༄ᄋဵࣗᒎᑣᒎ
ሶᓨზࡀă
ୈআᆡ)STU*
ྙਫSTUᆡᆐ2LjᐌET3593.211ᒊቲ೫ดݝআᆡᒲ໐Ljభ
ᎅ࢟আᆡጐభ࠭ᒊቲ Efwjdf! Sftfu ෘഎఎဪăࡩ
ET3593.211 ᒊቲXsjuf! DpogjhvsbujpoෘഎLjSTUᆡᔈࣅ༹߹Lj
ጲۣࡀჅ໐ᆃ2.Xjsfᄂቶࡼኡᐋă
ৈᆡஉਫ)TCS*
TCSᆡসᒀ2.Xjsf Tjohmf CjuෘഎᏴuNTS ဟరݧዹᎌᏎ2.Xjsf
ᔐሣࡼ൝ᓨზ2.Xjsf UsjqmfuෘഎࡼጙᆡăTCSࡼ
࢟෦ཱྀᒋᆐ1ăྙਫ2.Xjsf Tjohmf Cjuෘഎख႙1ᆡLjTCSᐌ
።কᆐ1ăᏴᒊቲ2.Xjsf UsjqmfuෘഎဟLjTCSᆐ1થဵ2Ljན
᎖Ⴥೌࡼ2.Xjsfୈࡼሰ።ă2.Xjsf! Tjohmf! Cjuෘഎख
႙2ᆡဟLjஉਫᎧࠥሤᄴă
ྯᆡᒦࡼऔᆡ)UTC*
UTCᆡܭာ2.Xjsf UsjqmfuෘഎࡼऔᆡᏴuNTS ဟరݧዹᎌ
Ꮞ2.Xjsfᔐሣࡼ൝ᓨზăUTCࡼ࢟෦ཱྀᒋᆐ1ăஞᏴ
2.Xjsf! UsjqmfuෘഎဟকᆡݣৎቤLjᏴෘഎဟݙྀੜ
ᔫă
ኡᐋࡼႝჃവ)EJS*
ᇄ൙ੜဟᒊቲ 2.Xjsf! UsjqmfuෘഎLjকᆡসᒀᓍ૦ࠀಯ
2.Xjsf! UsjqmfuෘഎᒦࡼྯᆡჅኡᐋࡼႝჃവăEJSࡼ
࢟෦ཱྀᒋᆐ 1ăஞᏴ2.Xjsf! UsjqmfuෘഎဟݣৎቤকᆡLj
ݙ၊ෘഎ፬ሰăৎࣶቧᇦ༿ݬ2.Xjsf! Usjqmfuෘഎਜ਼
።܊298ǖ2.XjsfႝჃႯजă
_______________________________________________________________________________________
ᄰࡸ2.Xjsfᓍ఼ᒜ
ET3593.211၊9ৈถෘഎLjॊᆐ႐ৈಢቯǖୈ఼ᒜĂ
J3DᄰቧĂ2.Xjsfᒙਜ਼2.Xjsfᄰቧăᓍ૦ࡼनౣᄰࡸဵᎅ
ࣗᒎᑣ఼ᒜLjᎅඛৈถෘഎᔈࣅᒙLjܣ᎖ᓍ૦ᎌ
षᆰሤਈࡼቧᇦăᓍ૦ࠀಯಽJ3Dాጲጙৈೝ
ৈᔊஂࡼᔊ९ࠈख႙ᑚቋෘഎਜ਼းࡼݬၫăJ3Dፇገ
ཇඛৈᔊஂ࣒ۻ၃Ꮔ።ࡊLjጲཀྵࢾ၊Ljᑗᔊஂ
ᎌۻཀྵཱྀᐌᒎာᆐࡇᇙᓨზ)ᇄෘഎࡔ൩ݬၫ*Lj
உၦᄰቧăJ3DፇᇼஂLj۞౪።ࡊऱါLj༿ݬ J3Dా
ݝॊă
ถෘഎྙሆჅာǖ
2* ୈআᆡ
)Efwjdf! Sftfu*
6* 2.Xjsfৈᆡ
)2.Xjsf! Tjohmf! Cju*
3* ᒙࣗᒎᑣ
)Tfu! Sfbe! Qpjoufs*
4* ቖᒙ
)Xsjuf! Dpogjhvsbujpo*
5* 2.Xjsfআᆡ
)2.Xjsf! Sftfu*
7* 2.Xjsfቖᔊஂ
)2.Xjsf! Xsjuf! Czuf*
8* 2.Xjsfࣗᔊஂ
)2.Xjsf! Sfbe! Czuf*
9* 2.Xjsfྯᒮᒎഎ
)2.Xjsf! Usjqmfu*
ET3593.211
``````````````````````````````` ถෘഎ
ܭ2/! ᎌࡼᒎᑣࡔ൩
REGISTER SELECTION
CODE
Status Register
F0h
Read Data Register
E1h
Configuration Register
C3h
ୈআᆡ
ෘഎࡔ൩
G1iă
ෘഎݬၫ
ᇄă
ႁී
ᒊቲᓨზ૦൝ࡼཝআᆡăᒫᒏྀੜᑵᏴቲࡼ2.Xjsfᄰቧă
࢜ቯ።
Ᏼ࢟ઁୈ߱ဪછLjږᑍჅ໐ᆃࡼᒮቤ߱ဪછ)আᆡ*ă
ሢᒜ
ᇄ)భᏴྀፀဟମดᒊቲ*ă
ࡇᇙሰ።
ෘഎߒኚဟମ
ᇄă
ᔢࡍဟମᆐ636otLj࠭ෘഎࡔ൩።ࡊᆡࡼTDMሆଢ଼ዘఎဪଐဟă
2.Xjsfᎌቶ
ᔢޠኊገ373/6otLjᏴෘഎࡔ൩።ࡊᆡࡼTDMሆଢ଼ዘઁă
ࣗᒎᑣᆡᒙ
ᓨზࡀ)း᎖ංൔኯ*ă
၊፬ሰࡼᓨზᆡ
STUᒙᆐ2Ǘ2XCĂQQEĂTEĂTCSĂUTCĂEJSᒙᆐ1ă
၊፬ሰࡼᒙᆡ
2XTĂBQVĂTQVᒙᆐ1ă
ᒙࣗᒎᑣ
ෘഎࡔ൩
F2iă
ෘഎݬၫ
ᒎᑣࡔ൩)ݬܭ2*ă
ႁී
ᒙࣗᒎᑣᒗᒎࢾࡀăঙྀੜ߈ᒦ2.Xjsfᄰቧෘഎࡼࣗᒎᑣᆡᒙă
࢜ቯ።
ᓰ۸ࣗན2.Xjsf! Sfbe! CzufෘഎࡼஉਫǗࡀࡼႲ૦ࣗནă
ሢᒜ
ᇄ)భᏴྀፀဟరᒊቲ*ă
߲ࡇሰ።
ྙਫᒎᑣࡔ൩ᇄLjᐌᒎᑣࡔ൩ۻݙ።ࡊLjෘഎă
ෘഎߒኚဟମ
ᇄLjᏴᒎᑣࡔ൩።ࡊᆡࡼTDMဍዘLjৎቤࣗᒎᑣă
2.Xjsfᎌቶ
ݙ၊፬ሰă
ࣗᒎᑣᆡᒙ
ྙᒎᑣࡔ൩Ⴥᒎࢾă
၊፬ሰࡼᓨზᆡ
ᇄă
ᇄă
၊፬ሰࡼᒙᆡ
_______________________________________________________________________________________
9
ET3593.211
ᄰࡸ2.Xjsfᓍ఼ᒜ
ቖᒙ
ෘഎࡔ൩
E3iă
ෘഎݬၫ
ᒙᔊஂă
ႁී
ቖቤᒙᔊஂăቤࡼᒙೂ૾ᎌăᓖፀǖᏴቖྜྷᒙࡀဟLjᒑᎌ႐ᆡ)8ᆡᒗ5ᆡ*ဵࢅ႐ᆡ
)4ᆡᒗ1ᆡ*ࡼन൩ဟLjݣ၊ቤၫăᏴࣗᒙࡀဟLj႐ᆡጙᒇᆐ1iă
࢜ቯ።
ࢾፃሆጙৈ2.Xjsfᄰቧᄂቶă
ሢᒜ
ᏴET3593.211ࠀಯᑚৈෘഎᒄ༄Lj2.Xjsfࣅᔫ።কᒫᒏă
߲ࡇሰ።
ྙਫᏴ၃ෘഎࡔ൩ဟ2XC!>!2Ljᐌෘഎࡔ൩ਜ਼ݬၫۻݙ።ࡊLjকෘഎۻă
ෘഎߒኚဟମ
ᇄLjᏴᒙᔊஂ።ࡊᆡࡼTDMဍዘLjৎቤᒙࡀă
2.Xjsfᎌቶ
ᇄă
ࣗᒎᑣᆡᒙ
ᒙࡀ)ጲቅዩቖݷᔫ*ă
၊፬ሰࡼᓨზᆡ
STUᒙᆐ1ă
၊፬ሰࡼᒙᆡ
ৎቤ2XTĂTQVĂBQVᆡă
ෘഎࡔ൩
C5iă
ෘഎݬၫ
ᇄă
ႁී
Ᏼ2.Xjsfᔐሣޘည2.Xjsfআᆡ0።ࡊଶހᒲ໐)ᅄ5*ăᏴuTJ ਜ਼uNTQ ဟరݧዹ2.XjsfᔐሣࡼᓨზLj݀ᄰਭᓨ
ზࡀQQEਜ਼TEᆡஉਫসᒀᓍࠀಯă
࢜ቯ።
ఎဪஉၦྀፀ2.Xjsfᄰቧဟኔă
ሢᒜ
ᏴET3593.211ࠀಯᑚৈෘഎᒄ༄Lj2.Xjsfࣅᔫ።কᒫᒏă
߲ࡇሰ።
ྙਫᏴ၃ෘഎࡔ൩ဟ2XC!>!2Ljᐌෘഎࡔ൩ۻݙ።ࡊLjকෘഎۻă
ෘഎߒኚဟମ
uSTUM ,!uSTUI ,!ᔢࡍဟମ373/6otLj࠭ෘഎࡔ൩ࡼ።ࡊᆡࡼTDMሆଢ଼ዘఎဪଐဟă
2.Xjsfᎌቶ
Ᏼෘഎࡔ൩ࡼ።ࡊᆡࡼTDMሆଢ଼ዘᒄઁLjᔢޠኊገ373/6otă
ࣗᒎᑣᆡᒙ
ᓨზࡀ)᎖ൔኯංݷᔫ*ă
2.Xjsfআᆡ
၊፬ሰࡼᓨზᆡ
2XC!)uSTUM ,!uSTUI ဟᒙᆐ2*ǗuSTUM ,!uNTQ ဟLjৎቤQQEǗᏴuSTUM ,!uTJ ဟLjৎቤTEă
၊፬ሰࡼᒙᆡ
ৎቤ2XTĂBQVᆡă
10
______________________________________________________________________________________
ᄰࡸ2.Xjsfᓍ఼ᒜ
ෘഎࡔ൩
98iă
ෘഎݬၫ
ᆡᔊஂă
ႁී
ޘညৈ2.XjsfဟᇺLj2ᆡၫᒋᆐĐWđLjᎧ2.Xjsfሣࡼᆡᔊஂਖࢾሤᄴ)ݬܭ3*ăWᒋᆐ1cဟޘညጙৈ
ቖ1ဟᇺ)ᅄ6*ǗWᒋᆐ2cဟޘညጙৈቖ2ဟᇺLjጐభᔫᆐࣗၫဟᇺ)ᅄ7*ăᏴྀፀೝᒬᓨზᒦLjᏴuNTS
ဟరݧዹ2.Xjsfᔐሣࡼ൝࢟ຳLj݀ৎቤTCSă
࢜ቯ።
ࡩܘኍቲৈᆡᄰቧဟ)ᎌಿᅪ*LjጲܣᏴ2.Xjsfሣᒊቲৈᆡࡼቖࣗݷᔫă
ሢᒜ
ᏴET3593.211ࠀಯᑚৈෘഎᒄ༄Lj2.Xjsfࣅᔫ።কᒫᒏă
߲ࡇሰ።
ྙਫᏴ၃ෘഎࡔ൩ဟ2XC! >! 2Ljᐌෘഎࡔ൩ਜ਼ᆡᔊஂۻݙ።ࡊLjকෘഎۻă
ෘഎߒኚဟମ
uTMPU ,! ᔢࡍဟମ373/6otLj࠭ᆡᔊஂࡼጙᆡ)NTC*ࡼTDMሆଢ଼ዘఎဪଐဟă
2.Xjsfᎌቶ
ᏴᆡᔊஂࡼNTCᆡࡼTDMሆଢ଼ዘᒄઁLjᔢޠኊገ373/6otă
ࣗᒎᑣᆡᒙ
ᓨზࡀ)᎖ൔኯංਜ਼ࣗၫݷᔫ*ă
၊፬ሰࡼᓨზᆡ
2XC! )uTMPU ໐ମᒙᆐ2*ǗᏴuNTS ဟLjৎቤTCSǗEJS! )భጲখܤᓨზ*ă
၊፬ሰࡼᒙᆡ
ৎቤ2XTĂBQVĂTQVᆡă
ܭ3/! ᆡᔊஂࡼᆡॊ
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
V
x
x
x
x
x
x
x
y! >! ᇄਈă
RESET PULSE
PRESENCE/SHORT DETECT
tMSP
tSI
VCC
PRESENCE PULSE
APU CONTROLLED
EDGE
VIH1
VIL1
RESISTIVE PULLUP
0V
tF1
tRSTL
PULLUP
tRSTH
DS2482-100 PULLDOWN
1-Wire SLAVE PULLDOWN
ᅄ5/! 2.Xjsfআᆡ0።ࡊଶހᒲ໐
______________________________________________________________________________________
11
ET3593.211
2.Xjsfৈᆡ
ET3593.211
ᄰࡸ2.Xjsfᓍ఼ᒜ
tWOL
tMSR
VCC
VIH1
VIL1
0V
tF1
tREC0
tSLOT
PULLUP (SEE FIGURE 2)
DS2482-100 PULLDOWN
ᅄ6/! ቖ1ဟᇺ
tMSR
tW1L
VCC
VIH1
VIL1
0V
tF1
tSLOT
PULLUP (SEE FIGURE 2)
DS2482-100 PULLDOWN
1-Wire SLAVE PULLDOWN
NOTE: DEPENDING ON ITS INTERNAL STATE, A 1-Wire SLAVE DEVICE TRANSMITS DATA TO ITS MASTER (e.g. THE DS2482-100). WHEN RESPONDING WITH A 0,
A 1-Wire SLAVE STARTS PULLING THE LINE LOW DURING tW1L. ITS INTERNAL TIMING GENERATOR DETERMINES WHEN THIS PULLDOWN ENDS AND THE VOLTAGE
STARTS RISING AGAIN. WHEN RESPONDING WITH A 1, A 1-Wire SLAVE DOES NOT HOLD THE LINE LOW AT ALL, AND THE VOLTAGE STARTS RISING AS SOON AS tW1L
IS OVER. 1-Wire DEVICE DATA SHEETS USE THE TERM tRL INSTEAD OF tW1L TO DESCRIBE A READ-DATA TIME SLOT. TECHNICALLY, tRL AND tW1L HAVE IDENTICAL
SPECIFICATIONS AND CANNOT BE DISTINGUISHED FROM EACH OTHER.
ᅄ7/! ቖ2ਜ਼ࣗၫဟᇺ
12
______________________________________________________________________________________
ᄰࡸ2.Xjsfᓍ఼ᒜ
ෘഎࡔ൩
B6iă
ෘഎݬၫ
ၫᔊஂă
ႁී
ቖৈၫᔊஂᒗ2.Xjsfሣă
࢜ቯ።
ሶ2.XjsfሣቖྜྷෘഎၫǗሤࡩ᎖ᒊቲ9ৈ2.Xjsf! Tjohmf! CjuෘഎLjࡣᎅ᎖ৎࡼJ3DᄰቧऎႥࣞৎă
ሢᒜ
ᏴET3593.211ࠀಯᑚৈෘഎᒄ༄Lj2.Xjsfࣅᔫ።কᒫᒏă
߲ࡇሰ።
ྙਫᏴ၃ෘഎࡔ൩ဟ2XC! >! 2Ljᐌෘഎࡔ൩ਜ਼ၫᔊஂۻݙ።ࡊLjকෘഎۻă
ෘഎߒኚဟମ
9! y! uTMPU ,! ᔢࡍဟମ373/6otLj࠭ၫᔊஂࡼᔢઁጙᆡ)MTC*ࡼሆଢ଼ዘఎဪଐဟă
2.Xjsfᎌቶ
ၫᔊஂMTCᆡࡼTDMሆଢ଼ዘઁLjᔢޠኊገ373/6ot! )ಿྙLjᏴၫᔊஂ።ࡊᒄ༄*ă ᓖፀǖᏴJ3Dᔐሣਜ਼
Ᏼ2.Xjsfᔐሣࡼᆡࠨኔݙᄴ)2.XjsfǖMTCᏴ༄ǗJ3DǖNTCᏴ༄*LjፐࠥLjᏴET3593.211၃ཝݝၫᔊ
ஂᒄ༄Ljݙถఎဪ2.Xjsfࣅᔫă
ࣗᒎᑣᆡᒙ
ᓨზࡀ)᎖ൔኯංݷᔫ*ă
၊፬ሰࡼᓨზᆡ
2XC! )9! y! uTMPU ໐ମᒙᆐ2*ă
၊፬ሰࡼᒙᆡ
ৎቤ2XTĂTQVĂBQVᆡă
2.Xjsfࣗᔊஂ
ෘഎࡔ൩
:7iă
ෘഎݬၫ
ᇄă
ႁී
Ᏼ2.Xjsfᔐሣޘည9ৈࣗၫဟᇺLj݀உਫۣࡀᏴࣗၫࡀᒦă
࢜ቯ።
ࣗན2.Xjsfᔐሣၫăሤࡩ᎖ᒊቲࡒᎌW! >! 2! )ቖ2ဟᇺ*ࡼ9ৈ2.Xjsf! Tjohmf! CjuෘഎLjࡣᎅ᎖ି೫J3D
ᄰቧLjႥࣞৎă
ሢᒜ
ᏴET3593.211ࠀಯᑚৈෘഎᒄ༄Lj2.Xjsfࣅᔫ።কᒫᒏă
߲ࡇሰ።
ྙਫᏴ၃ෘഎࡔ൩ဟ2XC! >! 2Ljᐌෘഎࡔ൩ۻݙ።ࡊLjকෘഎۻă
ෘഎߒኚဟମ
9! y! uTMPU ,! ᔢࡍဟମ373/6otLj࠭ෘഎࡔ൩ࡼ።ࡊᆡࡼTDMሆଢ଼ዘఎဪଐဟă
2.Xjsfᎌቶ
Ᏼෘഎࡔ൩።ࡊᆡࡼTDMሆଢ଼ዘઁLjᔢޠኊገ373/6otă
ࣗᒎᑣᆡᒙ
ᓨზࡀ)᎖ൔኯංݷᔫ*ăᓖፀǖ࠭2.Xjsfሣࣗན၃ࡵࡼၫᔊஂLjख႙Tfu! Sfbe! Qpjoufsෘഎਜ਼
ኡᐋࣗၫࡀLjઁᏴࣗෝါሆLjषᆰET3593.211ă
၊፬ሰࡼᓨზᆡ
2XC! )9! y! uTMPU ໐ମᒙᆐ2*ă
၊፬ሰࡼᒙᆡ
ৎቤ2XTĂBQVă
______________________________________________________________________________________
13
ET3593.211
2.Xjsfቖᔊஂ
ET3593.211
ᄰࡸ2.Xjsfᓍ఼ᒜ
2.Xjsfྯᒮᒎഎ
ෘഎࡔ൩
89iă
ෘഎݬၫ
ऱሶᔊஂă
ႁී
Ᏼ2.Xjsfሣޘည4ৈဟᇺǖ3ৈࣗဟᇺਜ਼2ৈቖဟᇺăቖဟᇺࡼಢቯན᎖ࣗဟᇺࡼஉਫਜ਼ऱሶᔊஂă
ྙਫೝৈࣗဟᇺ࣒ᆐ1! )࢜ቯᓨზ*LjऱሶᔊஂཀྵࢾቖဟᇺࡼಢቯăᏴᑚᒬᓨზሆLjྙਫW! >! 2Lj
ET3593.211ޘညቖ2ဟᇺǗW! >! 1Ljᐌޘညቖ1ဟᇺLjݬܭ4ă
ྙਫࣗဟᇺᆐ1ਜ਼2ဟLjஜৌᓹఎဪቖ1ဟᇺă
ྙਫࣗဟᇺᆐ2ਜ਼1ဟLjஜৌᓹఎဪቖ2ဟᇺă
ྙਫࣗဟᇺᆐ2! )ࡇᇙᓨზ*Ljሆࡼᆐቖ2ဟᇺă
࢜ቯ።
ᒊቲጙࠨ2.Xjsf! Tfbsdi! SPNဟኔLjᑳৈဟኔኊገᒊቲ75ࠨᑚৈෘഎဤܰਜ਼ኰᒍࡵጙৈୈă
ሢᒜ
ᏴET3593.211ࠀಯᑚৈෘഎᒄ༄Lj2.Xjsfࣅᔫ።কᒫᒏă
߲ࡇሰ።
ྙਫᏴ၃ෘഎࡔ൩ဟ2XC! >! 2Ljᐌෘഎࡔ൩ਜ਼ऱሶᔊஂۻݙ።ࡊLjকෘഎۻă
ෘഎߒኚဟମ
4! y! uTMPU ,! ᔢࡍဟମ373/6otLj࠭ऱሶᔊஂࡼጙᆡ)NTC*ࡼTDMሆଢ଼ዘఎဪଐဟă
2.Xjsfᎌቶ
ᏴऱሶᔊஂNTCࡼTDMሆଢ଼ዘᒄઁLjᔢޠኊገ373/6otă
ࣗᒎᑣᆡᒙ
ᓨზࡀ)᎖ൔኯංݷᔫ*ă
၊፬ሰࡼᓨზᆡ
2XC! )4! y! uTMPU ໐ମᒙᆐ2*ăᏴጙৈuNTS ဟମLjৎቤTCSǗᏴऔৈuNTS ဟମ)૾LjᏴuTMPU ,! uNTS*Lj
ৎቤUTCਜ਼EJSă
၊፬ሰࡼᒙᆡ
ৎቤ2XTĂBQVă
ܭ4/! ऱሶᔊஂࡼᆡॊ
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
V
x
x
x
x
x
x
x
y! >! ᇄਈă
14
______________________________________________________________________________________
ᄰࡸ2.Xjsfᓍ఼ᒜ
MSB
LSB
MSB
ET3593.211
MSB FIRST
LSB
SDA
SLAVE
ADDRESS
SCL
1–7
IDLE
START
CONDITION
R/W
8
ACK
9
DATA
1–7
ACK
8
DATA
9
ACK/
NACK
1–7
8
9
REPEATED IF MORE BYTES
ARE TRANSFERRED
STOP CONDITION
REPEATED START
ᅄ8/! J3Dፇᔐஉ
```````````````````````````````` J3Dా
ᄰᄂቶ
J 3 D ᔐሣݧၫሣ)TEB*ਜ਼ဟᒩቧ)TDM*ቲᄰቧă
TEBਜ਼TDM࣒ဵၷሶሣLjᄰਭ౯࢟ᔜೌࡵ࢟Ꮞ࣡ᑵă
ݙቲᄰቧဟLjᑚೝᄟሣᆐ࢟ຳăೌࡵᔐሣࡼୈ
ࡼၒ߲።কဵധఎവૹ࢟ఎവLjဣሚሣᎧ
ถăJ3DᔐሣࡼၫᏴܪᓰෝါሆጲࡉ211lcqtࡼႥൈ
ቲࠅၒLjऎᏴႥෝါሆᐌጲࡉ511lcqtࡼႥൈቲ
ࠅၒăET3593.211భᏴೝᒬෝါሆᔫă
ᔐሣख႙ၫࡼୈᔫᆐख႙Ljऎ၃ၫࡼୈ
ᔫᆐ၃ă఼ᒜᄰቧࡼୈ߂ᒄᆐᓍ૦ăᓍ૦఼ᒜࡼ
ୈᆐ࠭૦ăᆐ೫ถۻᓍ૦ࣖೂࡼषᆰLjඛጙৈୈ࣒
።কᎌ࠭૦ᒍLjጲ્ݙܣᎧᔐሣࡼჇୈखညߡᅃă
ᔐሣᒑᎌᏴహሔဟLjݣᎌభถࠅ႙ၫăᓍ૦ޘညೌኚ
ࡼဟᒩ)TDM*ቧLj఼ᒜᔐሣषᆰLjޘညTUBSUਜ਼TUPQᄟ
ୈLj݀ཀྵࢾ TUBSUਜ਼TUPQ! )ᅄ8*ᒄମჅࠅ႙ࡼၫᔊஂ
ࡼৈၫăၫጲᔊஂࠅ႙LjᔢᎌᆡᏴ༄ăᏴඛৈᔊ
ஂࡼઁෂஜৌጙৈ።ࡊᆡLjဧࡻᓍ૦Ꭷ࠭૦ۣߒᄴݛă
࠭ᒍ
ET3593.211Ⴥሰ።ࡼ࠭૦ᒍྙᅄ9Ⴥာăᒍ୭BE1
ਜ਼BE2ࡼ൝ᓨზཀྵࢾ೫ᒍᆡB1ਜ਼B2ࡼᒋăᒍ୭
Ꮴୈభጲሰ።5ৈ࠭ୈᒍᒦࡼጙৈᒍă࠭ୈ
ᒍဵ࠭ୈኰᒍ0఼ᒜᔊஂࡼጙݝॊă࠭ୈኰᒍ0఼ᒜ
ᔊஂࡼᔢઁጙᆡ)S0W*ࢾۻፃᆐၫऱሶăࡩᒙᆐ1ဟLj
ሆࡼၫ࠭ᓍ૦ࡵ࠭૦ࠅၒ)ቖषᆰ*ăࡩᒙᆐ2ဟLj
࠭࠭૦ࡵᓍ૦ቲࠅၒၫ)ࣗषᆰ*ă
7-BIT SLAVE ADDRESS
A6
A5
A4
A3
A2
A1
A0
0
0
1
1
0
AD1
AD0
MSB
AD1, AD0
PIN STATES
R/W
DETERMINES
READ OR WRITE
ᅄ9/! ET3593.211࠭ᒍ
______________________________________________________________________________________
15
ET3593.211
ᄰࡸ2.Xjsfᓍ఼ᒜ
SDA
tBUF
tF
tSP
tHD:STA
tLOW
SCL
tHIGH
tHD:STA
tHD:DAT
STOP
tSU:STA
tR
SPIKE
SUPPRESSION
tSU:STO
tSU:DAT
START
REPEATED
START
NOTE: TIMING IS REFERENCED TO VIL(MAX) AND VIH(MIN).
ᅄ:/! J3Dဟኔᅄ
J3Dࢾፃ
ሆෂࡼၣᎫᄰဵޟහၤJ3DၫࠅၒăᏴᅄ:ᒦࢾፃဟ
ኔݬఠă
ᔐሣహሔݙංǖTEBਜ਼TDMᆐᇄᓨზਜ਼ࠀ᎖൝
ᓨზă
TUBSUᄟୈǖᆐ೫ࣅᎧ࠭ୈࡼᄰቧLjᓍ૦ܘኍޘ
ညጙৈTUBSUᄟୈăTDMۣߒ࢟ຳ໐ମLjTEB࠭ܤ
છᆐࢅᔫᆐTUBSUᄟୈă
TUPQᄟୈǖᆐ೫உၦᎧ࠭ୈࡼᄰቧLjᓍ૦ܘኍޘည
ጙৈTUPQᄟୈăTDMۣߒ࢟ຳ໐ମLjTEB࠭ࢅܤછ
ᒗᔫᆐTUPQᄟୈă
ᒮআTUBSUᄟୈǖᒮআTUBSUᄟୈጙۅ።᎖ࣗݷᔫLj
ኡᐋᒎࢾࡼၫᏎࣗནࡼᒍăᏴၫࠅၒஉၦဟLj
ᓍ૦ဧᒮআTUBSUᄟୈLjஜৌᏴࡩ༄ၫᒄઁLjೂ
૾ఎဪቤࡼၫࠅၒăޘညᒮআTUBSUᄟୈᎧޘညጙ
ࡼۅTUBSUᄟୈऱါሤᄴLjᒑဵᏴTUPQᄟୈઁLjᇄኊ
ۣഔᔐሣᆐహሔᓨზऎጯă
ၫᎌǖ߹TUBSUਜ਼TUPQᄟୈᅪLjTEBܤછஞభถ
ᏴTDMᆐࢅ࢟ຳဟቲăᏴTDMࡼᑳৈ࢟ຳ൴ߡਜ਼Ⴥ
ኊࡼࣅᎧۣߒဟମ)TDMሆଢ଼ዘᒄઁࡼuIE;EBU ਜ਼TDM
ဍዘᒄ༄ࡼuTV;EBULjྙᅄ:Ⴥာ*໐ମLjTEBࡼၫ
ܘኍۣߒᎌܤݙăඛጙᆡၫገཇጙৈဟᒩ൴ߡă
ᏴTDMࡼဍዘLjၫጤྜྷࡵ၃ᒦă
16
ቖݷᔫஉၦဟLjᓍ૦ܘኍျहTEBሣLjጲܣᏴሆጙৈ
TDMࡼဍዘᒄ༄ᎌᔗ৫ࡼࣅဟମ)ᔢቃᒋᆐǖuTV;EBU
,! uSLjݬᅄ:*ఎဪࣗནၫăᏴTEBሣࡼ༄ጙৈTDM
൴ߡࡼሆଢ଼ዘLj࠭ୈጤ߲ඛৈၫᆡăᏴࡩ༄TDM൴
ߡࡼဍዘLjၫᆡᎌăᓍ૦ޘညჅᎌࡼTDMဟᒩቧ
Lj۞౪กቋኊገ࠭࠭ୈࣗནࡼ൴ߡă
።ࡊቧǖᄰޟLjࡩኰᒍ෭ৈ၃ୈဟLjᏴ၃ࡵඛ
ጙৈᔊஂઁገཇޘည።ࡊቧăᓍ૦ܘኍޘညጙৈᎧ
ᑚৈ።ࡊᆡሤਈࡼ൴ߡăᏴ።ࡊ൴ߡ໐ମLj።ࡊୈ
ܘኍጲᑚᒬऱါ౯ࢅTEBLj૾Ᏼሤਈࡼ።ࡊ൴ߡ࢟
ຳဟମଝჅኊࡼೂਜ਼ۣߒဟମ)TDMࡼሆଢ଼ዘઁࡼ
uIE;EBU ਜ਼TDMဍዘᒄ༄ࡼuTV;EBU*໐ମLjTEB! ࠀ᎖ᆮ
ࢾࡼࢅ࢟ຳă
࠭ୈݙ።ࡊǖ࠭ୈభถݙถ၃ࠅၒၫLjಿ
ྙLjᎅ᎖কୈං᎖ᒊቲ෭ቋဣဟถăᏴᑚᒬ༽ౚ
ሆLj࠭ୈ્ݙ።ࡊ࠭ᒍLjTEBሣጙᒇᆐ࢟ຳă
ᔪੑᄰቧᓰ۸ࡼ࠭ୈᒗ።ࡊ࠭ୈࡼᒍă
ऎLjᎌဟ࠭ୈభถ၊ၫLjಿྙᇄࡼෘ
എࡔ൩ݬၫăᏴᑚᒬᓨზሆLj࠭ୈ࣪Ⴥ၃
ࡼྀੜᔊஂݙቲ።ࡊLjۣ݀ߒTEBሣᆐ࢟ຳăᏴ
ၤྀፀೝᒬᓨზሆLj࠭ୈ።ࡊပઁھLjᓍ૦၅ሌ
ኊገޘညጙৈᒮআTUBSUᄟୈᏴTUPQᄟୈᒄઁޘည
ጙৈTUBSUᄟୈLjጲఎဪࠅၒቤࡼၫă
______________________________________________________________________________________
ᄰࡸ2.Xjsfᓍ఼ᒜ
ቖྜྷET3593.211
ᆐ೫࣪ET3593.211ቲቖݷᔫLjᓍ૦ܘኍጲቖෝါषᆰ࠭
ୈLj૾ख႙࠭ୈᒍဟܘኍऱሶᆡᒙᆐ1ăख႙
ࡼሆጙৈᔊஂᆐෘഎࡔ൩LjభถથஜৌጙৈෘഎݬၫLj
ᑚན᎖ෘഎăET3593.211።ࡊᎌෘഎࡔ൩ਜ਼Ⴥ໐ᆃ
ࡼ0ᎌࡼෘഎݬၫLjऎऄᅪࡼᔊஂᇄෘഎݬၫۻݙ
።ࡊă
ࣗནET3593.211
ᆐ೫ࣗནET3593.211Ljᓍ૦ܘኍጲࣗෝါषᆰ࠭ୈăጐ
ဵႁLjख႙࠭ୈᒍဟܘኍऱሶᆡᒙᆐ2ăࣗᒎ
ᑣཀྵࢾ೫ᓍ૦࠭ৈࡀఎဪࣗནăᓍ૦భถᒮআࡼ
ࣗནᄴጙৈࡀLjऎᇄኊᒮቤᒙᒍLjಿྙއఘ
2XC࠭2ᒗ1ࡼܤછăࣗནݙᄴࡼࡀLjᓍ૦ܘኍख႙
Tfu! Sfbe! QpjoufsෘഎLjઁᏳጲࣗෝါषᆰET3593.211ă
```````````````````````````` J3Dᄰቧဣಿ
J3Dᄰቧᅄܭਜ਼ၫऱሶܪဤభॊܰݬܭ5ਜ਼ܭ6ă
ܭ5/! J3Dᄰቧ—ᅄܭ
SYMBOL
S
DESCRIPTION
START Condition
AD, 0
Select DS2482-100 for Write Access
AD, 1
Select DS2482-100 for Read Access
Sr
Repeated START Condition
P
STOP Condition
A
Acknowledged
A\
Not Acknowledged
(Idle)
<byte>
DRST
SRP
Bus Not Busy
Transfer of One Byte
Command “Device Reset”, F0h
Command “Set Read Pointer”, E1h
WCFG
Command “Write Configuration”, D2h
1WRS
Command “1-Wire Reset”, B4h
1WSB
Command “1-Wire Single Bit”, 87h
1WWB
Command “1-Wire Write Byte”, A5h
1WRB
Command “1-Wire Read Byte”, 96h
1WT
Command “1-Wire Triplet”, 78h
ܭ6/! ၫऱሶܪဤ
Master-to-Slave
Slave-to-Master
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17
ET3593.211
ᓍ૦ݙ።ࡊǖᎌဟ၃ၫဟLjᓍ૦ܘኍሶ࠭ୈख
႙ጙৈၫᒫᒏቧăᆐ೫ࡻᑚৈቧLjᓍ૦ݙ።
ࡊჅ၃ࡼᎅ࠭ୈख႙ࡼᔢઁጙৈᔊஂăᔫᆐሰ።Lj
࠭ୈျहTEBLjᏤᓍ૦ޘညTUPQᄟୈă
ET3593.211
ᄰࡸ2.Xjsfᓍ఼ᒜ
```````````````````````````````````````````````````````````````````````` J3Dᄰቧဣಿ)ኚ*
Device Reset (After Power-Up)
S
AD,0
A
DRST
A
Sr
AD,1
A
<byte>
A\
P
Activities that are underlined denote an optional read access to verify the success of the command.
Set Read Pointer (To Read from Another Register)
Case A: Valid Read Pointer Code
S
AD,0
A
SRP
A
C3h
A
P
C3h is the valid read pointer code for the Configuration Register.
Case B: Invalid Read Pointer Code
S
AD,0
A
SRP
A
E5h
A\
P
E5h is an invalid read pointer code.
Write Configuration (Before Starting 1-Wire Activity)
Case A: 1-Wire Idle (1WB = 0)
S
AD,0
A
WCFG
A
<byte>
A
Sr
AD,1
A
<byte>
A\
P
Activities that are underlined denote an optional read access to verify the success of the command.
Case B: 1-Wire Busy (1WB = 1)
S
AD,0
A
WCFG
A\
P
The master should stop and restart as soon as the DS2482-100 does not acknowledge the command code.
1-Wire Reset (To Begin or End 1-Wire Communication)
Case A: 1-Wire Idle (1WB = 0), No Busy Polling to Read the Result
S
AD,0
A
1WRS
A
P
(Idle)
S
AD,1
A
<byte>
A\
P
In the first cycle, the master sends the command. Then the master waits (Idle) for the 1-Wire reset to complete. In
the second cycle, the DS2482-100 is accessed to read the result of the 1-Wire reset from the Status Register.
Case B: 1-Wire Idle (1WB = 0), Busy Polling Until the 1-Wire Command is Completed, then Read the Result
S
AD,0
A
1WRS
A
Sr
AD,1
A
<byte>
A
<byte>
A\
P
REPEAT UNTIL THE 1WB BIT HAS CHANGED TO 0.
Case C: 1-Wire Busy (1WB = 1)
S
AD,0
A
1WRS
A\
P
The master should stop and restart as soon as the DS2482-100 does not acknowledge the command code.
18
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ᄰࡸ2.Xjsfᓍ఼ᒜ
1-Wire Single Bit (To Generate a Single Time Slot on the 1-Wire Line)
Case A: 1-Wire Idle (1WB = 0), No Busy Polling
S
AD,0
A
1WSB
A
<byte>
A
P
(Idle)
S
AD,1
A
<byte>
A\
P
The idle time is needed for the 1-Wire function to complete. Then access the device in read mode to get the
result from the 1-Wire Single Bit command.
Case B: 1-Wire Idle (1WB = 0), Busy Polling Until the 1-Wire Command is Completed
S
AD,0
A
1WSB
A
<byte>
A
Sr
REPEAT UNTIL THE 1WB BIT
HAS CHANGED TO 0.
AD,1
A
<byte>
A
<byte>
A\
P
When 1WB has changed from 1 to 0, the Status Register holds the valid result of the 1-Wire Single Bit command.
Case C: 1-Wire Busy (1WB = 1)
S
AD,0
A
1WSB
A\
P
The master should stop and restart as soon as the DS2482-100 does not acknowledge the command code.
1-Wire Write Byte (To Send a Command Code to the 1-Wire Line)
Case A: 1-Wire Idle (1WB = 0), No Busy Polling
S
AD,0
A
1WWB
A
33h
A
P
(Idle)
33h is the valid 1-Wire ROM function command for Read ROM. The idle time is needed for the 1-Wire function to
complete. There is no data read back from the 1-Wire line with this command.
Case B: 1-Wire Idle (1WB = 0), Busy Polling Until the 1-Wire Command is Completed.
S
AD,0
A
1WWB
A
33h
A
Sr
REPEAT UNTIL THE 1WB BIT
HAS CHANGED TO 0.
AD,1
A
<byte>
A
<byte>
A\
P
When 1WB has changed from 1 to 0, the 1-Wire Write Byte command is completed.
Case C: 1-Wire Busy (1WB = 1)
S
AD,0
A
1WWB
A\
P
The master should stop and restart as soon as the DS2482-100 does not acknowledge the command code.
______________________________________________________________________________________
19
ET3593.211
```````````````````````````````````````````````````````````````````````` J3Dᄰቧဣಿ)ኚ*
ET3593.211
ᄰࡸ2.Xjsfᓍ఼ᒜ
```````````````````````````````````````````````````````````````````````` J3Dᄰቧဣಿ)ኚ*
1-Wire Read Byte (To Read a Byte from the 1-Wire Line)
Case A: 1-Wire Idle (1WB = 0), No Busy Polling, Set Read Pointer After Idle Time
S
AD,0
A
1WRB
A
P
(Idle)
S
AD,0
A
SRP
A
E1h
A
Sr
AD,1
A
<byte>
A\
P
The idle time is needed for the 1-Wire function to complete. Then set the read pointer to the Read Data Register
(code E1h) and access the device again to read the data byte that was obtained from the 1-Wire line.
Case B: 1-Wire Idle (1WB = 0), No Busy Polling, Set Read Pointer Before Idle Time
S
AD,0
A
1WRB
A
Sr
AD,0
A
SRP
A
E1h
A
(Idle)
S
AD,1
A
<byte>
A\
P
P
The read pointer is set to the Read Data Register (code E1h) while the 1-Wire Read Byte command is still in
progress. Then, after the 1-Wire function is completed, the device is accessed to read the data byte that was
obtained from the 1-Wire line.
Case C: 1-Wire Idle (1WB = 0), Busy Polling Until the 1-Wire Command is Completed
S
AD,0
A
Sr
1WRB
AD,0
A
A
REPEAT UNTIL THE 1WB BIT
HAS CHANGED TO 0.
Sr
AD,1
A
<byte>
A
<byte>
A\
SRP
A
E1h
A
Sr
AD,1
A
<byte>
A\
P
Poll the Status Register until the 1WB bit has changed from 1 to 0. Then set the read pointer to the Read Data
Register (code E1h) and access the device again to read the data byte that was obtained from the 1-Wire line.
Case D: 1-Wire Busy (1WB = 1)
S
AD,0
A
1WRB
A\
P
The master should stop and restart as soon as the DS2482-100 does not acknowledge the command code.
20
______________________________________________________________________________________
ᄰࡸ2.Xjsfᓍ఼ᒜ
1-Wire Triplet (To Perform a Search ROM Function on the 1-Wire Line)
Case A: 1-Wire Idle (1WB = 0), No Busy Polling
S
AD,0
A
1WT
A
<byte>
A
P
(Idle)
S
AD,1
A
<byte>
A\
P
The idle time is needed for the 1-Wire function to complete. Then access the device in read mode to get the
result from the 1-Wire Triplet command.
Case B: 1-Wire Idle (1WB = 0), Busy Polling Until the 1-Wire Command is Completed
S
AD,0
A
1WT
A
<byte>
A
Sr
REPEAT UNTIL THE 1WB BIT
HAS CHANGED TO 0.
AD,1
A
<byte>
A
<byte>
A\
P
When 1WB has changed from 1 to 0, the Status Register holds the valid result of the 1-Wire Triplet command.
Case C: 1-Wire Busy (1WB = 1)
S
AD,0
A
1WT
A\
P
The master should stop and restart as soon as the DS2482-100 does not acknowledge the command code.
``````````````````````````````` ።ቧᇦ
TEBਜ਼TDM౯࢟ᔜ
TEBဵET3593.211ࡼധఎവၒ߲Ljኊገጙৈ౯࢟ᔜ
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______________________________________________________________________________________
21
ET3593.211
```````````````````````````````````````````````````````````````````````` J3Dᄰቧဣಿ)ኚ*
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೫ᒬ࢟ኹሆ࣪።ࡼ౯࢟ᔜᒋă
VCC
CURRENT-LIMITING
RESISTOR
REFER TO APPLICATION
NOTE 4206
RP*
SDA
SCL
(I2C PORT)
μC
PCTLZ
DS2482-100
AD0
AD1
1-Wire LINE
IO
1-Wire DEVICE #1
(WITH SPECIAL POWER
REQUIREMENTS)
VCC
SDA
SCL
PCTLZ
DS2482-100
VCC
AD0
AD1
1-Wire LINE
IO
1-Wire
DEVICE #2
*RP = I2C PULLUP RESISTOR (SEE THE APPLICATIONS INFORMATION SECTION FOR RP SIZING).
2000
500
1600
400
1200
300
MINIMUM RP
800
200
MAX LOAD AT MIN RP FAST MODE
400
100
0
0
1
2
3
4
5
PULLUP VOLTAGE (V)
ᅄ22/! J3DႥෝါሆࡼ౯࢟ᔜኡᐋཎሣ
22
______________________________________________________________________________________
LOAD (pF)
ᅄ21/! ።࢟വာፀᅄ
MINIMUM RP (Ω)
ET3593.211
ᄰࡸ2.Xjsfᓍ఼ᒜ
ᄰࡸ2.Xjsfᓍ఼ᒜ
TOP VIEW
(BUMP SIDE DOWN)
TOP MARK
DS2482-100
DS2482-100
1
TOP VIEW
2
3
1
+
+
A
VCC
1
8 AD0
IO
2
7 AD1
DS2482-100
6 PCTLZ
SCL
4
5 SDA
SO (150 mils)
AD1
AD0
B
3
3
A
PCTLZ
GND
2
+
2 4 8 2 1
B
SCL
SDA
VCC
C
y y w w r r
# # # x x
C
GND
IO
WLP
WLP
````````````````````````````````````````````````````````````````````````````` ॖᓤቧᇦ
ྙኊᔢதࡼॖᓤᅪተቧᇦਜ਼ݚLj༿އኯ china.maxim-ic.com/packagesă
ॖᓤಢቯ
ॖᓤܠ൩
ᆪܠ
8 SO (150mil)
S8+4
21-0041
9 WLP
W92A1+1
21-0067
______________________________________________________________________________________
23
ET3593.211
``````````````````````````````````````````````````````````````````````````` ୭ᒙ
ET3593.211
ᄰࡸ2.Xjsfᓍ఼ᒜ
``````````````````````````````````````````````````````````````````````````````` ኀࢿ಼ဥ
ኀࢿࠨၫ
5
6
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2
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5
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14
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Ⴥᎌ
ৎધᅄ9ă
࿎߹೫࢜ቯᔫ࢟വਜ਼ᅄ22ᒦࡼ2.Xjsf࣡࢟ᔜጲૺೌᒗক࢟ᔜࡼᓰă
• ኀᑵ೫ᎌᏎ౯)BQV*ࡼᅎୀဧޝă
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16
1, 23
1–7, 9–12, 15, 16,
21, 22, 24